ARM: beaglebone: Switch to devicetree and multiimage
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
parent
63ec8ab383
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9dd7b7a0f2
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@ -1,6 +1,8 @@
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#ifndef __BOARD_BEAGLEBONE_H
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#define __BOARD_BEAGLEBONE_H
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#include <mach/am33xx-generic.h>
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static inline int is_beaglebone_black(void)
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{
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return am33xx_get_cpu_rev() != AM335X_ES1_0;
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@ -22,150 +22,41 @@
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*/
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#include <common.h>
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#include <console.h>
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#include <init.h>
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#include <driver.h>
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#include <envfs.h>
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#include <environment.h>
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#include <globalvar.h>
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#include <sizes.h>
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#include <io.h>
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#include <ns16550.h>
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#include <net.h>
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#include <bootsource.h>
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#include <asm/armlinux.h>
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#include <generated/mach-types.h>
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#include <mach/am33xx-silicon.h>
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#include <mach/am33xx-clock.h>
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#include <mach/sdrc.h>
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#include <mach/sys_info.h>
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#include <mach/syslib.h>
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#include <mach/gpmc.h>
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#include <mach/ehci.h>
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#include <i2c/i2c.h>
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#include <linux/err.h>
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#include <linux/phy.h>
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#include <usb/ehci.h>
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#include <mach/am33xx-devices.h>
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#include <mach/am33xx-mux.h>
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#include <mach/wdt.h>
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#include <mach/am33xx-generic.h>
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#include <mach/cpsw.h>
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#include "beaglebone.h"
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#ifdef CONFIG_DRIVER_SERIAL_NS16550
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/**
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* @brief UART serial port initialization - remember to enable COM clocks in
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* arch
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*
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* @return result of device registration
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*/
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static int beaglebone_console_init(void)
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{
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barebox_set_model("Texas Instruments beaglebone");
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barebox_set_hostname("beaglebone");
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am33xx_add_uart0();
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return 0;
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}
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console_initcall(beaglebone_console_init);
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#endif /* CONFIG_DRIVER_SERIAL_NS16550 */
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static int beaglebone_mem_init(void)
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{
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if (is_beaglebone_black())
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omap_add_ram0(SZ_512M);
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else
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omap_add_ram0(SZ_256M);
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return 0;
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}
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mem_initcall(beaglebone_mem_init);
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static struct cpsw_slave_data cpsw_slaves[] = {
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{
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.phy_id = 0,
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.phy_if = PHY_INTERFACE_MODE_MII,
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},
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};
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static struct cpsw_platform_data cpsw_data = {
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.slave_data = cpsw_slaves,
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.num_slaves = ARRAY_SIZE(cpsw_slaves),
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};
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static void beaglebone_eth_init(void)
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{
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am33xx_register_ethaddr(0, 0);
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writel(0, AM33XX_MAC_MII_SEL);
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am33xx_enable_mii1_pin_mux();
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am33xx_add_cpsw(&cpsw_data);
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}
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static struct i2c_board_info i2c0_devices[] = {
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{
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I2C_BOARD_INFO("24c256", 0x50)
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},
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};
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static const __maybe_unused struct module_pin_mux mmc1_pin_mux[] = {
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{OFFSET(gpmc_ad0), (MODE(1) | RXACTIVE)}, /* MMC1_DAT0 */
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{OFFSET(gpmc_ad1), (MODE(1) | RXACTIVE)}, /* MMC1_DAT1 */
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{OFFSET(gpmc_ad2), (MODE(1) | RXACTIVE)}, /* MMC1_DAT2 */
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{OFFSET(gpmc_ad3), (MODE(1) | RXACTIVE)}, /* MMC1_DAT3 */
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{OFFSET(gpmc_ad4), (MODE(1) | RXACTIVE)}, /* MMC1_DAT4 */
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{OFFSET(gpmc_ad5), (MODE(1) | RXACTIVE)}, /* MMC1_DAT5 */
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{OFFSET(gpmc_ad6), (MODE(1) | RXACTIVE)}, /* MMC1_DAT6 */
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{OFFSET(gpmc_ad7), (MODE(1) | RXACTIVE)}, /* MMC1_DAT7 */
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{OFFSET(gpmc_csn1), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CLK */
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{OFFSET(gpmc_csn2), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CMD */
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{-1},
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};
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static struct omap_hsmmc_platform_data beaglebone_sd = {
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.devname = "sd",
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};
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static struct omap_hsmmc_platform_data beaglebone_emmc = {
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.devname = "emmc",
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};
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static int beaglebone_devices_init(void)
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{
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am33xx_enable_mmc0_pin_mux();
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am33xx_add_mmc0(&beaglebone_sd);
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int black;
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if (is_beaglebone_black()) {
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configure_module_pin_mux(mmc1_pin_mux);
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am33xx_add_mmc1(&beaglebone_emmc);
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}
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if (!of_machine_is_compatible("ti,am335x-bone"))
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return 0;
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if (bootsource_get() == BOOTSOURCE_MMC) {
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if (bootsource_get_instance() == 0)
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omap_set_bootmmc_devname("sd");
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omap_set_bootmmc_devname("mmc0");
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else
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omap_set_bootmmc_devname("emmc");
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omap_set_bootmmc_devname("mmc1");
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}
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am33xx_enable_i2c0_pin_mux();
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i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices));
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am33xx_add_i2c0(NULL);
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am33xx_register_ethaddr(0, 0);
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beaglebone_eth_init();
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return 0;
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}
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device_initcall(beaglebone_devices_init);
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static int beaglebone_env_init(void)
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{
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int black = is_beaglebone_black();
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black = is_beaglebone_black();
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globalvar_add_simple("board.variant", black ? "boneblack" : "bone");
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@ -176,4 +67,4 @@ static int beaglebone_env_init(void)
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return 0;
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}
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late_initcall(beaglebone_env_init);
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coredevice_initcall(beaglebone_devices_init);
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@ -1,6 +1,7 @@
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#include <init.h>
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#include <sizes.h>
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#include <io.h>
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#include <linux/string.h>
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#include <debug_ll.h>
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#include <asm/barebox-arm-head.h>
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#include <asm/barebox-arm.h>
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@ -102,6 +103,11 @@ static const struct am33xx_emif_regs ddr3_regs = {
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.sdram_ref_ctrl = 0xC30,
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};
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extern char __dtb_am335x_boneblack_start[];
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extern char __dtb_am335x_boneblack_end[];
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extern char __dtb_am335x_bone_start[];
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extern char __dtb_am335x_bone_end[];
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/**
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* @brief The basic entry point for board initialization.
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*
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@ -111,8 +117,22 @@ static const struct am33xx_emif_regs ddr3_regs = {
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*
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* @return void
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*/
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static int beaglebone_board_init(void)
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static noinline int beaglebone_sram_init(void)
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{
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uint32_t fdt, fdt_end, sdram_start, sdram_size;
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sdram_start = 0x80000000;
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if (is_beaglebone_black()) {
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sdram_size = SZ_512M;
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fdt = (uint32_t)__dtb_am335x_boneblack_start;
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fdt_end = (uint32_t)__dtb_am335x_boneblack_end;
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} else {
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sdram_size = SZ_256M;
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fdt = (uint32_t)__dtb_am335x_bone_start;
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fdt_end = (uint32_t)__dtb_am335x_bone_end;
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}
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/* WDT1 is already running when the bootloader gets control
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* Disable it to avoid "random" resets
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*/
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@ -121,9 +141,6 @@ static int beaglebone_board_init(void)
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__raw_writel(WDT_DISABLE_CODE2, AM33XX_WDT_REG(WSPR));
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while(__raw_readl(AM33XX_WDT_REG(WWPS)) != 0x0);
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if (am33xx_running_in_sdram())
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return 0;
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/* Setup the PLLs and the clocks for the peripherals */
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if (is_beaglebone_black()) {
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am33xx_pll_init(MPUPLL_M_500, 24, DDRPLL_M_400);
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omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE);
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putc_ll('>');
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return 0;
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/*
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* Copy the devicetree blob to sdram so that the barebox code finds it
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* inside valid SDRAM instead of SRAM.
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*/
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memcpy((void *)sdram_start, (void *)fdt, fdt_end - fdt);
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fdt = sdram_start;
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barebox_arm_entry(sdram_start, sdram_size, fdt);
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}
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void __bare_init __naked barebox_arm_reset_vector(uint32_t *data)
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ENTRY_FUNCTION(start_am33xx_beaglebone_sram, bootinfo, r1, r2)
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{
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unsigned sdram;
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am33xx_save_bootinfo((void *)bootinfo);
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am33xx_save_bootinfo(data);
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/*
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* Setup C environment, the board init code uses global variables.
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* Stackpointer has already been initialized by the ROM code.
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*/
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relocate_to_current_adr();
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setup_c();
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arm_cpu_lowlevel_init();
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beaglebone_board_init();
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if (is_beaglebone_black())
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sdram = SZ_512M;
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else
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sdram = SZ_256M;
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barebox_arm_entry(0x80000000, sdram, 0);
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beaglebone_sram_init();
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}
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ENTRY_FUNCTION(start_am33xx_beaglebone_sdram, r0, r1, r2)
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{
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uint32_t fdt, sdram_size;
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if (is_beaglebone_black()) {
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sdram_size = SZ_512M;
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fdt = (uint32_t)__dtb_am335x_boneblack_start;
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} else {
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sdram_size = SZ_256M;
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fdt = (uint32_t)__dtb_am335x_bone_start;
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}
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fdt -= get_runtime_offset();
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barebox_arm_entry(0x80000000, sdram_size, fdt);
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}
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@ -1,5 +1,6 @@
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CONFIG_ARCH_OMAP=y
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CONFIG_ARCH_AM33XX=y
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CONFIG_OMAP_MULTI_BOARDS=y
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CONFIG_MACH_BEAGLEBONE=y
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CONFIG_THUMB2_BAREBOX=y
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CONFIG_CMD_ARM_MMUINFO=y
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CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
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@ -63,6 +64,8 @@ CONFIG_NET_DHCP=y
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CONFIG_NET_PING=y
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CONFIG_NET_NETCONSOLE=y
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CONFIG_NET_RESOLV=y
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CONFIG_OFDEVICE=y
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CONFIG_OF_BAREBOX_DRIVERS=y
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CONFIG_DRIVER_SERIAL_NS16550=y
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CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
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CONFIG_DRIVER_NET_CPSW=y
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@ -71,6 +74,8 @@ CONFIG_I2C=y
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CONFIG_I2C_OMAP=y
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CONFIG_MCI=y
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CONFIG_MCI_OMAP_HSMMC=y
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CONFIG_PINCTRL=y
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CONFIG_PINCTRL_SINGLE=y
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CONFIG_FS_TFTP=y
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CONFIG_FS_NFS=y
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CONFIG_FS_FAT=y
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@ -1,28 +1,31 @@
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CONFIG_ARCH_OMAP=y
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CONFIG_ARCH_AM33XX=y
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# CONFIG_OMAP_GPMC is not set
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CONFIG_OMAP_BUILD_IFT=y
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CONFIG_MACH_BEAGLEBONE=y
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CONFIG_THUMB2_BAREBOX=y
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# CONFIG_CMD_ARM_CPUINFO is not set
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# CONFIG_BANNER is not set
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# CONFIG_MEMINFO is not set
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CONFIG_ENVIRONMENT_VARIABLES=y
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CONFIG_MMU=y
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CONFIG_TEXT_BASE=0x402F0400
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CONFIG_STACK_SIZE=0x1600
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CONFIG_MALLOC_SIZE=0x1000000
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CONFIG_TEXT_BASE=0x0
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CONFIG_MALLOC_SIZE=0x0
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CONFIG_MALLOC_TLSF=y
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CONFIG_RELOCATABLE=y
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CONFIG_PROMPT="MLO>"
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CONFIG_SHELL_NONE=y
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# CONFIG_ERRNO_MESSAGES is not set
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# CONFIG_TIMESTAMP is not set
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# CONFIG_DEFAULT_ENVIRONMENT is not set
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CONFIG_OFDEVICE=y
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CONFIG_DRIVER_SERIAL_NS16550=y
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CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
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# CONFIG_SPI is not set
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CONFIG_MCI=y
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# CONFIG_MCI_WRITE is not set
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CONFIG_MCI_OMAP_HSMMC=y
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CONFIG_PINCTRL=y
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CONFIG_PINCTRL_SINGLE=y
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# CONFIG_FS_RAMFS is not set
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# CONFIG_FS_DEVFS is not set
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CONFIG_FS_FAT=y
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@ -26,6 +26,7 @@ dtb-$(CONFIG_ARCH_TEGRA) += \
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BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_BUILTIN_DTB_NAME))
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obj-$(CONFIG_BUILTIN_DTB) += $(BUILTIN_DTB).dtb.o
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pbl-$(CONFIG_MACH_BEAGLEBONE) += am335x-bone.dtb.o am335x-boneblack.dtb.o
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pbl-$(CONFIG_MACH_EFIKA_MX_SMARTBOOK) += imx51-genesi-efika-sb.dtb.o
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pbl-$(CONFIG_MACH_FREESCALE_MX51_PDK) += imx51-babbage.dtb.o
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pbl-$(CONFIG_MACH_FREESCALE_MX53_LOCO) += imx53-qsb.dtb.o
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@ -133,6 +133,7 @@ config MACH_BEAGLE
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config MACH_BEAGLEBONE
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bool "Texas Instrument's Beagle Bone"
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select ARCH_AM33XX
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select HAVE_PBL_MULTI_IMAGES
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help
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Say Y here if you are using Beagle Bone
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@ -15,6 +15,14 @@ pblx-$(CONFIG_MACH_PCM051) += start_am33xx_phytec_phycore_sram
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FILE_barebox-am33xx-phytec-phycore-mlo.img = start_am33xx_phytec_phycore_sram.pblx.mlo
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am33xx-mlo-$(CONFIG_MACH_PCM051) += barebox-am33xx-phytec-phycore-mlo.img
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pblx-$(CONFIG_MACH_BEAGLEBONE) += start_am33xx_beaglebone_sdram
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FILE_barebox-am33xx-beaglebone.img = start_am33xx_beaglebone_sdram.pblx
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am33xx-barebox-$(CONFIG_MACH_BEAGLEBONE) += barebox-am33xx-beaglebone.img
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pblx-$(CONFIG_MACH_BEAGLEBONE) += start_am33xx_beaglebone_sram
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FILE_barebox-am33xx-beaglebone-mlo.img = start_am33xx_beaglebone_sram.pblx.mlo
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am33xx-mlo-$(CONFIG_MACH_BEAGLEBONE) += barebox-am33xx-beaglebone-mlo.img
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ifdef CONFIG_OMAP_BUILD_IFT
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image-y += $(am33xx-mlo-y)
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else
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