dts: update to v4.4
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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b9b0a2b095
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a0da52f83c
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@ -25,9 +25,9 @@
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cache-sets = <512>;
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cache-line-size = <32>;
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/* At full speed latency must be >=2 */
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arm,tag-latency = <2>;
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arm,data-latency = <2 2>;
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arm,dirty-latency = <2>;
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arm,tag-latency = <8>;
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arm,data-latency = <8 8>;
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arm,dirty-latency = <8>;
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};
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mtu0: mtu@101e2000 {
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@ -110,7 +110,11 @@
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interrupt-parent = <&vic>;
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interrupts = <31>; /* Cascaded to vic */
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clear-mask = <0xffffffff>;
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valid-mask = <0xffc203f8>;
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/*
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* Valid interrupt lines mask according to
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* table 4-36 page 4-50 of ARM DUI 0225D
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*/
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valid-mask = <0x0760031b>;
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};
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dma@10130000 {
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@ -266,8 +270,8 @@
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};
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mmc@5000 {
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compatible = "arm,pl180", "arm,primecell";
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reg = < 0x5000 0x1000>;
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interrupts-extended = <&vic 22 &sic 2>;
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reg = <0x5000 0x1000>;
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interrupts-extended = <&vic 22 &sic 1>;
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clocks = <&xtal24mhz>, <&pclk>;
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clock-names = "mclk", "apb_pclk";
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};
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@ -5,6 +5,16 @@
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compatible = "arm,versatile-pb";
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amba {
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/* The Versatile PB is using more SIC IRQ lines than the AB */
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sic: intc@10003000 {
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clear-mask = <0xffffffff>;
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/*
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* Valid interrupt lines mask according to
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* figure 3-30 page 3-74 of ARM DUI 0224B
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*/
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valid-mask = <0x7fe003ff>;
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};
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gpio2: gpio@101e6000 {
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compatible = "arm,pl061", "arm,primecell";
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reg = <0x101e6000 0x1000>;
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@ -67,6 +77,13 @@
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};
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fpga {
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mmc@5000 {
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/*
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* Overrides the interrupt assignment from
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* the Versatile AB board file.
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*/
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interrupts-extended = <&sic 22 &sic 23>;
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};
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uart@9000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x9000 0x1000>;
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@ -86,7 +103,8 @@
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mmc@b000 {
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compatible = "arm,pl180", "arm,primecell";
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reg = <0xb000 0x1000>;
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interrupts-extended = <&vic 23 &sic 2>;
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interrupt-parent = <&sic>;
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interrupts = <1>, <2>;
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clocks = <&xtal24mhz>, <&pclk>;
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clock-names = "mclk", "apb_pclk";
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};
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@ -187,6 +187,15 @@
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interrupts = <43>;
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};
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sdhc@d800a000 {
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compatible = "wm,wm8505-sdhc";
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reg = <0xd800a000 0x400>;
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interrupts = <20>, <21>;
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clocks = <&clksdhc>;
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bus-width = <4>;
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sdon-inverted;
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};
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fb: fb@d8050800 {
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compatible = "wm,wm8505-fb";
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reg = <0xd8050800 0x200>;
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