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* Patch by Martin Krause, 09 Oct 2003:

Fixes for TRAB board
  - /board/trab/rs485.c: correct baudrate
  - /board/trab/cmd_trab.c: bug fix for problem with timer overflow in
    udelay(); fix some timing problems with adc controller
  - /board/trab/trab_fkt.c: add new commands: gain, eeprom and power;
    modify commands: touch and buzzer

* Disable CONFIG_SUPPORT_VFAT when used with CONFIG_AUTO_UPDATE
  (quick & dirty workaround for rogue pointer problem in get_vfatname());
  Use direct function calls for auto_update instead of hush commands
This commit is contained in:
wdenk 2003-10-09 13:16:55 +00:00
parent 4a5517094d
commit a0ff7f2eda
7 changed files with 1356 additions and 1000 deletions

View File

@ -2,6 +2,18 @@
Changes for U-Boot 1.0.0:
======================================================================
* Patch by Martin Krause, 09 Oct 2003:
Fixes for TRAB board
- /board/trab/rs485.c: correct baudrate
- /board/trab/cmd_trab.c: bug fix for problem with timer overflow in
udelay(); fix some timing problems with adc controller
- /board/trab/trab_fkt.c: add new commands: gain, eeprom and power;
modify commands: touch and buzzer
* Disable CONFIG_SUPPORT_VFAT when used with CONFIG_AUTO_UPDATE
(quick & dirty workaround for rogue pointer problem in get_vfatname());
Use direct function calls for auto_update instead of hush commands
* Patch by Scott McNutt, 04 Oct 2003:
- add support for Altera Nios-32 CPU
- add support for Nios Cyclone Development Kit (DK-1C20)

View File

@ -183,9 +183,7 @@ struct flash_layout aufl_layout[AU_MAXFILES - 3] = { \
#define FIDX_TO_LIDX(idx) ((idx) - 2)
/* where to load files into memory */
#define LOAD_ADDR ((unsigned char *)0x0C100100)
/* where to build strings in memory - 256 bytes should be enough */
#define STRING_ADDR ((char *)0x0C100000)
#define LOAD_ADDR ((unsigned char *)0x0C100000)
/* the app is the largest image */
#define MAX_LOADSZ ausize[IDX_APP]
@ -199,6 +197,9 @@ extern int i2c_write (uchar, uint, int , uchar* , int);
extern int trab_vfd (ulong);
extern int transfer_pic(unsigned char, unsigned char *, int, int);
#endif
extern int flash_sect_erase(ulong, ulong);
extern int flash_sect_protect (int, ulong, ulong);
extern int flash_write (uchar *, ulong, ulong);
/* change char* to void* to shutup the compiler */
extern int i2c_write_multiple (uchar, uint, int, void *, int);
extern int i2c_read_multiple (uchar, uint, int, void *, int);
@ -305,13 +306,12 @@ au_check_valid(int idx, long nbytes)
#define POWER_OFF (1 << 1)
int
au_do_update(int idx, long sz, int repeat)
au_do_update(int idx, long sz)
{
image_header_t *hdr;
char *addr;
long start, end;
char *strbuf = STRING_ADDR;
int off;
int off, rc;
uint nbytes;
hdr = (image_header_t *)LOAD_ADDR;
@ -342,20 +342,14 @@ au_do_update(int idx, long sz, int repeat)
start = aufl_layout[1].start;
end = aufl_layout[1].end;
#endif
debug ("protect off %lx %lx\n", start, end);
sprintf(strbuf, "protect off %lx %lx\n", start, end);
parse_string_outer(strbuf, FLAG_PARSE_SEMICOLON);
flash_sect_protect(0, start, end);
}
/*
* erase the address range. Multiple erases seem to cause
* problems.
* erase the address range.
*/
if (repeat == 0) {
debug ("erase %lx %lx\n", start, end);
sprintf(strbuf, "erase %lx %lx\n", start, end);
parse_string_outer(strbuf, FLAG_PARSE_SEMICOLON);
}
debug ("flash_sect_erase(%lx, %lx);\n", start, end);
flash_sect_erase(start, end);
wait_ms(100);
/* strip the header - except for the kernel and app */
if (idx == IDX_FIRMWARE || idx == IDX_DISK) {
@ -374,9 +368,12 @@ au_do_update(int idx, long sz, int repeat)
}
/* copy the data from RAM to FLASH */
debug ("cp.b %p %lx %x\n", addr, start, nbytes);
sprintf(strbuf, "cp.b %p %lx %x\n", addr, start, nbytes);
parse_string_outer(strbuf, FLAG_PARSE_SEMICOLON);
debug ("flash_write(%p, %lx %x)\n", addr, start, nbytes);
rc = flash_write(addr, start, nbytes);
if (rc != 0) {
printf("Flashing failed due to error %d\n", rc);
return -1;
}
/* check the dcrc of the copy */
if (crc32 (0, (char *)(start + off), ntohl(hdr->ih_size)) != ntohl(hdr->ih_dcrc)) {
@ -386,11 +383,8 @@ au_do_update(int idx, long sz, int repeat)
/* protect the address range */
/* this assumes that ONLY the firmware is protected! */
if (idx == IDX_FIRMWARE) {
debug ("protect on %lx %lx\n", start, end);
sprintf(strbuf, "protect on %lx %lx\n", start, end);
parse_string_outer(strbuf, FLAG_PARSE_SEMICOLON);
}
if (idx == IDX_FIRMWARE)
flash_sect_protect(1, start, end);
return 0;
}
@ -587,7 +581,7 @@ do_auto_update(void)
cnt = 0;
got_ctrlc = 0;
do {
res = au_do_update(i, sz, cnt);
res = au_do_update(i, sz);
/* let the user break out of the loop */
if (ctrlc() || had_ctrlc()) {
clear_ctrlc();

File diff suppressed because it is too large Load Diff

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@ -47,8 +47,8 @@ static void rs485_setbrg (void)
unsigned int reg = 0;
/* value is calculated so : (int)(PCLK/16./baudrate) -1 */
/* reg = (33000000 / (16 * gd->baudrate)) - 1; */
reg = (33000000 / (16 * 38.400)) - 1;
/* reg = (33000000 / (16 * gd->baudrate)) - 1; */
reg = (33000000 / (16 * 38400)) - 1;
/* FIFO enable, Tx/Rx FIFO clear */
uart->UFCON = 0x07;
@ -67,18 +67,18 @@ static void rs485_setbrg (void)
static void rs485_cfgio (void)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
gpio->PFCON &= ~(0x3 << 2);
gpio->PFCON |= (0x2 << 2); /* configure GPF1 as RXD1 */
gpio->PFCON &= ~(0x3 << 2);
gpio->PFCON |= (0x2 << 2); /* configure GPF1 as RXD1 */
gpio->PFCON &= ~(0x3 << 6);
gpio->PFCON |= (0x2 << 6); /* configure GPF3 as TXD1 */
gpio->PFCON &= ~(0x3 << 6);
gpio->PFCON |= (0x2 << 6); /* configure GPF3 as TXD1 */
gpio->PFUP |= (1 << 1); /* disable pullup on GPF1 */
gpio->PFUP |= (1 << 3); /* disable pullup on GPF3 */
gpio->PFUP |= (1 << 1); /* disable pullup on GPF1 */
gpio->PFUP |= (1 << 3); /* disable pullup on GPF3 */
gpio->PACON &= ~(1 << 11); /* set GPA11 (RS485_DE) to output */
gpio->PACON &= ~(1 << 11); /* set GPA11 (RS485_DE) to output */
}
/*
@ -88,8 +88,8 @@ static void rs485_cfgio (void)
*/
int rs485_init (void)
{
rs485_cfgio ();
rs485_setbrg ();
rs485_cfgio ();
rs485_setbrg ();
return (0);
}
@ -168,13 +168,13 @@ static void set_rs485re(unsigned char rs485re_state)
static void set_rs485de(unsigned char rs485de_state)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
/* This is on PORT A bit 11 */
if(rs485de_state)
gpio->PADAT |= (1 << 11);
else
gpio->PADAT &= ~(1 << 11);
/* This is on PORT A bit 11 */
if(rs485de_state)
gpio->PADAT |= (1 << 11);
else
gpio->PADAT &= ~(1 << 11);
}

File diff suppressed because it is too large Load Diff

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@ -33,6 +33,11 @@
#if (CONFIG_COMMANDS & CFG_CMD_FAT)
#ifdef CONFIG_AUTO_UPDATE
/* the VFAT code has a bug which breaks auto update */
#undef CONFIG_SUPPORT_VFAT
#endif
/*
* Convert a string to lowercase.
*/

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@ -182,7 +182,7 @@
#define CONFIG_IPADDR 192.168.3.68
#define CONFIG_HOSTNAME trab
#define CONFIG_SERVERIP 192.168.3.1
#define CONFIG_BOOTCOMMAND "run flash_nfs"
#define CONFIG_BOOTCOMMAND "burn_in"
#ifndef CONFIG_FLASH_8MB /* current config: 16 MB flash */
#ifdef CFG_HUSH_PARSER
@ -331,9 +331,13 @@
#define CONFIG_MISC_INIT_R /* have misc_init_r() function */
/*-----------------------------------------------------------------------
* burn-in test stuff
* burn-in test stuff.
*
* BURN_IN_CYCLE_DELAY defines the seconds to wait between each burn-in cycle
* Because the burn-in test itself causes also an delay of about 4 seconds,
* this time must be subtracted from the desired overall burn-in cycle time.
*/
#define BURN_IN_CYCLE_DELAY 20 /* delay in sec between burn-in test cycles */
#define BURN_IN_CYCLE_DELAY 296 /* seconds between burn-in cycles */
/*-----------------------------------------------------------------------
* Stack sizes