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ARM i.MX21: Fix CSPI parent clock 

It's perclk2, not perclk3

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sascha Hauer 2012-09-29 14:08:42 +02:00
parent 0b177de1a4
commit aab96efadc
1 changed files with 1 additions and 1 deletions
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2
arch/arm/mach-imx/clk-imx21.c
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@ -98,10 +98,10 @@ static int imx21_ccm_probe(struct device_d *dev)
clkdev_add_physbase(clks[per1], MX21_UART4_BASE_ADDR, NULL);
clkdev_add_physbase(clks[per2], MX21_CSPI1_BASE_ADDR, NULL);
clkdev_add_physbase(clks[per2], MX21_CSPI2_BASE_ADDR, NULL);
clkdev_add_physbase(clks[per2], MX21_CSPI3_BASE_ADDR, NULL);
clkdev_add_physbase(clks[ipg], MX21_I2C_BASE_ADDR, NULL);
clkdev_add_physbase(clks[ipg], MX21_SDHC1_BASE_ADDR, NULL);
clkdev_add_physbase(clks[ipg], MX21_SDHC2_BASE_ADDR, NULL);
clkdev_add_physbase(clks[per3], MX21_CSPI3_BASE_ADDR, NULL);
clkdev_add_physbase(clks[per3], MX21_LCDC_BASE_ADDR, NULL);
return 0;