Merge branch 'for-next/pcm038'
This commit is contained in:
commit
ae98200133
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@ -32,7 +32,6 @@
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#include <fcntl.h>
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#include <nand.h>
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#include <spi/spi.h>
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#include <mfd/mc13xxx.h>
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#include <io.h>
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#include <asm/mmu.h>
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#include <mach/imx5.h>
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@ -40,6 +40,7 @@
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#include <mach/spi.h>
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#include <mach/iomux-mx27.h>
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#include <mach/devices-imx27.h>
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#include <mach/iim.h>
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#include <mfd/mc13xxx.h>
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#include "pll.h"
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@ -124,7 +125,6 @@ static inline uint32_t get_pll_spctl10(void)
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*/
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static int pcm038_power_init(void)
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{
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#ifdef CONFIG_MFD_MC13XXX
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uint32_t spctl0 = get_pll_spctl10();
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struct mc13xxx *mc13xxx = mc13xxx_get();
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@ -146,6 +146,22 @@ static int pcm038_power_init(void)
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MC13783_SW1B_SOFTSTART |
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MC13783_SW_PLL_FACTOR(32));
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/* Setup VMMC voltage */
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if (IS_ENABLED(CONFIG_MCI_IMX)) {
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u32 val;
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mc13xxx_reg_read(mc13xxx, MC13783_REG_REG_SETTING(1), &val);
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/* VMMC1 = 3.00 V */
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val &= ~(7 << 6);
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val |= 6 << 6;
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mc13xxx_reg_write(mc13xxx, MC13783_REG_REG_SETTING(1), val);
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mc13xxx_reg_read(mc13xxx, MC13783_REG_REG_MODE(1), &val);
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/* Enable VMMC1 */
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val |= 1 << 18;
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mc13xxx_reg_write(mc13xxx, MC13783_REG_REG_MODE(1), val);
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}
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/* wait for required power level to run the CPU at 400 MHz */
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udelay(100000);
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CSCR = CSCR_VAL_FINAL;
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@ -158,7 +174,6 @@ static int pcm038_power_init(void)
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printf("Failed to initialize PMIC. Will continue with low CPU speed\n");
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}
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}
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#endif
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/* clock gating enable */
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GPCR = 0x00050f08;
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@ -179,6 +194,7 @@ mem_initcall(pcm038_mem_init);
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static int pcm038_devices_init(void)
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{
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int i;
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u64 uid = 0;
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char *envdev;
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unsigned int mode[] = {
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@ -237,6 +253,19 @@ static int pcm038_devices_init(void)
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PA29_PF_VSYNC,
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PA30_PF_CONTRAST,
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PA31_PF_OE_ACD,
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/* OTG host */
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PC7_PF_USBOTG_DATA5,
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PC8_PF_USBOTG_DATA6,
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PC9_PF_USBOTG_DATA0,
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PC10_PF_USBOTG_DATA2,
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PC11_PF_USBOTG_DATA1,
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PC12_PF_USBOTG_DATA4,
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PC13_PF_USBOTG_DATA3,
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PE0_PF_USBOTG_NXT,
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PE1_PF_USBOTG_STP,
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PE2_PF_USBOTG_DIR,
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PE24_PF_USBOTG_CLK,
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PE25_PF_USBOTG_DATA7,
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/* I2C1 */
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PD17_PF_I2C_DATA | GPIO_PUEN,
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PD18_PF_I2C_CLK,
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@ -302,6 +331,8 @@ static int pcm038_devices_init(void)
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printf("Using environment in %s Flash\n", envdev);
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if (imx_iim_read(1, 1, &uid, 6) == 6)
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armlinux_set_serial(uid);
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armlinux_set_bootparams((void *)0xa0000100);
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armlinux_set_architecture(MACH_TYPE_PCM038);
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@ -23,6 +23,7 @@
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#include <mach/imx-regs.h>
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#include <mach/iomux-mx27.h>
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#include <mach/gpio.h>
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#include <mach/devices-imx27.h>
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#include <usb/ulpi.h>
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#define GPIO_IDE_POWER (GPIO_PORTE + 18)
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@ -148,6 +149,26 @@ static void pcm970_ide_init(void)
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}
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#endif
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static void pcm970_mmc_init(void)
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{
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uint32_t i;
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unsigned int mode[] = {
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/* SD2 */
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PB4_PF_SD2_D0,
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PB5_PF_SD2_D1,
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PB6_PF_SD2_D2,
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PB7_PF_SD2_D3,
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PB8_PF_SD2_CMD,
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PB9_PF_SD2_CLK,
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};
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for (i = 0; i < ARRAY_SIZE(mode); i++)
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imx_gpio_mode(mode[i]);
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PCCR0 |= PCCR0_SDHC2_EN;
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imx27_add_mmc1(NULL);
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}
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static int pcm970_init(void)
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{
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int i;
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@ -181,6 +202,9 @@ static int pcm970_init(void)
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pcm970_ide_init();
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#endif
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if (IS_ENABLED(CONFIG_MCI_IMX))
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pcm970_mmc_init();
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return 0;
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}
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@ -163,10 +163,31 @@ struct mc13xxx {
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int revision;
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};
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#ifdef CONFIG_MFD_MC13XXX
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extern struct mc13xxx *mc13xxx_get(void);
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extern int mc13xxx_reg_read(struct mc13xxx *mc13xxx, u8 reg, u32 *val);
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extern int mc13xxx_reg_write(struct mc13xxx *mc13xxx, u8 reg, u32 val);
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extern int mc13xxx_set_bits(struct mc13xxx *mc13xxx, u8 reg, u32 mask, u32 val);
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#else
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static inline struct mc13xxx *mc13xxx_get(void)
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{
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return NULL;
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}
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static inline int mc13xxx_reg_read(struct mc13xxx *mc13xxx, u8 reg, u32 *val)
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{
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return -ENODEV;
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}
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static inline int mc13xxx_reg_write(struct mc13xxx *mc13xxx, u8 reg, u32 val)
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{
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return -ENODEV;
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}
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static inline int mc13xxx_set_bits(struct mc13xxx *mc13xxx, u8 reg, u32 mask, u32 val)
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{
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return -ENODEV;
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}
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#endif
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#endif /* __MFD_MC13XXX_H */
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