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Merge branch 'master' into next

This commit is contained in:
Sascha Hauer 2011-08-15 09:47:55 +02:00
parent c78ef640cd ad8d12dd66
commit b7a3e55915
29 changed files with 188 additions and 158 deletions
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2
Makefile
View File

@ -1,5 +1,5 @@
VERSION = 2011
PATCHLEVEL = 07
PATCHLEVEL = 08
SUBLEVEL = 0
EXTRAVERSION =
NAME = Amissive Actinocutious Kiwi

1
arch/arm/Kconfig
View File

@ -34,6 +34,7 @@ choice
config ARCH_AT91
bool "Atmel AT91"
select GENERIC_GPIO
select CLKDEV_LOOKUP
config ARCH_EP93XX
bool "Cirrus Logic EP93xx"

1
arch/arm/boards/at91sam9261ek/init.c
View File

@ -43,6 +43,7 @@ static struct atmel_nand_data nand_pdata = {
.ale = 22,
.cle = 21,
/* .det_pin = ... not connected */
.ecc_mode = NAND_ECC_SOFT,
.rdy_pin = AT91_PIN_PC15,
.enable_pin = AT91_PIN_PC14,
#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)

11
arch/arm/mach-at91/at91rm9200.c
View File

@ -157,6 +157,14 @@ static struct clk *periph_clocks[] __initdata = {
// irq0 .. irq6
};
static struct clk_lookup usart_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("usart", "atmel_usart0", &mck),
CLKDEV_CON_DEV_ID("usart", "atmel_usart1", &usart0_clk),
CLKDEV_CON_DEV_ID("usart", "atmel_usart2", &usart1_clk),
CLKDEV_CON_DEV_ID("usart", "atmel_usart3", &usart2_clk),
CLKDEV_CON_DEV_ID("usart", "atmel_usart4", &usart3_clk),
};
/*
* The four programmable clocks.
* You must configure pin multiplexing to bring these signals out.
@ -193,6 +201,9 @@ static void __init at91rm9200_register_clocks(void)
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
clk_register(periph_clocks[i]);
clkdev_add_table(usart_clocks_lookups,
ARRAY_SIZE(usart_clocks_lookups));
clk_register(&pck0);
clk_register(&pck1);
clk_register(&pck2);

10
arch/arm/mach-at91/at91rm9200_devices.c
View File

@ -182,37 +182,30 @@ static inline void configure_usart3_pins(unsigned pins)
void __init at91_register_uart(unsigned id, unsigned pins)
{
resource_size_t start;
struct device_d *dev;
char* clk_name;
switch (id) {
case 0: /* DBGU */
configure_dbgu_pins();
start = AT91_BASE_SYS + AT91_DBGU;
clk_name = "mck";
id = 0;
break;
case AT91RM9200_ID_US0:
configure_usart0_pins(pins);
clk_name = "usart0_clk";
start = AT91RM9200_BASE_US0;
id = 1;
break;
case AT91RM9200_ID_US1:
configure_usart1_pins(pins);
clk_name = "usart1_clk";
start = AT91RM9200_BASE_US1;
id = 2;
break;
case AT91RM9200_ID_US2:
configure_usart2_pins(pins);
clk_name = "usart2_clk";
start = AT91RM9200_BASE_US2;
id = 3;
break;
case AT91RM9200_ID_US3:
configure_usart3_pins(pins);
clk_name = "usart3_clk";
start = AT91RM9200_BASE_US3;
id = 4;
break;
@ -220,7 +213,6 @@ void __init at91_register_uart(unsigned id, unsigned pins)
return;
}
dev = add_generic_device("atmel_serial", id, NULL, start, 4096,
add_generic_device("atmel_usart", id, NULL, start, 4096,
IORESOURCE_MEM, NULL);
at91_clock_associate(clk_name, dev, "usart");
}

13
arch/arm/mach-at91/at91sam9260.c
View File

@ -169,6 +169,16 @@ static struct clk *periph_clocks[] = {
// irq0 .. irq2
};
static struct clk_lookup usart_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("usart", "atmel_usart0", &mck),
CLKDEV_CON_DEV_ID("usart", "atmel_usart1", &usart0_clk),
CLKDEV_CON_DEV_ID("usart", "atmel_usart2", &usart1_clk),
CLKDEV_CON_DEV_ID("usart", "atmel_usart3", &usart2_clk),
CLKDEV_CON_DEV_ID("usart", "atmel_usart4", &usart3_clk),
CLKDEV_CON_DEV_ID("usart", "atmel_usart5", &usart4_clk),
CLKDEV_CON_DEV_ID("usart", "atmel_usart6", &usart5_clk),
};
/*
* The two programmable clocks.
* You must configure pin multiplexing to bring these signals out.
@ -193,6 +203,9 @@ static void __init at91sam9260_register_clocks(void)
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
clk_register(periph_clocks[i]);
clkdev_add_table(usart_clocks_lookups,
ARRAY_SIZE(usart_clocks_lookups));
clk_register(&pck0);
clk_register(&pck1);
}

12
arch/arm/mach-at91/at91sam9260_devices.c
View File

@ -165,49 +165,40 @@ static inline void configure_usart5_pins(void)
void at91_register_uart(unsigned id, unsigned pins)
{
resource_size_t start;
struct device_d *dev;
char* clk_name;
switch (id) {
case 0: /* DBGU */
configure_dbgu_pins();
start = AT91_BASE_SYS + AT91_DBGU;
clk_name = "mck";
id = 0;
break;
case AT91SAM9260_ID_US0:
configure_usart0_pins(pins);
clk_name = "usart0_clk";
start = AT91SAM9260_BASE_US0;
id = 1;
break;
case AT91SAM9260_ID_US1:
configure_usart1_pins(pins);
clk_name = "usart1_clk";
start = AT91SAM9260_BASE_US1;
id = 2;
break;
case AT91SAM9260_ID_US2:
configure_usart2_pins(pins);
clk_name = "usart2_clk";
start = AT91SAM9260_BASE_US2;
id = 3;
break;
case AT91SAM9260_ID_US3:
configure_usart3_pins(pins);
clk_name = "usart3_clk";
start = AT91SAM9260_BASE_US3;
id = 4;
break;
case AT91SAM9260_ID_US4:
configure_usart4_pins();
clk_name = "usart4_clk";
start = AT91SAM9260_BASE_US4;
id = 5;
break;
case AT91SAM9260_ID_US5:
configure_usart5_pins();
clk_name = "usart5_clk";
start = AT91SAM9260_BASE_US5;
id = 6;
break;
@ -215,9 +206,8 @@ void at91_register_uart(unsigned id, unsigned pins)
return;
}
dev = add_generic_device("atmel_serial", id, NULL, start, 4096,
add_generic_device("atmel_usart", id, NULL, start, 4096,
IORESOURCE_MEM, NULL);
at91_clock_associate(clk_name, dev, "usart");
}
#if defined(CONFIG_MCI_ATMEL)

10
arch/arm/mach-at91/at91sam9261.c
View File

@ -133,6 +133,13 @@ static struct clk *periph_clocks[] = {
// irq0 .. irq2
};
static struct clk_lookup usart_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("usart", "atmel_usart0", &mck),
CLKDEV_CON_DEV_ID("usart", "atmel_usart1", &usart0_clk),
CLKDEV_CON_DEV_ID("usart", "atmel_usart2", &usart1_clk),
CLKDEV_CON_DEV_ID("usart", "atmel_usart3", &usart2_clk),
};
/*
* The four programmable clocks.
* You must configure pin multiplexing to bring these signals out.
@ -183,6 +190,9 @@ static void at91sam9261_register_clocks(void)
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
clk_register(periph_clocks[i]);
clkdev_add_table(usart_clocks_lookups,
ARRAY_SIZE(usart_clocks_lookups));
clk_register(&pck0);
clk_register(&pck1);
clk_register(&pck2);

10
arch/arm/mach-at91/at91sam9261_devices.c
View File

@ -101,31 +101,25 @@ static inline void configure_usart2_pins(unsigned pins)
void at91_register_uart(unsigned id, unsigned pins)
{
resource_size_t start;
struct device_d *dev;
char* clk_name;
switch (id) {
case 0: /* DBGU */
configure_dbgu_pins();
start = AT91_BASE_SYS + AT91_DBGU;
clk_name = "mck";
id = 0;
break;
case AT91SAM9261_ID_US0:
configure_usart0_pins(pins);
clk_name = "usart0_clk";
start = AT91SAM9261_BASE_US0;
id = 1;
break;
case AT91SAM9261_ID_US1:
configure_usart1_pins(pins);
clk_name = "usart1_clk";
start = AT91SAM9261_BASE_US1;
id = 2;
break;
case AT91SAM9261_ID_US2:
configure_usart2_pins(pins);
clk_name = "usart3_clk";
start = AT91SAM9261_BASE_US2;
id = 3;
break;
@ -133,9 +127,8 @@ void at91_register_uart(unsigned id, unsigned pins)
return;
}
dev = add_generic_device("atmel_serial", id, NULL, start, 4096,
add_generic_device("atmel_usart", id, NULL, start, 4096,
IORESOURCE_MEM, NULL);
at91_clock_associate(clk_name, dev, "usart");
}
#if defined(CONFIG_MCI_ATMEL)
@ -176,7 +169,6 @@ void at91_add_device_mci(short mmc_id, struct atmel_mci_platform_data *data)
dev = add_generic_device("atmel_mci", 0, NULL, AT91SAM9261_BASE_MCI, SZ_16K,
IORESOURCE_MEM, data);
at91_clock_associate("mci_clk", dev, "mci_clk");
}
#else
void at91_add_device_mci(short mmc_id, struct atmel_mci_platform_data *data) {}

17
arch/arm/mach-at91/at91sam9263.c
View File

@ -163,6 +163,18 @@ static struct clk *periph_clocks[] = {
// irq0 .. irq1
};
static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("mci_clk", "at91_mci0", &mmc0_clk),
CLKDEV_CON_DEV_ID("mci_clk", "at91_mci1", &mmc1_clk),
};
static struct clk_lookup usart_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("usart", "atmel_usart0", &mck),
CLKDEV_CON_DEV_ID("usart", "atmel_usart1", &usart0_clk),
CLKDEV_CON_DEV_ID("usart", "atmel_usart2", &usart1_clk),
CLKDEV_CON_DEV_ID("usart", "atmel_usart3", &usart2_clk),
};
/*
* The four programmable clocks.
* You must configure pin multiplexing to bring these signals out.
@ -199,6 +211,11 @@ static void __init at91sam9263_register_clocks(void)
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
clk_register(periph_clocks[i]);
clkdev_add_table(periph_clocks_lookups,
ARRAY_SIZE(periph_clocks_lookups));
clkdev_add_table(usart_clocks_lookups,
ARRAY_SIZE(usart_clocks_lookups));
clk_register(&pck0);
clk_register(&pck1);
clk_register(&pck2);

17
arch/arm/mach-at91/at91sam9263_devices.c
View File

@ -133,31 +133,25 @@ static inline void configure_usart2_pins(unsigned pins)
void at91_register_uart(unsigned id, unsigned pins)
{
resource_size_t start;
struct device_d *dev;
char* clk_name;
switch (id) {
case 0: /* DBGU */
configure_dbgu_pins();
start = AT91_BASE_SYS + AT91_DBGU;
clk_name = "mck";
id = 0;
break;
case AT91SAM9263_ID_US0:
configure_usart0_pins(pins);
clk_name = "usart0_clk";
start = AT91SAM9263_BASE_US0;
id = 1;
break;
case AT91SAM9263_ID_US1:
configure_usart1_pins(pins);
clk_name = "usart1_clk";
start = AT91SAM9263_BASE_US1;
id = 2;
break;
case AT91SAM9263_ID_US2:
configure_usart2_pins(pins);
clk_name = "usart2_clk";
start = AT91SAM9263_BASE_US2;
id = 3;
break;
@ -165,10 +159,8 @@ void at91_register_uart(unsigned id, unsigned pins)
return;
}
dev = add_generic_device("atmel_serial", id, NULL, start, 4096,
add_generic_device("atmel_usart", id, NULL, start, 4096,
IORESOURCE_MEM, NULL);
at91_clock_associate(clk_name, dev, "usart");
}
#if defined(CONFIG_MCI_ATMEL)
@ -176,8 +168,6 @@ void at91_register_uart(unsigned id, unsigned pins)
void at91_add_device_mci(short mmc_id, struct atmel_mci_platform_data *data)
{
resource_size_t start;
struct device_d *dev;
char* clk_name;
if (!data)
return;
@ -197,7 +187,6 @@ void at91_add_device_mci(short mmc_id, struct atmel_mci_platform_data *data)
if (mmc_id == 0) { /* MCI0 */
start = AT91SAM9263_BASE_MCI0;
clk_name = "mci0_clk";
/* CLK */
at91_set_A_periph(AT91_PIN_PA12, 0);
@ -213,7 +202,6 @@ void at91_add_device_mci(short mmc_id, struct atmel_mci_platform_data *data)
}
} else { /* MCI1 */
start = AT91SAM9263_BASE_MCI1;
clk_name = "mci1_clk";
/* CLK */
at91_set_A_periph(AT91_PIN_PA6, 0);
@ -229,9 +217,8 @@ void at91_add_device_mci(short mmc_id, struct atmel_mci_platform_data *data)
}
}
dev = add_generic_device("atmel_mci", mmc_id, NULL, start, 4096,
add_generic_device("atmel_mci", mmc_id, NULL, start, 4096,
IORESOURCE_MEM, data);
at91_clock_associate(clk_name, dev, "mci_clk");
}
#else
void at91_add_device_mci(short mmc_id, struct atmel_mci_platform_data *data) {}

36
arch/arm/mach-at91/at91sam9g45.c
View File

@ -154,22 +154,6 @@ static struct clk vdec_clk = {
.type = CLK_TYPE_PERIPHERAL,
};
/* One additional fake clock for ohci */
static struct clk ohci_clk = {
.name = "ohci_clk",
.pmc_mask = 0,
.type = CLK_TYPE_PERIPHERAL,
.parent = &uhphs_clk,
};
/* One additional fake clock for second TC block */
static struct clk tcb1_clk = {
.name = "tcb1_clk",
.pmc_mask = 0,
.type = CLK_TYPE_PERIPHERAL,
.parent = &tcb0_clk,
};
static struct clk *periph_clocks[] __initdata = {
&pioA_clk,
&pioB_clk,
@ -202,6 +186,21 @@ static struct clk *periph_clocks[] __initdata = {
&tcb1_clk,
};
static struct clk_lookup periph_clocks_lookups[] = {
/* One additional fake clock for ohci */
CLKDEV_CON_ID("ohci_clk", &uhphs_clk),
CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci0", &mmc0_clk),
CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci1", &mmc1_clk),
};
static struct clk_lookup usart_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("usart", "atmel_usart0", &mck),
CLKDEV_CON_DEV_ID("usart", "atmel_usart1", &usart0_clk),
CLKDEV_CON_DEV_ID("usart", "atmel_usart2", &usart1_clk),
CLKDEV_CON_DEV_ID("usart", "atmel_usart3", &usart2_clk),
CLKDEV_CON_DEV_ID("usart", "atmel_usart4", &usart3_clk),
};
/*
* The two programmable clocks.
* You must configure pin multiplexing to bring these signals out.
@ -226,6 +225,11 @@ static void __init at91sam9g45_register_clocks(void)
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
clk_register(periph_clocks[i]);
clkdev_add_table(periph_clocks_lookups,
ARRAY_SIZE(periph_clocks_lookups));
clkdev_add_table(usart_clocks_lookups,
ARRAY_SIZE(usart_clocks_lookups));
if (cpu_is_at91sam9m10() || cpu_is_at91sam9m11())
clk_register(&vdec_clk);

11
arch/arm/mach-at91/at91sam9g45_devices.c
View File

@ -148,37 +148,30 @@ static inline void configure_usart3_pins(unsigned pins)
void at91_register_uart(unsigned id, unsigned pins)
{
resource_size_t start;
struct device_d *dev;
char* clk_name;
switch (id) {
case 0: /* DBGU */
configure_dbgu_pins();
start = AT91_BASE_SYS + AT91_DBGU;
clk_name = "mck";
id = 0;
break;
case AT91SAM9G45_ID_US0:
configure_usart0_pins(pins);
clk_name = "usart0_clk";
start = AT91SAM9G45_BASE_US0;
id = 1;
break;
case AT91SAM9G45_ID_US1:
configure_usart1_pins(pins);
clk_name = "usart1_clk";
start = AT91SAM9G45_BASE_US1;
id = 2;
break;
case AT91SAM9G45_ID_US2:
configure_usart2_pins(pins);
clk_name = "usart2_clk";
start = AT91SAM9G45_BASE_US2;
id = 3;
break;
case AT91SAM9G45_ID_US3:
configure_usart3_pins(pins);
clk_name = "usart3_clk";
start = AT91SAM9G45_BASE_US3;
id = 4;
break;
@ -186,10 +179,8 @@ void at91_register_uart(unsigned id, unsigned pins)
return;
}
dev = add_generic_device("atmel_serial", id, NULL, start, 4096,
add_generic_device("atmel_usart", id, NULL, start, 4096,
IORESOURCE_MEM, NULL);
at91_clock_associate(clk_name, dev, "usart");
}
#if defined(CONFIG_MCI_ATMEL)

70
arch/arm/mach-at91/clock.c
View File

@ -155,7 +155,7 @@ static struct clk udpck = {
.parent = &pllb,
.mode = pmc_sys_mode,
};
static struct clk utmi_clk = {
struct clk utmi_clk = {
.name = "utmi_clk",
.parent = &main_clk,
.pmc_mask = AT91_PMC_UPLLEN, /* in CKGR_UCKR */
@ -174,7 +174,7 @@ static struct clk uhpck = {
* memory, interfaces to on-chip peripherals, the AIC, and sometimes more
* (e.g baud rate generation). It's sourced from one of the primary clocks.
*/
static struct clk mck = {
struct clk mck = {
.name = "mck",
.pmc_mask = AT91_PMC_MCKRDY, /* in PMC_SR */
};
@ -207,43 +207,6 @@ static struct clk *at91_css_to_clk(unsigned long css)
return NULL;
}
/*
* Associate a particular clock with a function (eg, "uart") and device.
* The drivers can then request the same 'function' with several different
* devices and not care about which clock name to use.
*/
void at91_clock_associate(const char *id, struct device_d *dev, const char *func)
{
struct clk *clk = clk_get(NULL, id);
if (!dev || !clk || !IS_ERR(clk_get(dev, func)))
return;
clk->function = func;
clk->dev = dev;
}
/* clocks cannot be de-registered no refcounting necessary */
struct clk *clk_get(struct device_d *dev, const char *id)
{
struct clk *clk;
list_for_each_entry(clk, &clocks, node) {
if (strcmp(id, clk->name) == 0)
return clk;
if (clk->function && (dev == clk->dev) && strcmp(id, clk->function) == 0)
return clk;
}
return ERR_PTR(-ENOENT);
}
EXPORT_SYMBOL(clk_get);
void clk_put(struct clk *clk)
{
}
EXPORT_SYMBOL(clk_put);
static void __clk_enable(struct clk *clk)
{
if (clk->parent)
@ -401,31 +364,38 @@ static void init_programmable_clock(struct clk *clk)
/*------------------------------------------------------------------------*/
/* Register a new clock */
static void __init at91_clk_add(struct clk *clk)
{
list_add_tail(&clk->node, &clocks);
clk->cl.con_id = clk->name;
clk->cl.clk = clk;
clkdev_add(&clk->cl);
}
int clk_register(struct clk *clk)
{
if (clk_is_peripheral(clk)) {
clk->parent = &mck;
if (!clk->parent)
clk->parent = &mck;
clk->mode = pmc_periph_mode;
list_add_tail(&clk->node, &clocks);
}
else if (clk_is_sys(clk)) {
clk->parent = &mck;
clk->mode = pmc_sys_mode;
list_add_tail(&clk->node, &clocks);
}
#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
else if (clk_is_programmable(clk)) {
clk->mode = pmc_sys_mode;
init_programmable_clock(clk);
list_add_tail(&clk->node, &clocks);
}
#endif
at91_clk_add(clk);
return 0;
}
/*------------------------------------------------------------------------*/
static u32 at91_pll_rate(struct clk *pll, u32 freq, u32 reg)
@ -654,19 +624,19 @@ int at91_clock_init(unsigned long main_clock)
/* Register the PMC's standard clocks */
for (i = 0; i < ARRAY_SIZE(standard_pmc_clocks); i++)
list_add_tail(&standard_pmc_clocks[i]->node, &clocks);
at91_clk_add(standard_pmc_clocks[i]);
if (cpu_has_pllb())
list_add_tail(&pllb.node, &clocks);
at91_clk_add(&pllb);
if (cpu_has_uhp())
list_add_tail(&uhpck.node, &clocks);
at91_clk_add(&uhpck);
if (cpu_has_udpfs())
list_add_tail(&udpck.node, &clocks);
at91_clk_add(&udpck);
if (cpu_has_utmi())
list_add_tail(&utmi_clk.node, &clocks);
at91_clk_add(&utmi_clk);
/* MCK and CPU clock are "always on" */
clk_enable(&mck);

7
arch/arm/mach-at91/clock.h
View File

@ -6,6 +6,8 @@
* published by the Free Software Foundation.
*/
#include <linux/clkdev.h>
#define CLK_TYPE_PRIMARY 0x1
#define CLK_TYPE_PLL 0x2
#define CLK_TYPE_PROGRAMMABLE 0x4
@ -16,8 +18,7 @@
struct clk {
struct list_head node;
const char *name; /* unique clock name */
const char *function; /* function of the clock */
struct device_d *dev; /* device associated with function */
struct clk_lookup cl;
unsigned long rate_hz;
struct clk *parent;
u32 pmc_mask;
@ -29,3 +30,5 @@ struct clk {
extern int __init clk_register(struct clk *clk);
extern struct clk mck;
extern struct clk utmi_clk;

2
arch/arm/mach-at91/generic.h
View File

@ -10,5 +10,3 @@
/* Clocks */
extern int __init at91_clock_init(unsigned long main_clock);
struct device_d;
extern void __init at91_clock_associate(const char *id, struct device_d *dev, const char *func);

7
arch/arm/mach-at91/include/mach/clkdev.h Normal file
View File

@ -0,0 +1,7 @@
#ifndef __ASM_MACH_CLKDEV_H
#define __ASM_MACH_CLKDEV_H
#define __clk_get(clk) ({ 1; })
#define __clk_put(clk) do { } while (0)
#endif

13
arch/arm/mach-nomadik/8815.c
View File

@ -36,6 +36,19 @@ void st8815_add_device_sdram(u32 size)
arm_add_mem_device("ram0", 0x00000000, size);
}
static struct clk_lookup clocks_lookups[] = {
CLKDEV_DEV_ID("uart-pl0110", &st8815_clk_48),
CLKDEV_DEV_ID("uart-pl0111", &st8815_clk_48),
};
static int st8815_clkdev_init(void)
{
clkdev_add_table(clocks_lookups, ARRAY_SIZE(clocks_lookups));
return 0;
}
postcore_initcall(st8815_clkdev_init);
void st8815_register_uart(unsigned id)
{
resource_size_t start;

19
arch/arm/mach-versatile/core.c
View File

@ -144,10 +144,24 @@ static int vpb_clocksource_init(void)
core_initcall(vpb_clocksource_init);
static struct clk_lookup clocks_lookups[] = {
CLKDEV_DEV_ID("uart-pl0110", &ref_clk_24),
CLKDEV_DEV_ID("uart-pl0111", &ref_clk_24),
CLKDEV_DEV_ID("uart-pl0112", &ref_clk_24),
CLKDEV_DEV_ID("uart-pl0113", &ref_clk_24),
};
static int versatile_clkdev_init(void)
{
clkdev_add_table(clocks_lookups, ARRAY_SIZE(clocks_lookups));
return 0;
}
postcore_initcall(versatile_clkdev_init);
void versatile_register_uart(unsigned id)
{
resource_size_t start;
struct device_d *dev;
switch (id) {
case 0:
@ -165,9 +179,8 @@ void versatile_register_uart(unsigned id)
default:
return;
}
dev = add_generic_device("uart-pl011", id, NULL, start, 4096,
add_generic_device("uart-pl011", id, NULL, start, 4096,
IORESOURCE_MEM, NULL);
vpb_clk_create(&ref_clk_24, dev_name(dev));
}
void __noreturn reset_cpu (unsigned long ignored)

14
arch/x86/boards/x86_generic/generic_pc.c
View File

@ -30,12 +30,6 @@
#include <asm/syslib.h>
#include <ns16550.h>
static struct device_d bios_disk_dev = {
.id = -1,
.name = "biosdrive",
.size = 0, /* auto guess */
};
/*
* These datas are from the MBR, created by the linker and filled by the
* setup tool while installing barebox on the disk drive
@ -54,12 +48,10 @@ static int devices_init(void)
{
int rc;
sdram_dev.size = bios_get_memsize(); /* extended memory only */
sdram_dev.size <<= 10;
add_mem_device("ram0", 0x0, 16 * 1024 * 1024,
/* extended memory only */
add_mem_device("ram0", 0x0, bios_get_memsize() << 10,
IORESOURCE_MEM_WRITEABLE);
register_device(&bios_disk_dev);
add_generic_device("biosdrive", -1, NULL, 0, 0, IORESOURCE_MEM, NULL);
if (pers_env_size != PATCH_AREA_PERS_SIZE_UNUSED) {
rc = devfs_add_partition("biosdisk0",

6
commands/led.c
View File

@ -37,6 +37,12 @@ static int do_led(struct command *cmdtp, int argc, char *argv[])
if (argc == 1) {
int i = 0;
led = led_by_number(i);
if (!led) {
printf("no registered LEDs\n");
return COMMAND_ERROR;
}
printf("registered LEDs:\n");
while ((led = led_by_number(i))) {

6
drivers/ata/disk_drive.c
View File

@ -190,11 +190,11 @@ static int disk_probe(struct device_d *dev)
#ifdef CONFIG_ATA_BIOS
/* On x86, BIOS based disks are coming without a valid .size field */
if (dev->size == 0) {
if (dev->resource[0].size == 0) {
/* guess the size of this drive if not otherwise given */
dev->size = disk_guess_size(dev,
dev->resource[0].size = disk_guess_size(dev,
(struct partition_entry*)&sector[446]) * SECTOR_SIZE;
dev_info(dev, "Drive size guessed to %u kiB\n", dev->size / 1024);
dev_info(dev, "Drive size guessed to %u kiB\n", dev->resource[0].size / 1024);
}
#endif
atablk->blk.num_blocks = dev->resource[0].size / SECTOR_SIZE;

1
drivers/base/driver.c
View File

@ -124,6 +124,7 @@ int register_device(struct device_d *new_device)
INIT_LIST_HEAD(&new_device->children);
INIT_LIST_HEAD(&new_device->cdevs);
INIT_LIST_HEAD(&new_device->parameters);
INIT_LIST_HEAD(&new_device->active);
for_each_driver(drv) {
if (!match(drv, new_device))

6
drivers/mci/mxs.c
View File

@ -699,9 +699,9 @@ static int mxs_mci_probe(struct device_d *hw_dev)
hw_dev->priv = mxs_mci;
host->hw_dev = hw_dev;
host->send_cmd = mxs_mci_request,
host->set_ios = mxs_mci_set_ios,
host->init = mxs_mci_initialize,
host->send_cmd = mxs_mci_request;
host->set_ios = mxs_mci_set_ios;
host->init = mxs_mci_initialize;
mxs_mci->regs = dev_request_mem_region(dev, 0);
/* feed forward the platform specific values */

14
drivers/net/fec_mpc5200.c
View File

@ -665,13 +665,13 @@ int mpc5xxx_fec_probe(struct device_d *dev)
dev->type_data = edev;
fec = (mpc5xxx_fec_priv *)xmalloc(sizeof(*fec));
edev->priv = fec;
edev->open = mpc5xxx_fec_open,
edev->init = mpc5xxx_fec_init,
edev->send = mpc5xxx_fec_send,
edev->recv = mpc5xxx_fec_recv,
edev->halt = mpc5xxx_fec_halt,
edev->get_ethaddr = mpc5xxx_fec_get_ethaddr,
edev->set_ethaddr = mpc5xxx_fec_set_ethaddr,
edev->open = mpc5xxx_fec_open;
edev->init = mpc5xxx_fec_init;
edev->send = mpc5xxx_fec_send;
edev->recv = mpc5xxx_fec_recv;
edev->halt = mpc5xxx_fec_halt;
edev->get_ethaddr = mpc5xxx_fec_get_ethaddr;
edev->set_ethaddr = mpc5xxx_fec_set_ethaddr;
fec->eth = dev_request_mem_region(dev, 0);
fec->tbdBase = (FEC_TBD *)FEC_BD_BASE;

1
drivers/serial/arm_dcc.c
View File

@ -157,7 +157,6 @@ static struct driver_d arm_dcc_driver = {
static struct device_d arm_dcc_device = {
.id = -1,
.name = "arm_dcc",
.size = 4096,
};
static int arm_dcc_init(void)

2
drivers/serial/atmel.c
View File

@ -419,7 +419,7 @@ static int atmel_serial_probe(struct device_d *dev)
}
static struct driver_d atmel_serial_driver = {
.name = "atmel_serial",
.name = "atmel_usart",
.probe = atmel_serial_probe,
};

8
fs/fat/ff.c
View File

@ -363,7 +363,7 @@ int sync ( /* 0: successful, -EIO: failed */
/*
* Get sector# from cluster#
*/
DWORD clust2sect ( /* !=0: Sector number, 0: Failed - invalid cluster# */
static DWORD clust2sect ( /* !=0: Sector number, 0: Failed - invalid cluster# */
FATFS *fs, /* File system object */
DWORD clst /* Cluster# to be converted */
)
@ -377,7 +377,7 @@ DWORD clust2sect ( /* !=0: Sector number, 0: Failed - invalid cluster# */
/*
* FAT access - Read value of a FAT entry
*/
DWORD get_fat ( /* 0xFFFFFFFF:Disk error, 1:Internal error, Else:Cluster status */
static DWORD get_fat ( /* 0xFFFFFFFF:Disk error, 1:Internal error, Else:Cluster status */
FATFS *fs, /* File system object */
DWORD clst /* Cluster# to get the link information */
)
@ -424,7 +424,7 @@ DWORD get_fat ( /* 0xFFFFFFFF:Disk error, 1:Internal error, Else:Cluster status
*/
#ifdef CONFIG_FS_FAT_WRITE
int put_fat (
static int put_fat (
FATFS *fs, /* File system object */
DWORD clst, /* Cluster# to be changed in range of 2 to fs->n_fatent - 1 */
DWORD val /* New value to mark the cluster */
@ -875,7 +875,7 @@ void fit_lfn (
* Create numbered name
*/
#ifdef CONFIG_FS_FAT_LFN
void gen_numname (
static void gen_numname (
BYTE *dst, /* Pointer to generated SFN */
const BYTE *src, /* Pointer to source SFN to be modified */
const WCHAR *lfn, /* Pointer to LFN */

19
include/linux/clkdev.h
View File

@ -33,4 +33,23 @@ void clkdev_drop(struct clk_lookup *cl);
void clkdev_add_table(struct clk_lookup *, size_t);
int clk_add_alias(const char *, const char *, char *, struct device_d *);
#define CLKDEV_DEV_ID(_id, _clk) \
{ \
.dev_id = _id, \
.clk = _clk, \
}
#define CLKDEV_CON_ID(_id, _clk) \
{ \
.con_id = _id, \
.clk = _clk, \
}
#define CLKDEV_CON_DEV_ID(_con_id, _dev_id, _clk) \
{ \
.con_id = _con_id, \
.dev_id = _dev_id, \
.clk = _clk, \
}
#endif