sysmo-bts
/
barebox
9
0
Fork 0
Code Releases Activity

CPUIMX51: configure SD1 iomux when ESDHC is enabled 

Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Eric Bénard 2011-12-12 22:19:38 +01:00 committed by Sascha Hauer
parent 68b1325240
commit bacae7416f
1 changed files with 9 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c
View File

@ -88,6 +88,15 @@ static struct pad_desc eukrea_cpuimx51_pads[] = {
MX51_PAD_NANDF_CS1__NANDF_CS1,
/* LCD BL */
MX51_PAD_DI1_D1_CS__GPIO3_4,
#ifdef CONFIG_MCI_IMX_ESDHC
/* SD 1 */
MX51_PAD_SD1_CMD__SD1_CMD,
MX51_PAD_SD1_CLK__SD1_CLK,
MX51_PAD_SD1_DATA0__SD1_DATA0,
MX51_PAD_SD1_DATA1__SD1_DATA1,
MX51_PAD_SD1_DATA2__SD1_DATA2,
MX51_PAD_SD1_DATA3__SD1_DATA3,
#endif
};
#define GPIO_LAN8700_RESET (1 * 32 + 31)