ARM: i.MX: iim: Add regulator support
The voltage for programming the fuses is external to the SoC and on some boards this is controllable with a regulator, so add regulator support to the iim driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -26,6 +26,8 @@
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#include <malloc.h>
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#include <malloc.h>
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#include <of.h>
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#include <of.h>
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#include <io.h>
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#include <io.h>
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#include <regulator.h>
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#include <linux/err.h>
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#include <mach/iim.h>
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#include <mach/iim.h>
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#include <mach/imx51-regs.h>
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#include <mach/imx51-regs.h>
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@ -53,6 +55,7 @@ struct iim_priv {
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int write_enable;
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int write_enable;
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int sense_enable;
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int sense_enable;
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void (*supply)(int enable);
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void (*supply)(int enable);
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struct regulator *fuse_supply;
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};
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};
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struct imx_iim_drvdata {
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struct imx_iim_drvdata {
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@ -139,7 +142,7 @@ int imx_iim_read(unsigned int banknum, int offset, void *buf, int count)
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return imx_iim_cdev_read(&bank->cdev, buf, count, offset, 0);
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return imx_iim_cdev_read(&bank->cdev, buf, count, offset, 0);
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}
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}
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static int imx_iim_fuse_blow(struct iim_bank *bank, unsigned int row, u8 value)
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static int imx_iim_fuse_blow_one(struct iim_bank *bank, unsigned int row, u8 value)
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{
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{
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struct iim_priv *iim = bank->iim;
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struct iim_priv *iim = bank->iim;
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void __iomem *reg_base = iim->base;
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void __iomem *reg_base = iim->base;
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@ -195,30 +198,53 @@ out:
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return ret;
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return ret;
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}
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}
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static int imx_iim_fuse_blow(struct iim_bank *bank, unsigned offset, const void *buf,
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unsigned size)
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{
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struct iim_priv *iim = bank->iim;
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int ret, i;
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if (IS_ERR(iim->fuse_supply)) {
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iim->fuse_supply = regulator_get(iim->dev.parent, "vdd-fuse");
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dev_info(iim->dev.parent, "regul: %p\n", iim->fuse_supply);
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if (IS_ERR(iim->fuse_supply))
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return PTR_ERR(iim->fuse_supply);
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}
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ret = regulator_enable(iim->fuse_supply);
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if (ret < 0)
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return ret;
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if (iim->supply)
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iim->supply(1);
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for (i = 0; i < size; i++) {
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ret = imx_iim_fuse_blow_one(bank, offset + i, ((u8 *)buf)[i]);
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if (ret < 0)
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goto err_out;
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}
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if (iim->supply)
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iim->supply(0);
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ret = 0;
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err_out:
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regulator_disable(iim->fuse_supply);
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return ret;
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}
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static ssize_t imx_iim_cdev_write(struct cdev *cdev, const void *buf, size_t count,
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static ssize_t imx_iim_cdev_write(struct cdev *cdev, const void *buf, size_t count,
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loff_t offset, ulong flags)
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loff_t offset, ulong flags)
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{
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{
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ulong size, i;
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ulong size, i;
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struct iim_bank *bank = container_of(cdev, struct iim_bank, cdev);
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struct iim_bank *bank = container_of(cdev, struct iim_bank, cdev);
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struct iim_priv *iim = bank->iim;
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size = min((loff_t)count, 32 - offset);
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size = min((loff_t)count, 32 - offset);
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if (IS_ENABLED(CONFIG_IMX_IIM_FUSE_BLOW) && bank->iim->write_enable) {
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if (IS_ENABLED(CONFIG_IMX_IIM_FUSE_BLOW) && bank->iim->write_enable) {
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if (iim->supply)
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return imx_iim_fuse_blow(bank, offset, buf, size);
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iim->supply(1);
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for (i = 0; i < size; i++) {
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int ret;
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ret = imx_iim_fuse_blow(bank, offset + i, ((u8 *)buf)[i]);
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if (ret < 0)
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return ret;
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}
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if (iim->supply)
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iim->supply(0);
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} else {
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} else {
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for (i = 0; i < size; i++)
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for (i = 0; i < size; i++)
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((u8 *)bank->bankbase)[(offset+i)*4] = ((u8 *)buf)[i];
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((u8 *)bank->bankbase)[(offset+i)*4] = ((u8 *)buf)[i];
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@ -382,6 +408,8 @@ static int imx_iim_probe(struct device_d *dev)
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if (ret)
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if (ret)
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return ret;
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return ret;
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iim->fuse_supply = ERR_PTR(-ENODEV);
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iim->base = dev_request_mem_region(dev, 0);
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iim->base = dev_request_mem_region(dev, 0);
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if (!iim->base)
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if (!iim->base)
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return -EBUSY;
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return -EBUSY;
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