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ARM: i.MX6 phyflex: Enable lowlevel UART 

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sascha Hauer 2013-08-15 14:45:45 +02:00
parent 1937523010
commit bdb4d83e1b
1 changed files with 35 additions and 0 deletions
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35
arch/arm/boards/phytec-pfla02/lowlevel.c
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@ -24,6 +24,35 @@
#include <mach/imx6-mmdc.h>
#include <mach/imx6.h>
static inline void setup_uart(void)
{
void __iomem *ccmbase = (void *)MX6_CCM_BASE_ADDR;
void __iomem *uartbase = (void *)MX6_UART4_BASE_ADDR;
void __iomem *iomuxbase = (void *)MX6_IOMUXC_BASE_ADDR;
writel(0x4, iomuxbase + 0x01f8);
writel(0xffffffff, ccmbase + 0x68);
writel(0xffffffff, ccmbase + 0x6c);
writel(0xffffffff, ccmbase + 0x70);
writel(0xffffffff, ccmbase + 0x74);
writel(0xffffffff, ccmbase + 0x78);
writel(0xffffffff, ccmbase + 0x7c);
writel(0xffffffff, ccmbase + 0x80);
writel(0x00000000, uartbase + 0x80);
writel(0x00004027, uartbase + 0x84);
writel(0x00000704, uartbase + 0x88);
writel(0x00000a81, uartbase + 0x90);
writel(0x0000002b, uartbase + 0x9c);
writel(0x00013880, uartbase + 0xb0);
writel(0x0000047f, uartbase + 0xa4);
writel(0x0000c34f, uartbase + 0xa8);
writel(0x00000001, uartbase + 0x80);
PUTC_LL('>');
}
extern char __dtb_imx6q_phytec_pbab01_start[];
ENTRY_FUNCTION(start_phytec_pbab01_1gib)(void)
@ -36,6 +65,9 @@ ENTRY_FUNCTION(start_phytec_pbab01_1gib)(void)
arm_setup_stack(0x00920000 - 8);
if (IS_ENABLED(CONFIG_DEBUG_LL))
setup_uart();
fdt = (uint32_t)__dtb_imx6q_phytec_pbab01_start - get_runtime_offset();
barebox_arm_entry(0x10000000, SZ_1G, fdt);
@ -51,6 +83,9 @@ ENTRY_FUNCTION(start_phytec_pbab01_2gib)(void)
arm_setup_stack(0x00920000 - 8);
if (IS_ENABLED(CONFIG_DEBUG_LL))
setup_uart();
fdt = (uint32_t)__dtb_imx6q_phytec_pbab01_start - get_runtime_offset();
barebox_arm_entry(0x10000000, SZ_2G, fdt);