ARM i.MX27: Add lcdc per gate
This gate is used to enable/disable the lcd controller, hence we need a gate for it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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1563d42c42
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c1cc2c2f55
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@ -29,7 +29,7 @@
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enum mx27_clks {
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dummy, ckih, ckil, mpll, spll, mpll_main2, ahb, ipg, nfc_div, per1_div,
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per2_div, per3_div, per4_div, usb_div, cpu_sel, clko_sel, cpu_div, clko_div,
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clko_en, clk_max
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clko_en, lcdc_per_gate, clk_max
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};
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static struct clk *clks[clk_max];
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@ -72,18 +72,18 @@ static int imx27_ccm_probe(struct device_d *dev)
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base = dev_request_mem_region(dev, 0);
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writel(PCCR0_SDHC3_EN | PCCR0_SDHC2_EN | PCCR0_SDHC1_EN |
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PCCR0_PWM_EN | PCCR0_KPP_EN | PCCR0_IIM_EN | PCCR0_I2C2_EN |
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PCCR0_I2C1_EN | PCCR0_GPT6_EN | PCCR0_GPT5_EN | PCCR0_GPT4_EN |
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PCCR0_GPT3_EN | PCCR0_GPT2_EN | PCCR0_GPT1_EN | PCCR0_GPIO_EN |
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PCCR0_FEC_EN | PCCR0_CSPI3_EN | PCCR0_CSPI2_EN | PCCR0_CSPI1_EN,
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PCCR0_PWM_EN | PCCR0_KPP_EN | PCCR0_LCDC_EN | PCCR0_IIM_EN |
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PCCR0_I2C2_EN | PCCR0_I2C1_EN | PCCR0_GPT6_EN | PCCR0_GPT5_EN |
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PCCR0_GPT4_EN | PCCR0_GPT3_EN | PCCR0_GPT2_EN | PCCR0_GPT1_EN |
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PCCR0_GPIO_EN | PCCR0_FEC_EN | PCCR0_CSPI3_EN | PCCR0_CSPI2_EN |
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PCCR0_CSPI1_EN,
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base + CCM_PCCR0);
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writel(PCCR1_NFC_BAUDEN | PCCR1_PERCLK4_EN | PCCR1_PERCLK3_EN |
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PCCR1_PERCLK2_EN | PCCR1_PERCLK1_EN | PCCR1_HCLK_USB |
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PCCR1_HCLK_FEC | PCCR1_HCLK_EMI | PCCR1_WDT_EN | PCCR1_USB_EN |
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PCCR1_UART6_EN | PCCR1_UART5_EN | PCCR1_UART4_EN |
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PCCR1_UART3_EN | PCCR1_UART2_EN | PCCR1_UART1_EN,
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base + CCM_PCCR1);
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writel(PCCR1_NFC_BAUDEN | PCCR1_PERCLK4_EN | PCCR1_PERCLK2_EN | PCCR1_PERCLK1_EN |
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PCCR1_HCLK_USB | PCCR1_HCLK_LCDC | PCCR1_HCLK_FEC | PCCR1_HCLK_EMI |
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PCCR1_WDT_EN | PCCR1_USB_EN | PCCR1_UART6_EN | PCCR1_UART5_EN |
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PCCR1_UART4_EN | PCCR1_UART3_EN | PCCR1_UART2_EN | PCCR1_UART1_EN,
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base + CCM_PCCR1);
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clks[dummy] = clk_fixed("dummy", 0);
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clks[ckih] = clk_fixed("ckih", 26000000);
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@ -115,6 +115,7 @@ static int imx27_ccm_probe(struct device_d *dev)
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else
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clks[cpu_div] = imx_clk_divider("cpu_div", "cpu_sel", base + CCM_CSCR, 13, 3);
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clks[clko_div] = imx_clk_divider("clko_div", "clko_sel", base + CCM_PCDR0, 22, 3);
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clks[lcdc_per_gate] = imx_clk_gate("lcdc_per_gate", "per3_div", base + CCM_PCCR1, 7);
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clkdev_add_physbase(clks[per1_div], MX27_GPT1_BASE_ADDR, NULL);
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clkdev_add_physbase(clks[per1_div], MX27_GPT2_BASE_ADDR, NULL);
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@ -136,7 +137,7 @@ static int imx27_ccm_probe(struct device_d *dev)
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clkdev_add_physbase(clks[per2_div], MX27_SDHC1_BASE_ADDR, NULL);
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clkdev_add_physbase(clks[per2_div], MX27_SDHC2_BASE_ADDR, NULL);
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clkdev_add_physbase(clks[per2_div], MX27_SDHC3_BASE_ADDR, NULL);
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clkdev_add_physbase(clks[per3_div], MX27_LCDC_BASE_ADDR, NULL);
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clkdev_add_physbase(clks[lcdc_per_gate], MX27_LCDC_BASE_ADDR, NULL);
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clkdev_add_physbase(clks[ipg], MX27_FEC_BASE_ADDR, NULL);
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return 0;
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