use debug macro, some beautification
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@ -1,46 +1,46 @@
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/*
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dm9000.c: Version 1.2 12/15/2003
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A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
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Copyright (C) 1997 Sten Wang
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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as published by the Free Software Foundation; either version 2
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of the License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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(C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
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V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match
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06/22/2001 Support DM9801 progrmming
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E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000
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E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200
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R17 = (R17 & 0xfff0) | NF + 3
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E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200
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R17 = (R17 & 0xfff0) | NF
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v1.00 modify by simon 2001.9.5
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change for kernel 2.4.x
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v1.1 11/09/2001 fix force mode bug
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v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
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Fixed phy reset.
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Added tx/rx 32 bit mode.
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Cleaned up for kernel merge.
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--------------------------------------
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12/15/2003 Initial port to u-boot by Sascha Hauer <saschahauer@web.de>
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TODO: Homerun NIC and longrun NIC are not functional, only internal at the
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moment.
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*/
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* dm9000.c
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*
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* A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
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* Copyright (C) 1997 Sten Wang
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
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*
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* V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match
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* 06/22/2001 Support DM9801 progrmming
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* E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000
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* E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200
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* R17 = (R17 & 0xfff0) | NF + 3
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* E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200
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* R17 = (R17 & 0xfff0) | NF
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*
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* v1.00 modify by simon 2001.9.5
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* change for kernel 2.4.x
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*
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* v1.1 11/09/2001 fix force mode bug
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*
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* v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
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* Fixed phy reset.
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* Added tx/rx 32 bit mode.
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* Cleaned up for kernel merge.
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*
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*
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*
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* 12/15/2003 Initial port to u-boot by Sascha Hauer
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* <saschahauer@web.de>
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*
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* ... see commit logs
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*/
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#include <common.h>
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#include <command.h>
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@ -60,14 +60,6 @@ TODO: Homerun NIC and longrun NIC are not functional, only internal at the
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#define DM9801_NOISE_FLOOR 0x08
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#define DM9802_NOISE_FLOOR 0x05
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/* #define CONFIG_DM9000_DEBUG */
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#ifdef CONFIG_DM9000_DEBUG
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#define DM9000_DBG(fmt,args...) printf(fmt ,##args)
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#else /* */
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#define DM9000_DBG(fmt,args...)
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#endif /* */
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/* DM9000 network board routine ---------------------------- */
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#define DM9000_outb(d,r) ( *(volatile u8 *)r = d )
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@ -85,16 +77,16 @@ struct dm9000_priv {
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static void
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dump_regs(void)
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{
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DM9000_DBG("\n");
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DM9000_DBG("NCR (0x00): %02x\n", DM9000_ior(0));
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DM9000_DBG("NSR (0x01): %02x\n", DM9000_ior(1));
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DM9000_DBG("TCR (0x02): %02x\n", DM9000_ior(2));
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DM9000_DBG("TSRI (0x03): %02x\n", DM9000_ior(3));
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DM9000_DBG("TSRII (0x04): %02x\n", DM9000_ior(4));
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DM9000_DBG("RCR (0x05): %02x\n", DM9000_ior(5));
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DM9000_DBG("RSR (0x06): %02x\n", DM9000_ior(6));
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DM9000_DBG("ISR (0xFE): %02x\n", DM9000_ior(ISR));
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DM9000_DBG("\n");
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debug("\n");
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debug("NCR (0x00): %02x\n", DM9000_ior(0));
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debug("NSR (0x01): %02x\n", DM9000_ior(1));
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debug("TCR (0x02): %02x\n", DM9000_ior(2));
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debug("TSRI (0x03): %02x\n", DM9000_ior(3));
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debug("TSRII (0x04): %02x\n", DM9000_ior(4));
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debug("RCR (0x05): %02x\n", DM9000_ior(5));
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debug("RSR (0x06): %02x\n", DM9000_ior(6));
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debug("ISR (0xFE): %02x\n", DM9000_ior(ISR));
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debug("\n");
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}
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#endif /* */
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@ -116,12 +108,12 @@ static int dm9000_phy_read(struct miiphy_device *mdev, uint8_t phy_addr,
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/* Fill the phyxcer register into REG_0C */
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DM9000_iow(DM9000_EPAR, DM9000_PHY | reg);
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DM9000_iow(DM9000_EPCR, 0xc); /* Issue phyxcer read command */
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udelay(100); /* Wait read complete */
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udelay(100); /* Wait read complete */
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DM9000_iow(DM9000_EPCR, 0x0); /* Clear phyxcer read command */
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*val = (DM9000_ior(DM9000_EPDRH) << 8) | DM9000_ior(DM9000_EPDRL);
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/* The read data keeps on REG_0D & REG_0E */
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DM9000_DBG("phy_read(%d): %d\n", reg, val);
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debug("phy_read(%d): %d\n", reg, val);
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return 0;
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}
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DM9000_iow(DM9000_EPDRL, (val & 0xff));
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DM9000_iow(DM9000_EPDRH, ((val >> 8) & 0xff));
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DM9000_iow(DM9000_EPCR, 0xa); /* Issue phyxcer write command */
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udelay(500); /* Wait write complete */
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udelay(500); /* Wait write complete */
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DM9000_iow(DM9000_EPCR, 0x0); /* Clear phyxcer write command */
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DM9000_DBG("phy_write(reg:%d, value:%d)\n", reg, value);
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debug("phy_write(reg:%d, value:%d)\n", reg, value);
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return 0;
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}
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static void dm9000_reset(void)
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{
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DM9000_DBG("resetting\n");
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debug("resetting\n");
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DM9000_iow(DM9000_NCR, NCR_RST);
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udelay(1000); /* delay 1ms */
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}
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char *data_ptr;
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u32 tmplen, i;
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uint64_t tmo;
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DM9000_DBG("eth_send: length: %d\n", length);
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debug("eth_send: length: %d\n", length);
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for (i = 0; i < length; i++) {
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if (i % 8 == 0)
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DM9000_DBG("\nSend: 02x: ", i);
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DM9000_DBG("%02x ", ((unsigned char *) packet)[i]);
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} DM9000_DBG("\n");
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debug("\nSend: 02x: ", i);
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debug("%02x ", ((unsigned char *) packet)[i]);
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} debug("\n");
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/* Move data to DM9000 TX RAM */
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data_ptr = (char *) packet;
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break;
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}
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}
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DM9000_DBG("transmit done\n\n");
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debug("transmit done\n\n");
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return 0;
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}
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static void dm9000_eth_halt (struct eth_device *edev)
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{
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printf("eth_halt\n");
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debug("eth_halt\n");
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#if 0
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phy_write(0, 0x8000); /* PHY RESET */
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DM9000_iow(DM9000_GPR, 0x01); /* Power-Down PHY */
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if (rxbyte > 1) {
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DM9000_iow(DM9000_RCR, 0x00); /* Stop Device */
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DM9000_iow(DM9000_ISR, 0x80); /* Stop INT request */
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DM9000_DBG("rx status check: %d\n", rxbyte);
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debug("rx status check: %d\n", rxbyte);
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}
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DM9000_DBG("receiving packet\n");
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debug("receiving packet\n");
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/* A packet ready now & Get status/length */
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DM9000_outb(DM9000_MRCMD, DM9000_IO);
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RxLen = tmpdata >> 16;
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#endif /* */
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DM9000_DBG("rx status: 0x%04x rx len: %d\n", RxStatus, RxLen);
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debug("rx status: 0x%04x rx len: %d\n", RxStatus, RxLen);
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/* Move data from DM9000 */
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/* Read received packet from RX SRAM */
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} else {
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/* Pass to upper layer */
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DM9000_DBG("passing packet to upper layer\n");
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debug("passing packet to upper layer\n");
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NetReceive(NetRxPackets[0], RxLen);
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return RxLen;
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}
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static int dm9000_set_mac_address(struct eth_device *eth, unsigned char *adr)
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{
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int i, oft;
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printf("dm9000_set_mac_address\n");
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debug("dm9000_set_mac_address\n");
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for (i = 0, oft = 0x10; i < 6; i++, oft++)
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DM9000_iow(oft, adr[i]);
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for (i = 0, oft = 0x16; i < 8; i++, oft++)
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return 0;
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}
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/* FIXME: Use base address specified in device */
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static int dm9000_probe(struct device_d *dev)
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{
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struct eth_device *edev;
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struct dm9000_priv *priv;
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printf("dm9000_eth_init()\n");
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debug("dm9000_eth_init()\n");
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edev = xzalloc(sizeof(struct eth_device) + sizeof(struct dm9000_priv));
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dev->type_data = edev;
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