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Map SRAM on NC650 board

This commit is contained in:
wdenk 2004-11-17 20:44:20 +00:00
parent 1f6d4258c2
commit cacfab588a
2 changed files with 17 additions and 0 deletions
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2
CHANGELOG
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@ -2,6 +2,8 @@
Changes since U-Boot 1.1.1:
======================================================================
* Map SRAM on NC650 board
* Work around for Ethernet problems on Xaeniax board
* Patch by TsiChung Liew, 23 Sep 2004:

15
include/configs/NC650.h
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@ -334,6 +334,21 @@
#define CFG_OR3_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_SDRAM)
#define CFG_BR3_PRELIM ((SDRAM_BASE3_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V)
/*
* BR5 and OR5 (SRAM)
*/
#define CFG_SRAM_BASE 0x60000000
#define CFG_SRAM_SIZE 0x00080000
#define CFG_OR_TIMING_SRAM (OR_CSNT_SAM | OR_ACS_DIV1 | OR_BI | \
OR_SCY_15_CLK | OR_EHTR | OR_TRLX)
#define CFG_BR5_PRELIM ((CFG_SRAM_BASE & BR_BA_MSK) | BR_PS_8 | BR_V )
#define CFG_OR5_PRELIM (((-CFG_SRAM_SIZE) & OR_AM_MSK) | CFG_OR_TIMING_SRAM)
/*
* 4096 Rows from SDRAM example configuration
* 1000 factor s -> ms