diff --git a/arch/arm/boards/phytec-som-am335x/board.c b/arch/arm/boards/phytec-som-am335x/board.c
index 1d78f4dad..aef230707 100644
--- a/arch/arm/boards/phytec-som-am335x/board.c
+++ b/arch/arm/boards/phytec-som-am335x/board.c
@@ -33,6 +33,7 @@
 #include <mach/am33xx-silicon.h>
 #include <mach/bbu.h>
 #include <net.h>
+#include <gpio.h>
 
 #include "sob_odu_eeprom.h"
 
@@ -61,6 +62,18 @@ static char *xloadslots[] = {
 	"/dev/nand0.xload_backup3.bb"
 };
 
+#define OWHW_GPIO_SWITCH_RESET 56
+
+static void owhw_switch_reset(void)
+{
+	pr_info("Resetting OWHW switch\n");
+	gpio_set_value(OWHW_GPIO_SWITCH_RESET, 0);
+	/* spec states at least 10ms; using 20 here actualy results in
+	 * something like 16ms as measured by the scope */
+	mdelay(20);
+	gpio_set_value(OWHW_GPIO_SWITCH_RESET, 1);
+}
+
 static int physom_devices_init(void)
 {
 	if (!of_machine_is_compatible("phytec,am335x-som"))
@@ -82,6 +95,12 @@ static int physom_devices_init(void)
 
 	if (of_machine_is_compatible("gsmk,owhw")) {
 		defaultenv_append_directory(defaultenv_gsmk_owhw);
+		/* claim + initialize the switch_reset GPIO */
+		gpio_request(OWHW_GPIO_SWITCH_RESET, "switch-reset");
+		gpio_direction_output(OWHW_GPIO_SWITCH_RESET, 1);
+		/* actually perform a switch reset, as we cannot rely on
+		 * the power-up reset to properly rest it */
+		owhw_switch_reset();
 	} else if (of_machine_is_compatible("sysmocom,odu")) {
 		defaultenv_append_directory(defaultenv_sysmocom_odu);
 	} else {