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barebox
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Merge branch 'next' 

Conflicts:
	common/hush.c

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sascha Hauer 2012-05-03 20:10:13 +02:00
parent 71fadbafe2 bd20ba6798
commit ce38019845
274 changed files with 13808 additions and 5585 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
.gitignore vendored
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@ -62,3 +62,4 @@ cscope.*
# patches
*.patch
scripts/gen_netx_image

4
Makefile
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@ -531,6 +531,7 @@ quiet_cmd_barebox_version = GEN .version
mv .version .old_version; \
expr 0$$(cat .old_version) + 1 >.version; \
fi; \
$(MAKE) $(build)=common
# Check size of a file
quiet_cmd_check_file_size = CHKSIZE $@
@ -1001,7 +1002,8 @@ endif # CONFIG_MODULES
CLEAN_DIRS += $(MODVERDIR)
CLEAN_FILES += barebox System.map include/generated/barebox_default_env.h \
.tmp_version .tmp_barebox* barebox.bin barebox.map barebox.S \
.tmp_kallsyms* barebox_default_env* barebox.ldr Doxyfile.version
.tmp_kallsyms* barebox_default_env* barebox.ldr \
Doxyfile.version barebox.srec
# Directories & files removed with 'make mrproper'
MRPROPER_DIRS += include/config include2 usr/include

3
arch/arm/Makefile
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@ -104,6 +104,7 @@ board-$(CONFIG_MACH_PCM049) := pcm049
board-$(CONFIG_MACH_PCA100) := phycard-i.MX27
board-$(CONFIG_MACH_PCAAL1) := phycard-a-l1
board-$(CONFIG_MACH_PCAAXL2) := phycard-a-xl2
board-$(CONFIG_MACH_PCM027) := pcm027
board-$(CONFIG_MACH_PCM037) := pcm037
board-$(CONFIG_MACH_PCM038) := pcm038
board-$(CONFIG_MACH_PCM043) := pcm043
@ -130,6 +131,8 @@ board-$(CONFIG_MACH_USB_A9G20) := usb-a926x
board-$(CONFIG_MACH_VERSATILEPB) := versatile
board-$(CONFIG_MACH_TX25) := karo-tx25
board-$(CONFIG_MACH_TQMA53) := tqma53
board-$(CONFIG_MACH_TX51) := karo-tx51
board-$(CONFIG_MACH_MX6Q_ARM2) := freescale-mx6-arm2
machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))

12
arch/arm/boards/a9m2410/a9m2410.c
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@ -109,15 +109,15 @@ static int a9m2410_devices_init(void)
writel(reg, S3C_MISCCR);
/* ----------- the devices the boot loader should work with -------- */
add_generic_device("s3c24x0_nand", -1, NULL, S3C24X0_NAND_BASE, 0,
IORESOURCE_MEM, &nand_info);
add_generic_device("s3c24x0_nand", DEVICE_ID_DYNAMIC, NULL, S3C24X0_NAND_BASE,
0, IORESOURCE_MEM, &nand_info);
/*
* SMSC 91C111 network controller on the baseboard
* connected to CS line 1 and interrupt line
* GPIO3, data width is 32 bit
*/
add_generic_device("smc91c111", -1, NULL, S3C_CS1_BASE + 0x300, 16,
IORESOURCE_MEM, NULL);
add_generic_device("smc91c111", DEVICE_ID_DYNAMIC, NULL, S3C_CS1_BASE + 0x300,
16, IORESOURCE_MEM, NULL);
#ifdef CONFIG_NAND
/* ----------- add some vital partitions -------- */
@ -145,8 +145,8 @@ void __bare_init nand_boot(void)
static int a9m2410_console_init(void)
{
add_generic_device("s3c_serial", -1, NULL, S3C_UART1_BASE, S3C_UART1_SIZE,
IORESOURCE_MEM, NULL);
add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART1_BASE,
S3C_UART1_SIZE, IORESOURCE_MEM, NULL);
return 0;
}

10
arch/arm/boards/a9m2440/a9m2440.c
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@ -129,15 +129,15 @@ static int a9m2440_devices_init(void)
writel(reg, S3C_MISCCR);
/* ----------- the devices the boot loader should work with -------- */
add_generic_device("s3c24x0_nand", -1, NULL, S3C24X0_NAND_BASE, 0,
add_generic_device("s3c24x0_nand", DEVICE_ID_DYNAMIC, NULL, S3C24X0_NAND_BASE, 0,
IORESOURCE_MEM, &nand_info);
/*
* cs8900 network controller onboard
* Connected to CS line 5 + A24 and interrupt line EINT9,
* data width is 16 bit
*/
add_generic_device("cs8900", -1, NULL, S3C_CS5_BASE + (1 << 24) + 0x300, 16,
IORESOURCE_MEM, NULL);
add_generic_device("cs8900", DEVICE_ID_DYNAMIC, NULL,
S3C_CS5_BASE + (1 << 24) + 0x300, 16, IORESOURCE_MEM, NULL);
#ifdef CONFIG_NAND
/* ----------- add some vital partitions -------- */
@ -164,8 +164,8 @@ void __bare_init nand_boot(void)
static int a9m2440_console_init(void)
{
add_generic_device("s3c_serial", -1, NULL, S3C_UART1_BASE, S3C_UART1_SIZE,
IORESOURCE_MEM, NULL);
add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART1_BASE,
S3C_UART1_SIZE, IORESOURCE_MEM, NULL);
return 0;
}

10
arch/arm/boards/at91sam9260ek/env/config vendored
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@ -21,19 +21,21 @@ fi
kernel_loc=nfs
# can be either 'net', 'nor', 'nand' or 'initrd'
rootfs_loc=net
# can be either 'nfs', 'tftp', 'nor', 'nand' or empty
oftree_loc=nfs
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root.$rootfs_type
#kernelimage=zImage
kernelimage=uImage
kernelimage=zImage
#kernelimage=uImage
#kernelimage=Image
#kernelimage=Image.lzo
nand_device=atmel_nand
nand_parts="128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),4M(kernel),120M(rootfs),-(data)"
rootfs_mtdblock_nand=5
nand_parts="128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),128k(oftree),4M(kernel),120M(rootfs),-(data)"
rootfs_mtdblock_nand=6
autoboot_timeout=3

12
arch/arm/boards/at91sam9261ek/env/config vendored
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@ -18,22 +18,24 @@ fi
#eth0.serverip=a.b.c.d
# can be either 'nfs', 'tftp' or 'nand'
kernel_loc=tftp
kernel_loc=nfs
# can be either 'net', 'nand' or 'initrd'
rootfs_loc=net
# can be either 'nfs', 'tftp', 'nand' or empty
oftree_loc=nfs
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root.$rootfs_type
#kernelimage=zImage
kernelimage=uImage
kernelimage=zImage
#kernelimage=uImage
#kernelimage=Image
#kernelimage=Image.lzo
nand_device=atmel_nand
nand_parts="128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),4M(kernel),120M(rootfs),-(data)"
rootfs_mtdblock_nand=5
nand_parts="128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),128k(oftree),4M(kernel),120M(rootfs),-(data)"
rootfs_mtdblock_nand=6
autoboot_timeout=3

14
arch/arm/boards/at91sam9263ek/env/config vendored
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@ -12,24 +12,26 @@ dhcp_vendor_id=barebox-at91sam9263ek
#eth0.serverip=a.b.c.d
# can be either 'nfs', 'tftp', 'nor' or 'nand'
kernel_loc=tftp
kernel_loc=nfs
# can be either 'net', 'nor', 'nand' or 'initrd'
rootfs_loc=net
# can be either 'nfs', 'tftp', 'nor', 'nand' or empty
oftree_loc=nfs
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root.$rootfs_type
#kernelimage=zImage
kernelimage=uImage
kernelimage=zImage
#kernelimage=uImage
#kernelimage=Image
#kernelimage=Image.lzo
nand_device=atmel_nand
nand_parts="128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),4M(kernel),120M(rootfs),-(data)"
rootfs_mtdblock_nand=5
nand_parts="128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),128k(oftree),4M(kernel),120M(rootfs),-(data)"
rootfs_mtdblock_nand=6
nor_parts="256k(barebox),64k(bareboxenv),4M(kernel),-(root)"
nor_parts="256k(barebox),64k(bareboxenv),64k(oftree)4M(kernel),-(root)"
autoboot_timeout=3

51
arch/arm/boards/at91sam9m10g45ek/env/bin/boot_board vendored Normal file
View File

@ -0,0 +1,51 @@
#!/bin/sh
PATH=/env/bin
export PATH
. /env/config
menu -r -m boot
menu -a -m boot -d "\e[1;36mWelcome on Barebox Boot Sequence\e[0m"
menu -e -a -m boot -c 'menu_boot' -d "boot (default) "
menu -e -a -m boot -c 'menu_boot -m nand' -d "boot from nand "
menu -e -a -m boot -c 'menu_boot -k nfs -r net' -d "boot from nfs (kernel nfs) "
menu -e -a -m boot -c 'menu_boot -k tftp -r net' -d "boot from nfs (kernel tftp)"
menu -e -a -m boot -c 'clear' -d "\e[2;33mshell \e[0m"
menu -e -a -m boot -u update -d "update "
menu -e -a -m boot -c reset -d "\e[1;31mreset \e[0m"
# Submenu Update
menu -r -m update
menu -a -m update -d "\e[1;36mUpdate\e[0m"
menu -e -a -m update -u update_barebox -d "\e[2;33mbarebox\e[0m"
menu -e -a -m update -u update_kernel -d "kernel"
menu -e -a -m update -u update_rootfs -d "rootfs"
menu -e -a -m update -c 'true' -d "back "
# submenu update barebox
menu -r -m update_barebox
menu -a -m update_barebox -d "\e[2;33mBarebox Update Methode\e[0m"
menu -e -a -m update_barebox -c 'update -t barebox -d nand -m tftp -c; echo ; timeout -a 3' -d "tftp "
menu -e -a -m update_barebox -c 'update -t barebox -d nand -m xmodem -c; echo ; timeout -a 3' -d "xmodem"
menu -e -a -m update_barebox -c 'update -t barebox -d nand -m nfs -c; echo ; timeout -a 3' -d "nfs "
menu -e -a -m update_barebox -c 'true' -d "back "
# submenu update kernel
menu -r -m update_kernel
menu -a -m update_kernel -d "\e[1;36mKernel Update Methode\e[0m"
menu -e -a -m update_kernel -c 'update -t kernel -d nand -m tftp -c; echo ; timeout -a 3' -d "tftp "
menu -e -a -m update_kernel -c 'update -t kernel -d nand -m xmodem -c; echo ; timeout -a 3' -d "xmodem"
menu -e -a -m update_kernel -c 'update -t kernel -d nand -m nfs -c; echo ; timeout -a 3' -d "nfs "
menu -e -a -m update_kernel -c 'true' -d "back "
# submenu update barebox
menu -r -m update_rootfs
menu -a -m update_rootfs -d "\e[1;36mRootfs Update Methode\e[0m"
menu -e -a -m update_rootfs -c 'update -t rootfs -d nand -m tftp -c; echo ; timeout -a 3' -d "tftp "
menu -e -a -m update_rootfs -c 'update -t rootfs -d nand -m xmodem -c; echo ; timeout -a 3' -d "xmodem"
menu -e -a -m update_rootfs -c 'update -t rootfs -d nand -m nfs -c; echo ; timeout -a 3' -d "nfs "
menu -e -a -m update_rootfs -c 'true' -d "back "
menu -s -m boot -A $autoboot_timeout
exit 1

37
arch/arm/boards/at91sam9m10g45ek/env/bin/menu_boot vendored Normal file
View File

@ -0,0 +1,37 @@
#!/bin/sh
. /env/config
while getopt "k:r:i:m:" Option
do
if [ ${Option} = k ]; then
kernel_loc=${OPTARG}
elif [ ${Option} = r ]; then
rootfs_loc=${OPTARG}
elif [ ${Option} = i ]; then
ip=${OPTARG}
elif [ ${Option} = m ]; then
mode=${OPTARG}
else
fi
done
boot_opt=
if [ x$mode != x ]; then
boot_opt="-m ${mode}"
else
if [ x$kernel_loc != x ]; then
boot_opt="-k ${kernel_loc}"
fi
if [ x$kernel_loc != x ]; then
boot_opt="-r ${rootfs_loc}"
fi
fi
boot ${boot_opt} -i ${ip}
echo -n "boot error: Hit any key to return to the menu: "
timeout -a 3
menu -s -m boot
exit 1

14
arch/arm/boards/at91sam9m10g45ek/env/config vendored
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@ -12,26 +12,28 @@ dhcp_vendor_id=barebox-at91sam9m10g45ek
#eth0.serverip=a.b.c.d
# can be either 'nfs', 'tftp' or 'nand'
kernel_loc=tftp
kernel_loc=nfs
# can be either 'net', 'nand' or 'initrd'
rootfs_loc=net
# can be either 'nfs', 'tftp', 'nand' or empty
oftree_loc=nfs
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root.$rootfs_type
#kernelimage=zImage
kernelimage=uImage
kernelimage=zImage
#kernelimage=uImage
#kernelimage=Image
#kernelimage=Image.lzo
nand_device=atmel_nand
nand_parts="128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),4M(kernel),120M(rootfs),-(data)"
rootfs_mtdblock_nand=5
nand_parts="128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),128k(oftree),4M(kernel),120M(rootfs),-(data)"
rootfs_mtdblock_nand=6
autoboot_timeout=3
bootargs="console=ttyS0,115200"
bootargs="console=ttyS0,115200 console=tty0"
# set a fancy prompt (if support is compiled in)
PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m "

51
arch/arm/boards/at91sam9m10g45ek/init.c
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@ -41,6 +41,8 @@
#include <mach/io.h>
#include <mach/at91sam9_smc.h>
#include <mach/sam9_smc.h>
#include <gpio_keys.h>
#include <readkey.h>
/*
* board revision encoding
@ -164,6 +166,54 @@ static void ek_device_add_leds(void)
static void ek_device_add_leds(void) {}
#endif
#ifdef CONFIG_KEYBOARD_GPIO
struct gpio_keys_button keys[] = {
{
.code = KEY_HOME,
.gpio = AT91_PIN_PB6,
}, {
.code = KEY_RETURN,
.gpio = AT91_PIN_PB7,
}, {
.code = KEY_LEFT,
.gpio = AT91_PIN_PB14,
}, {
.code = KEY_RIGHT,
.gpio = AT91_PIN_PB15,
}, {
.code = KEY_UP,
.gpio = AT91_PIN_PB16,
}, {
.code = KEY_DOWN,
.gpio = AT91_PIN_PB17,
}, {
.code = KEY_RETURN,
.gpio = AT91_PIN_PB18,
},
};
struct gpio_keys_platform_data gk_pdata = {
.buttons = keys,
.nbuttons = ARRAY_SIZE(keys),
};
static void ek_device_add_keyboard(void)
{
int i;
for (i = 0; i < gk_pdata.nbuttons; i++) {
/* user push button, pull up enabled */
keys[i].active_low = 1;
at91_set_GPIO_periph(keys[i].gpio, keys[i].active_low);
at91_set_deglitch(keys[i].gpio, 1);
}
add_gpio_keys_device(-1, &gk_pdata);
}
#else
static void ek_device_add_keyboard(void) {}
#endif
static int at91sam9m10g45ek_mem_init(void)
{
at91_add_device_sdram(128 * 1024 * 1024);
@ -178,6 +228,7 @@ static int at91sam9m10g45ek_devices_init(void)
at91_add_device_eth(0, &macb_pdata);
ek_add_device_mci();
ek_device_add_leds();
ek_device_add_keyboard();
devfs_add_partition("nand0", 0x00000, SZ_128K, PARTITION_FIXED, "at91bootstrap_raw");
dev_add_bb_dev("at91bootstrap_raw", "at91bootstrap");

6
arch/arm/boards/at91sam9x5ek/env/config vendored
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@ -15,6 +15,8 @@ dhcp_vendor_id=barebox-at91sam9x5ek
kernel_loc=nfs
# can be either 'net', 'nor', 'nand' or 'initrd'
rootfs_loc=net
# can be either 'nfs', 'tftp', 'nand' or empty
oftree_loc=nfs
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
@ -27,8 +29,8 @@ kernelimage=zImage
#kernelimage=Image.lzo
nand_device=atmel_nand
nand_parts="256k(at91bootstrap),384k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),1152k(free),6M(kernel),120M(rootfs),-(data)"
rootfs_mtdblock_nand=5
nand_parts="128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),128k(oftree),1M(free),4M(kernel),120M(rootfs),-(data)"
rootfs_mtdblock_nand=7
autoboot_timeout=3

6
arch/arm/boards/beagle/board.c
View File

@ -294,12 +294,12 @@ mem_initcall(beagle_mem_init);
static int beagle_devices_init(void)
{
i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
add_generic_device("i2c-omap", -1, NULL, OMAP_I2C1_BASE, SZ_4K,
add_generic_device("i2c-omap", DEVICE_ID_DYNAMIC, NULL, OMAP_I2C1_BASE, SZ_4K,
IORESOURCE_MEM, NULL);
#ifdef CONFIG_USB_EHCI_OMAP
if (ehci_omap_init(&omap_ehci_pdata) >= 0)
add_usb_ehci_device(-1, OMAP_EHCI_BASE,
add_usb_ehci_device(DEVICE_ID_DYNAMIC, OMAP_EHCI_BASE,
OMAP_EHCI_BASE + 0x10, &ehci_pdata);
#endif /* CONFIG_USB_EHCI_OMAP */
#ifdef CONFIG_OMAP_GPMC
@ -309,7 +309,7 @@ static int beagle_devices_init(void)
gpmc_generic_nand_devices_init(0, 16,
OMAP_ECC_HAMMING_CODE_HW_ROMCODE, &omap3_nand_cfg);
add_generic_device("omap-hsmmc", -1, NULL, OMAP_MMC1_BASE, SZ_4K,
add_generic_device("omap-hsmmc", DEVICE_ID_DYNAMIC, NULL, OMAP_MMC1_BASE, SZ_4K,
IORESOURCE_MEM, NULL);
armlinux_set_bootparams((void *)0x80000100);

2
arch/arm/boards/chumby_falconwing/env/config vendored
View File

@ -1,6 +1,6 @@
#!/bin/sh
machine=falconwing
hostname=falconwing
# use 'dhcp' to do dhcp in barebox and in kernel
# use 'none' if you want to skip kernel ip autoconfiguration

5
arch/arm/boards/edb93xx/edb93xx.c
View File

@ -72,7 +72,8 @@ static int ep93xx_devices_init(void)
* Up to 32MiB NOR type flash, connected to
* CS line 6, data width is 16 bit
*/
add_generic_device("ep93xx_eth", -1, NULL, 0, 0, IORESOURCE_MEM, NULL);
add_generic_device("ep93xx_eth", DEVICE_ID_DYNAMIC, NULL, 0, 0, IORESOURCE_MEM,
NULL);
armlinux_set_bootparams((void *)CONFIG_EP93XX_SDRAM_BANK0_BASE + 0x100);
@ -101,7 +102,7 @@ static int edb93xx_console_init(void)
writel(0xAA, &syscon->sysswlock);
writel(value, &syscon->devicecfg);
add_generic_device("pl010_serial", -1, NULL, UART1_BASE, 4096,
add_generic_device("pl010_serial", DEVICE_ID_DYNAMIC, NULL, UART1_BASE, 4096,
IORESOURCE_MEM, NULL);
return 0;

14
arch/arm/boards/eukrea_cpuimx25/env/config vendored
View File

@ -3,7 +3,7 @@
# otg port mode : can be 'host' or 'device'
otg_mode="device"
machine=eukrea-cpuimx25
hostname=eukrea-cpuimx25
# use 'dhcp' to do dhcp in barebox and in kernel
# use 'none' if you want to skip kernel ip autoconfiguration
@ -22,16 +22,16 @@ rootfs_loc=nand
# rootfs
rootfs_type=ubifs
rootfsimage=$machine/rootfs.$rootfs_type
rootfsimage=$hostname/rootfs.$rootfs_type
# kernel
kernelimage=$machine/uImage-${machine}.bin
kernelimage=$hostname/uImage-${hostname}.bin
# barebox and it's env
bareboximage=$machine/barebox-${machine}.bin
bareboxenvimage=$machine/bareboxenv-${machine}.bin
bareboximage=$hostname/barebox-${hostname}.bin
bareboxenvimage=$hostname/bareboxenv-${hostname}.bin
nfsroot="$eth0.serverip:/srv/nfs/$machine"
nfsroot="$eth0.serverip:/srv/nfs/$hostname"
autoboot_timeout=1
@ -40,7 +40,7 @@ bootargs="console=ttymxc0,115200 otg_mode=$otg_mode"
nand_parts="256k(barebox)ro,128k(bareboxenv),3M(kernel),-(root)"
rootfs_mtdblock_nand=3
nand_device="mxc_nand"
ubiroot="$machine-rootfs"
ubiroot="$hostname-rootfs"
device_type="nand"
# set a fancy prompt (if support is compiled in)

6
arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
View File

@ -164,7 +164,7 @@ static int eukrea_cpuimx25_mem_init(void)
}
mem_initcall(eukrea_cpuimx25_mem_init);
static struct pad_desc eukrea_cpuimx25_pads[] = {
static iomux_v3_cfg_t eukrea_cpuimx25_pads[] = {
MX25_PAD_FEC_MDC__FEC_MDC,
MX25_PAD_FEC_MDIO__FEC_MDIO,
MX25_PAD_FEC_RDATA0__FEC_RDATA0,
@ -253,9 +253,9 @@ static int eukrea_cpuimx25_devices_init(void)
#ifdef CONFIG_USB
imx25_usb_init();
add_generic_usb_ehci_device(-1, IMX_OTG_BASE + 0x400, NULL);
add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, IMX_OTG_BASE + 0x400, NULL);
#endif
add_generic_device("fsl-udc", -1, NULL, IMX_OTG_BASE, 0x200,
add_generic_device("fsl-udc", DEVICE_ID_DYNAMIC, NULL, IMX_OTG_BASE, 0x200,
IORESOURCE_MEM, &usb_pdata);
armlinux_set_bootparams((void *)0x80000100);

1
arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c
View File

@ -32,7 +32,6 @@
#include <asm/armlinux.h>
#include <asm-generic/sections.h>
#include <generated/mach-types.h>
#include <mach/pmic.h>
#include <partition.h>
#include <fs.h>
#include <fcntl.h>

14
arch/arm/boards/eukrea_cpuimx35/env/config vendored
View File

@ -3,7 +3,7 @@
# otg port mode : can be 'host' or 'device'
otg_mode="device"
machine=eukrea-cpuimx35
hostname=eukrea-cpuimx35
# use 'dhcp' to do dhcp in barebox and in kernel
# use 'none' if you want to skip kernel ip autoconfiguration
@ -22,16 +22,16 @@ rootfs_loc=nand
# rootfs
rootfs_type=ubifs
rootfsimage=$machine/rootfs.$rootfs_type
rootfsimage=$hostname/rootfs.$rootfs_type
# kernel
kernelimage=$machine/uImage-${machine}.bin
kernelimage=$hostname/uImage-${hostname}.bin
# barebox and it's env
bareboximage=$machine/barebox-${machine}.bin
bareboxenvimage=$machine/bareboxenv-${machine}.bin
bareboximage=$hostname/barebox-${hostname}.bin
bareboxenvimage=$hostname/bareboxenv-${hostname}.bin
nfsroot="$eth0.serverip:/srv/nfs/$machine"
nfsroot="$eth0.serverip:/srv/nfs/$hostname"
autoboot_timeout=1
@ -40,7 +40,7 @@ bootargs="console=ttymxc0,115200 otg_mode=$otg_mode"
nand_parts="256k(barebox)ro,128k(bareboxenv),3M(kernel),-(root)"
rootfs_mtdblock_nand=3
nand_device="mxc_nand"
ubiroot="$machine-rootfs"
ubiroot="$hostname-rootfs"
device_type="nand"
# set a fancy prompt (if support is compiled in)

7
arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
View File

@ -48,7 +48,6 @@
#include <mach/imx-regs.h>
#include <mach/iomux-mx35.h>
#include <mach/iomux-v3.h>
#include <mach/pmic.h>
#include <mach/imx-ipu-fb.h>
#include <mach/imx-pll.h>
#include <i2c/i2c.h>
@ -163,13 +162,13 @@ static int eukrea_cpuimx35_devices_init(void)
#ifdef CONFIG_USB
imx35_usb_init();
add_generic_usb_ehci_device(-1, IMX_OTG_BASE + 0x400, NULL);
add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, IMX_OTG_BASE + 0x400, NULL);
#endif
#ifdef CONFIG_USB_GADGET
/* Workaround ENGcm09152 */
tmp = readl(IMX_OTG_BASE + 0x608);
writel(tmp | (1 << 23), IMX_OTG_BASE + 0x608);
add_generic_device("fsl-udc", -1, NULL, IMX_OTG_BASE, 0x200,
add_generic_device("fsl-udc", DEVICE_ID_DYNAMIC, NULL, IMX_OTG_BASE, 0x200,
IORESOURCE_MEM, &usb_pdata);
#endif
armlinux_set_bootparams((void *)0x80000100);
@ -180,7 +179,7 @@ static int eukrea_cpuimx35_devices_init(void)
device_initcall(eukrea_cpuimx35_devices_init);
static struct pad_desc eukrea_cpuimx35_pads[] = {
static iomux_v3_cfg_t eukrea_cpuimx35_pads[] = {
MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
MX35_PAD_FEC_RX_DV__FEC_RX_DV,

14
arch/arm/boards/eukrea_cpuimx51/env/config vendored
View File

@ -6,7 +6,7 @@ otg_mode="device"
# ex : 640x480M-16@60 800x600M-24@60 1024x768M-16@60
video="CMO-QVGA"
machine=eukrea-cpuimx51
hostname=eukrea-cpuimx51
# use 'dhcp' to do dhcp in barebox and in kernel
# use 'none' if you want to skip kernel ip autoconfiguration
@ -25,16 +25,16 @@ rootfs_loc=nand
# rootfs
rootfs_type=ubifs
rootfsimage=$machine/rootfs.$rootfs_type
rootfsimage=$hostname/rootfs.$rootfs_type
# kernel
kernelimage=$machine/uImage-${machine}.bin
kernelimage=$hostname/uImage-${hostname}.bin
# barebox and it's env
bareboximage=$machine/barebox-${machine}.bin
bareboxenvimage=$machine/bareboxenv-${machine}.bin
bareboximage=$hostname/barebox-${hostname}.bin
bareboxenvimage=$hostname/bareboxenv-${hostname}.bin
nfsroot="$eth0.serverip:/srv/nfs/$machine"
nfsroot="$eth0.serverip:/srv/nfs/$hostname"
autoboot_timeout=1
@ -49,7 +49,7 @@ bootargs="console=ttymxc0,115200 otg_mode=$otg_mode video=$video screen_type=$sc
nand_parts="256k(barebox)ro,128k(bareboxenv),3M(kernel),-(root)"
rootfs_mtdblock_nand=3
nand_device="mxc_nand"
ubiroot="$machine-rootfs"
ubiroot="$hostname-rootfs"
device_type="nand"
# set a fancy prompt (if support is compiled in)

4
arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c
View File

@ -52,7 +52,7 @@ struct imx_nand_platform_data nand_info = {
.flash_bbt = 1,
};
static struct pad_desc eukrea_cpuimx51_pads[] = {
static iomux_v3_cfg_t eukrea_cpuimx51_pads[] = {
/* FEC */
MX51_PAD_DISP2_DAT1__FEC_RX_ER,
MX51_PAD_DISP2_DAT15__FEC_TDATA0,
@ -139,7 +139,7 @@ static int eukrea_cpuimx51_console_init(void)
{
mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx51_pads, ARRAY_SIZE(eukrea_cpuimx51_pads));
imx51_init_lowlevel();
imx51_init_lowlevel(800);
writel(0, 0x73fa8228);
writel(0, 0x73fa822c);

2
arch/arm/boards/freescale-mx25-3-stack/3stack.c
View File

@ -243,7 +243,7 @@ static int imx25_devices_init(void)
device_initcall(imx25_devices_init);
static struct pad_desc imx25_pads[] = {
static iomux_v3_cfg_t imx25_pads[] = {
MX25_PAD_FEC_MDC__FEC_MDC,
MX25_PAD_FEC_MDIO__FEC_MDIO,
MX25_PAD_FEC_RDATA0__FEC_RDATA0,

12
arch/arm/boards/freescale-mx28-evk/env/config vendored
View File

@ -1,6 +1,6 @@
#!/bin/sh
machine=mx28-evk
hostname=mx28-evk
#user=
# use 'dhcp' to do dhcp in barebox and in kernel
@ -24,21 +24,21 @@ rootfs_loc=net
rootfs_type=ext2
# where is the rootfs in case of 'rootfs_loc=disk' (linux name)
rootfs_part_linux_dev=mmcblk0p4
rootfsimage=rootfs-${machine}.$rootfs_type
rootfsimage=rootfs-${hostname}.$rootfs_type
# where is the kernel image in case of 'kernel_loc=disk'
kernel_part=disk0.2
kernelimage=zImage-$machine
bareboximage=barebox-${machine}.bin
bareboxenvimage=barebox-${machine}.bin
kernelimage=zImage-$hostname
bareboximage=barebox-${hostname}.bin
bareboxenvimage=barebox-${hostname}.bin
if [ -n $user ]; then
bareboximage="$user"-"$bareboximage"
bareboxenvimage="$user"-"$bareboxenvimage"
kernelimage="$user"-"$kernelimage"
rootfsimage="$user"-"$rootfsimage"
nfsroot="/home/$user/nfsroot/$machine"
nfsroot="/home/$user/nfsroot/$hostname"
else
nfsroot="/path/to/nfs/root"
fi

35
arch/arm/boards/freescale-mx35-3-stack/3stack.c
View File

@ -46,13 +46,12 @@
#include <mach/imx-regs.h>
#include <mach/iomux-mx35.h>
#include <mach/iomux-v3.h>
#include <mach/pmic.h>
#include <mach/imx-ipu-fb.h>
#include <mach/generic.h>
#include <mach/devices-imx35.h>
#include <i2c/i2c.h>
#include <mfd/mc13892.h>
#include <mfd/mc13xxx.h>
#include <mfd/mc9sdz60.h>
@ -72,7 +71,7 @@ struct imx_nand_platform_data nand_info = {
static struct i2c_board_info i2c_devices[] = {
{
I2C_BOARD_INFO("mc13892-i2c", 0x08),
I2C_BOARD_INFO("mc13xxx-i2c", 0x08),
}, {
I2C_BOARD_INFO("mc9sdz60", 0x69),
},
@ -182,7 +181,7 @@ static int f3s_devices_init(void)
imx35_add_i2c0(NULL);
imx35_add_fec(&fec_info);
add_generic_device("smc911x", -1, NULL, IMX_CS5_BASE, IMX_CS5_RANGE,
add_generic_device("smc911x", DEVICE_ID_DYNAMIC, NULL, IMX_CS5_BASE, IMX_CS5_RANGE,
IORESOURCE_MEM, NULL);
imx35_add_mmc0(NULL);
@ -207,7 +206,7 @@ static int f3s_enable_display(void)
late_initcall(f3s_enable_display);
static struct pad_desc f3s_pads[] = {
static iomux_v3_cfg_t f3s_pads[] = {
MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
MX35_PAD_FEC_RX_DV__FEC_RX_DV,
@ -353,33 +352,33 @@ static int f3s_core_init(void)
core_initcall(f3s_core_init);
static int f3s_get_rev(struct mc13892 *mc13892)
static int f3s_get_rev(struct mc13xxx *mc13xxx)
{
u32 rev;
int err;
err = mc13892_reg_read(mc13892, MC13892_REG_IDENTIFICATION, &rev);
err = mc13xxx_reg_read(mc13xxx, MC13XXX_REG_IDENTIFICATION, &rev);
if (err)
return err;
dev_info(&mc13892->client->dev, "revision: 0x%x\n", rev);
dev_info(&mc13xxx->client->dev, "revision: 0x%x\n", rev);
if (rev == 0x00ffffff)
return -ENODEV;
return ((rev >> 6) & 0x7) ? MX35PDK_BOARD_REV_2 : MX35PDK_BOARD_REV_1;
}
static int f3s_pmic_init_v2(struct mc13892 *mc13892)
static int f3s_pmic_init_v2(struct mc13xxx *mc13xxx)
{
int err = 0;
/* COMPARE pin (GPIO1_5) as output and set high */
gpio_direction_output( 32*0 + 5 , 1);
err |= mc13892_set_bits(mc13892, MC13892_REG_SETTING_0, 0x03, 0x03);
err |= mc13892_set_bits(mc13892, MC13892_REG_MODE_0, 0x01, 0x01);
err |= mc13xxx_set_bits(mc13xxx, MC13892_REG_SETTING_0, 0x03, 0x03);
err |= mc13xxx_set_bits(mc13xxx, MC13892_REG_MODE_0, 0x01, 0x01);
if (err)
dev_err(&mc13892->client->dev,
dev_err(&mc13xxx->client->dev,
"Init sequence failed, the system might not be working!\n");
return err;
@ -404,22 +403,22 @@ static int f3s_pmic_init_all(struct mc9sdz60 *mc9sdz60)
static int f3s_pmic_init(void)
{
struct mc13892 *mc13892;
struct mc13xxx *mc13xxx;
struct mc9sdz60 *mc9sdz60;
int rev;
mc13892 = mc13892_get();
if (!mc13892) {
printf("FAILED to get mc13892 handle!\n");
mc13xxx = mc13xxx_get();
if (!mc13xxx) {
printf("FAILED to get PMIC handle!\n");
return 0;
}
rev = f3s_get_rev(mc13892);
rev = f3s_get_rev(mc13xxx);
switch (rev) {
case MX35PDK_BOARD_REV_1:
break;
case MX35PDK_BOARD_REV_2:
f3s_pmic_init_v2(mc13892);
f3s_pmic_init_v2(mc13xxx);
break;
default:
printf("FAILED to identify board revision!\n");

14
arch/arm/boards/freescale-mx35-3-stack/env/config vendored
View File

@ -1,6 +1,6 @@
#!/bin/sh
machine=mx35-3stack
hostname=mx35-3stack
eth0.serverip=
user=
@ -21,16 +21,16 @@ rootfs_loc=net
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root-$machine.$rootfs_type
rootfsimage=root-$hostname.$rootfs_type
kernelimage=zImage-$machine
#kernelimage=uImage-$machine
#kernelimage=Image-$machine
#kernelimage=Image-$machine.lzo
kernelimage=zImage-$hostname
#kernelimage=uImage-$hostname
#kernelimage=Image-$hostname
#kernelimage=Image-$hostname.lzo
if [ -n $user ]; then
kernelimage="$user"-"$kernelimage"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$machine"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$hostname"
rootfsimage="$user"-"$rootfsimage"
else
nfsroot="$eth0.serverip:/path/to/nfs/root"

90
arch/arm/boards/freescale-mx51-pdk/board.c
View File

@ -32,7 +32,7 @@
#include <nand.h>
#include <notifier.h>
#include <spi/spi.h>
#include <mfd/mc13892.h>
#include <mfd/mc13xxx.h>
#include <io.h>
#include <asm/mmu.h>
#include <mach/imx5.h>
@ -47,7 +47,7 @@ static struct fec_platform_data fec_info = {
.xcv_type = MII100,
};
static struct pad_desc f3s_pads[] = {
static iomux_v3_cfg_t f3s_pads[] = {
MX51_PAD_EIM_EB2__FEC_MDIO,
MX51_PAD_EIM_EB3__FEC_RDATA1,
MX51_PAD_EIM_CS2__FEC_RDATA2,
@ -56,7 +56,7 @@ static struct pad_desc f3s_pads[] = {
MX51_PAD_EIM_CS5__FEC_CRS,
MX51_PAD_NANDF_RB2__FEC_COL,
MX51_PAD_NANDF_RB3__FEC_RX_CLK,
MX51_PAD_NANDF_RB7__FEC_TX_ER,
MX51_PAD_NANDF_CS2__FEC_TX_ER,
MX51_PAD_NANDF_CS3__FEC_MDC,
MX51_PAD_NANDF_CS4__FEC_TDATA1,
MX51_PAD_NANDF_CS5__FEC_TDATA2,
@ -64,13 +64,13 @@ static struct pad_desc f3s_pads[] = {
MX51_PAD_NANDF_CS7__FEC_TX_EN,
MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK,
MX51_PAD_NANDF_D11__FEC_RX_DV,
MX51_PAD_NANDF_RB6__FEC_RDATA0,
MX51_PAD_NANDF_D9__FEC_RDATA0,
MX51_PAD_NANDF_D8__FEC_TDATA0,
MX51_PAD_CSPI1_SS0__CSPI1_SS0,
MX51_PAD_CSPI1_MOSI__CSPI1_MOSI,
MX51_PAD_CSPI1_MISO__CSPI1_MISO,
MX51_PAD_CSPI1_RDY__CSPI1_RDY,
MX51_PAD_CSPI1_SCLK__CSPI1_SCLK,
MX51_PAD_CSPI1_SS0__GPIO4_24,
MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,
MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
MX51_PAD_CSPI1_RDY__ECSPI1_RDY,
MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
MX51_PAD_EIM_A20__GPIO2_14, /* LAN8700 reset pin */
IOMUX_PAD(0x60C, 0x21C, 3, 0x0, 0, 0x85), /* FIXME: needed? */
/* SD 1 */
@ -110,7 +110,7 @@ static struct spi_imx_master spi_0_data = {
static const struct spi_board_info mx51_babbage_spi_board_info[] = {
{
.name = "mc13892-spi",
.name = "mc13xxx-spi",
.max_speed_hz = 300000,
.bus_num = 0,
.chip_select = 0,
@ -121,101 +121,101 @@ static const struct spi_board_info mx51_babbage_spi_board_info[] = {
static void babbage_power_init(void)
{
struct mc13892 *mc13892;
struct mc13xxx *mc13xxx;
u32 val;
mc13892 = mc13892_get();
if (!mc13892) {
printf("could not get mc13892\n");
mc13xxx = mc13xxx_get();
if (!mc13xxx) {
printf("could not get PMIC\n");
return;
}
/* Write needed to Power Gate 2 register */
mc13892_reg_read(mc13892, MC13892_REG_POWER_MISC, &val);
mc13xxx_reg_read(mc13xxx, MC13892_REG_POWER_MISC, &val);
val &= ~0x10000;
mc13892_reg_write(mc13892, MC13892_REG_POWER_MISC, val);
mc13xxx_reg_write(mc13xxx, MC13892_REG_POWER_MISC, val);
/* Write needed to update Charger 0 */
mc13892_reg_write(mc13892, MC13892_REG_CHARGE, 0x0023807F);
mc13xxx_reg_write(mc13xxx, MC13892_REG_CHARGE, 0x0023807F);
/* power up the system first */
mc13892_reg_write(mc13892, MC13892_REG_POWER_MISC, 0x00200000);
mc13xxx_reg_write(mc13xxx, MC13892_REG_POWER_MISC, 0x00200000);
if (imx_silicon_revision() < MX51_CHIP_REV_3_0) {
if (imx_silicon_revision() < IMX_CHIP_REV_3_0) {
/* Set core voltage to 1.1V */
mc13892_reg_read(mc13892, MC13892_REG_SW_0, &val);
mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_0, &val);
val &= ~0x1f;
val |= 0x14;
mc13892_reg_write(mc13892, MC13892_REG_SW_0, val);
mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_0, val);
/* Setup VCC (SW2) to 1.25 */
mc13892_reg_read(mc13892, MC13892_REG_SW_1, &val);
mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_1, &val);
val &= ~0x1f;
val |= 0x1a;
mc13892_reg_write(mc13892, MC13892_REG_SW_1, val);
mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_1, val);
/* Setup 1V2_DIG1 (SW3) to 1.25 */
mc13892_reg_read(mc13892, MC13892_REG_SW_2, &val);
mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_2, &val);
val &= ~0x1f;
val |= 0x1a;
mc13892_reg_write(mc13892, MC13892_REG_SW_2, val);
mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_2, val);
} else {
/* Setup VCC (SW2) to 1.225 */
mc13892_reg_read(mc13892, MC13892_REG_SW_1, &val);
mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_1, &val);
val &= ~0x1f;
val |= 0x19;
mc13892_reg_write(mc13892, MC13892_REG_SW_1, val);
mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_1, val);
/* Setup 1V2_DIG1 (SW3) to 1.2 */
mc13892_reg_read(mc13892, MC13892_REG_SW_2, &val);
mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_2, &val);
val &= ~0x1f;
val |= 0x18;
mc13892_reg_write(mc13892, MC13892_REG_SW_2, val);
mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_2, val);
}
if (mc13892_get_revision(mc13892) < MC13892_REVISION_2_0) {
if (mc13xxx->revision < MC13892_REVISION_2_0) {
/* Set switchers in PWM mode for Atlas 2.0 and lower */
/* Setup the switcher mode for SW1 & SW2*/
mc13892_reg_read(mc13892, MC13892_REG_SW_4, &val);
mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_4, &val);
val &= ~0x3c0f;
val |= 0x1405;
mc13892_reg_write(mc13892, MC13892_REG_SW_4, val);
mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_4, val);
/* Setup the switcher mode for SW3 & SW4 */
mc13892_reg_read(mc13892, MC13892_REG_SW_5, &val);
mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_5, &val);
val &= ~0xf0f;
val |= 0x505;
mc13892_reg_write(mc13892, MC13892_REG_SW_5, val);
mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_5, val);
} else {
/* Set switchers in Auto in NORMAL mode & STANDBY mode for Atlas 2.0a */
/* Setup the switcher mode for SW1 & SW2*/
mc13892_reg_read(mc13892, MC13892_REG_SW_4, &val);
mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_4, &val);
val &= ~0x3c0f;
val |= 0x2008;
mc13892_reg_write(mc13892, MC13892_REG_SW_4, val);
mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_4, val);
/* Setup the switcher mode for SW3 & SW4 */
mc13892_reg_read(mc13892, MC13892_REG_SW_5, &val);
mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_5, &val);
val &= ~0xf0f;
val |= 0x808;
mc13892_reg_write(mc13892, MC13892_REG_SW_5, val);
mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_5, val);
}
/* Set VDIG to 1.65V, VGEN3 to 1.8V, VCAM to 2.5V */
mc13892_reg_read(mc13892, MC13892_REG_SETTING_0, &val);
mc13xxx_reg_read(mc13xxx, MC13892_REG_SETTING_0, &val);
val &= ~0x34030;
val |= 0x10020;
mc13892_reg_write(mc13892, MC13892_REG_SETTING_0, val);
mc13xxx_reg_write(mc13xxx, MC13892_REG_SETTING_0, val);
/* Set VVIDEO to 2.775V, VAUDIO to 3V, VSD to 3.15V */
mc13892_reg_read(mc13892, MC13892_REG_SETTING_1, &val);
mc13xxx_reg_read(mc13xxx, MC13892_REG_SETTING_1, &val);
val &= ~0x1FC;
val |= 0x1F4;
mc13892_reg_write(mc13892, MC13892_REG_SETTING_1, val);
mc13xxx_reg_write(mc13xxx, MC13892_REG_SETTING_1, val);
/* Configure VGEN3 and VCAM regulators to use external PNP */
val = 0x208;
mc13892_reg_write(mc13892, MC13892_REG_MODE_1, val);
mc13xxx_reg_write(mc13xxx, MC13892_REG_MODE_1, val);
udelay(200);
#define GPIO_LAN8700_RESET (1 * 32 + 14)
@ -224,7 +224,7 @@ static void babbage_power_init(void)
/* Enable VGEN3, VCAM, VAUDIO, VVIDEO, VSD regulators */
val = 0x49249;
mc13892_reg_write(mc13892, MC13892_REG_MODE_1, val);
mc13xxx_reg_write(mc13xxx, MC13892_REG_MODE_1, val);
udelay(500);
@ -244,7 +244,7 @@ static int f3s_devices_init(void)
babbage_power_init();
console_flush();
imx51_init_lowlevel();
imx51_init_lowlevel(800);
clock_notifier_call_chain();
armlinux_set_bootparams((void *)0x90000100);

14
arch/arm/boards/freescale-mx51-pdk/env/config vendored
View File

@ -1,6 +1,6 @@
#!/bin/sh
machine=babbage
hostname=babbage
eth0.serverip=
user=
@ -21,16 +21,16 @@ rootfs_loc=net
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root-$machine.$rootfs_type
rootfsimage=root-$hostname.$rootfs_type
kernelimage=zImage-$machine
#kernelimage=uImage-$machine
#kernelimage=Image-$machine
#kernelimage=Image-$machine.lzo
kernelimage=zImage-$hostname
#kernelimage=uImage-$hostname
#kernelimage=Image-$hostname
#kernelimage=Image-$hostname.lzo
if [ -n $user ]; then
kernelimage="$user"-"$kernelimage"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$machine"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$hostname"
rootfsimage="$user"-"$rootfsimage"
else
nfsroot="$eth0.serverip:/path/to/nfs/root"

19
arch/arm/boards/freescale-mx53-loco/board.c
View File

@ -47,7 +47,7 @@ static struct fec_platform_data fec_info = {
.xcv_type = RMII,
};
static struct pad_desc loco_pads[] = {
static iomux_v3_cfg_t loco_pads[] = {
/* UART1 */
MX53_PAD_CSI0_DAT10__UART1_TXD_MUX,
MX53_PAD_CSI0_DAT11__UART1_RXD_MUX,
@ -95,6 +95,8 @@ static struct pad_desc loco_pads[] = {
/* I2C0 */
MX53_PAD_CSI0_DAT8__I2C1_SDA,
MX53_PAD_CSI0_DAT9__I2C1_SCL,
MX53_PAD_PATA_DA_2__GPIO7_8,
};
static struct i2c_board_info i2c_devices[] = {
@ -149,6 +151,7 @@ static void loco_fec_reset(void)
#define LOCO_SD3_CD IMX_GPIO_NR(3, 11)
#define LOCO_SD3_WP IMX_GPIO_NR(3, 12)
#define LOCO_SD1_CD IMX_GPIO_NR(3, 13)
#define MX53_LOCO_USB_PWREN IMX_GPIO_NR(7, 8)
static struct esdhc_platform_data loco_sd1_data = {
.cd_gpio = LOCO_SD1_CD,
@ -163,8 +166,19 @@ static struct esdhc_platform_data loco_sd3_data = {
.wp_type = ESDHC_WP_GPIO,
};
static void loco_ehci_init(void)
{
/* USB PWR enable */
gpio_direction_output(MX53_LOCO_USB_PWREN, 0);
gpio_set_value(MX53_LOCO_USB_PWREN, 1);
writel(0, MX53_OTG_BASE_ADDR + 0x384); /* setup portsc */
add_generic_usb_ehci_device(1, MX53_OTG_BASE_ADDR + 0x200, NULL);
}
static int loco_devices_init(void)
{
imx53_iim_register_fec_ethaddr();
imx53_add_fec(&fec_info);
imx53_add_mmc0(&loco_sd1_data);
@ -172,6 +186,9 @@ static int loco_devices_init(void)
i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
imx53_add_i2c0(NULL);
if (IS_ENABLED(CONFIG_USB_EHCI))
loco_ehci_init();
loco_fec_reset();
set_silicon_rev(imx_silicon_revision());

15
arch/arm/boards/freescale-mx53-loco/env/config vendored
View File

@ -1,12 +1,13 @@
#!/bin/sh
machine=loco
hostname=loco
eth0.serverip=
user=
# use 'dhcp' to do dhcp in barebox and in kernel
# use 'none' if you want to skip kernel ip autoconfiguration
ip=dhcp
dhcp_vendor_id=barebox-mx53-loco
# or set your networking parameters here
#eth0.ipaddr=a.b.c.d
@ -21,16 +22,16 @@ rootfs_loc=net
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root-$machine.$rootfs_type
rootfsimage=root-$hostname.$rootfs_type
kernelimage=zImage-$machine
#kernelimage=uImage-$machine
#kernelimage=Image-$machine
#kernelimage=Image-$machine.lzo
kernelimage=zImage-$hostname
#kernelimage=uImage-$hostname
#kernelimage=Image-$hostname
#kernelimage=Image-$hostname.lzo
if [ -n $user ]; then
kernelimage="$user"-"$kernelimage"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$machine"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$hostname"
rootfsimage="$user"-"$rootfsimage"
else
nfsroot="$eth0.serverip:/path/to/nfs/root"

2
arch/arm/boards/freescale-mx53-smd/board.c
View File

@ -44,7 +44,7 @@ static struct fec_platform_data fec_info = {
.xcv_type = RMII,
};
static struct pad_desc smd_pads[] = {
static iomux_v3_cfg_t smd_pads[] = {
/* UART1 */
MX53_PAD_CSI0_DAT10__UART1_TXD_MUX,
MX53_PAD_CSI0_DAT11__UART1_RXD_MUX,

14
arch/arm/boards/freescale-mx53-smd/env/config vendored
View File

@ -1,6 +1,6 @@
#!/bin/sh
machine=loco
hostname=loco
eth0.serverip=
user=
@ -21,16 +21,16 @@ rootfs_loc=net
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root-$machine.$rootfs_type
rootfsimage=root-$hostname.$rootfs_type
kernelimage=zImage-$machine
#kernelimage=uImage-$machine
#kernelimage=Image-$machine
#kernelimage=Image-$machine.lzo
kernelimage=zImage-$hostname
#kernelimage=uImage-$hostname
#kernelimage=Image-$hostname
#kernelimage=Image-$hostname.lzo
if [ -n $user ]; then
kernelimage="$user"-"$kernelimage"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$machine"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$hostname"
rootfsimage="$user"-"$rootfsimage"
else
nfsroot="$eth0.serverip:/path/to/nfs/root"

1
arch/arm/boards/freescale-mx6-arm2/Makefile Normal file
View File

@ -0,0 +1 @@
obj-y += board.o flash_header.o

173
arch/arm/boards/freescale-mx6-arm2/board.c Normal file
View File

@ -0,0 +1,173 @@
/*
* Copyright (C) 2012 Sascha Hauer, Pengutronix
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation.
*
*/
#include <common.h>
#include <init.h>
#include <environment.h>
#include <mach/imx-regs.h>
#include <fec.h>
#include <mach/gpio.h>
#include <asm/armlinux.h>
#include <generated/mach-types.h>
#include <partition.h>
#include <miidev.h>
#include <asm/io.h>
#include <asm/mmu.h>
#include <mach/generic.h>
#include <sizes.h>
#include <mach/imx6.h>
#include <mach/devices-imx6.h>
#include <mach/iomux-mx6.h>
static iomux_v3_cfg_t arm2_pads[] = {
/* UART1 */
MX6Q_PAD_KEY_COL0__UART4_TXD,
MX6Q_PAD_KEY_ROW0__UART4_RXD,
MX6Q_PAD_SD1_CLK__USDHC1_CLK,
MX6Q_PAD_SD1_CMD__USDHC1_CMD,
MX6Q_PAD_SD1_DAT0__USDHC1_DAT0,
MX6Q_PAD_SD1_DAT1__USDHC1_DAT1,
MX6Q_PAD_SD1_DAT2__USDHC1_DAT2,
MX6Q_PAD_SD1_DAT3__USDHC1_DAT3,
MX6Q_PAD_SD2_CLK__USDHC2_CLK,
MX6Q_PAD_SD2_CMD__USDHC2_CMD,
MX6Q_PAD_SD2_DAT0__USDHC2_DAT0,
MX6Q_PAD_SD2_DAT1__USDHC2_DAT1,
MX6Q_PAD_SD2_DAT2__USDHC2_DAT2,
MX6Q_PAD_SD2_DAT3__USDHC2_DAT3,
MX6Q_PAD_SD3_CLK__USDHC3_CLK,
MX6Q_PAD_SD3_CMD__USDHC3_CMD,
MX6Q_PAD_SD3_DAT0__USDHC3_DAT0,
MX6Q_PAD_SD3_DAT1__USDHC3_DAT1,
MX6Q_PAD_SD3_DAT2__USDHC3_DAT2,
MX6Q_PAD_SD3_DAT3__USDHC3_DAT3,
MX6Q_PAD_SD3_DAT4__USDHC3_DAT4,
MX6Q_PAD_SD3_DAT5__USDHC3_DAT5,
MX6Q_PAD_SD3_DAT6__USDHC3_DAT6,
MX6Q_PAD_SD3_DAT7__USDHC3_DAT7,
MX6Q_PAD_GPIO_18__USDHC3_VSELECT,
MX6Q_PAD_SD4_CLK__USDHC4_CLK,
MX6Q_PAD_SD4_CMD__USDHC4_CMD,
MX6Q_PAD_SD4_DAT0__USDHC4_DAT0,
MX6Q_PAD_SD4_DAT1__USDHC4_DAT1,
MX6Q_PAD_SD4_DAT2__USDHC4_DAT2,
MX6Q_PAD_SD4_DAT3__USDHC4_DAT3,
MX6Q_PAD_SD4_DAT4__USDHC4_DAT4,
MX6Q_PAD_SD4_DAT5__USDHC4_DAT5,
MX6Q_PAD_SD4_DAT6__USDHC4_DAT6,
MX6Q_PAD_SD4_DAT7__USDHC4_DAT7,
MX6Q_PAD_KEY_COL1__ENET_MDIO,
MX6Q_PAD_KEY_COL2__ENET_MDC,
MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC,
MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0,
MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1,
MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2,
MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3,
MX6Q_PAD_RGMII_TX_CTL__ENET_RGMII_TX_CTL,
MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK,
MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC,
MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0,
MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1,
MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2,
MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3,
MX6Q_PAD_RGMII_RX_CTL__ENET_RGMII_RX_CTL,
MX6Q_PAD_GPIO_0__CCM_CLKO,
MX6Q_PAD_GPIO_3__CCM_CLKO2,
};
static int arm2_mem_init(void)
{
arm_add_mem_device("ram0", 0x10000000, SZ_2G);
return 0;
}
mem_initcall(arm2_mem_init);
static struct fec_platform_data fec_info = {
.xcv_type = RGMII,
.phy_addr = 0,
};
static int mx6_rgmii_rework(void)
{
struct mii_device *mdev;
u16 val;
mdev = mii_open("phy0");
if (!mdev) {
printf("unable to open phy0\n");
return -ENODEV;
}
/* To enable AR8031 ouput a 125MHz clk from CLK_25M */
mii_write(mdev, mdev->address, 0xd, 0x7);
mii_write(mdev, mdev->address, 0xe, 0x8016);
mii_write(mdev, mdev->address, 0xd, 0x4007);
val = mii_read(mdev, mdev->address, 0xe);
val &= 0xffe3;
val |= 0x18;
mii_write(mdev, mdev->address, 0xe, val);
/* introduce tx clock delay */
mii_write(mdev, mdev->address, 0x1d, 0x5);
val = mii_read(mdev, mdev->address, 0x1e);
val |= 0x0100;
mii_write(mdev, mdev->address, 0x1e, val);
mii_close(mdev);
return 0;
}
static int arm2_devices_init(void)
{
imx6_add_mmc3(NULL);
imx6_add_fec(&fec_info);
mx6_rgmii_rework();
armlinux_set_bootparams((void *)0x10000100);
armlinux_set_architecture(3837);
devfs_add_partition("disk0", 0, SZ_1M, PARTITION_FIXED, "self0");
devfs_add_partition("disk0", SZ_1M + SZ_1M, SZ_512K, PARTITION_FIXED, "env0");
return 0;
}
device_initcall(arm2_devices_init);
static int arm2_console_init(void)
{
mxc_iomux_v3_setup_multiple_pads(arm2_pads, ARRAY_SIZE(arm2_pads));
imx6_init_lowlevel();
imx6_add_uart3();
return 0;
}
console_initcall(arm2_console_init);

4
arch/arm/boards/freescale-mx6-arm2/config.h Normal file
View File

@ -0,0 +1,4 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#endif /* __CONFIG_H */

47
arch/arm/boards/freescale-mx6-arm2/env/config vendored Normal file
View File

@ -0,0 +1,47 @@
#!/bin/sh
machine=armadillo2
serverip=
user=
# use 'dhcp' to do dhcp in barebox and in kernel
# use 'none' if you want to skip kernel ip autoconfiguration
ip=dhcp
# or set your networking parameters here
#eth0.ipaddr=a.b.c.d
#eth0.netmask=a.b.c.d
#eth0.gateway=a.b.c.d
#eth0.serverip=a.b.c.d
# can be either 'nfs', 'tftp', 'nor' or 'nand'
kernel_loc=tftp
# can be either 'net', 'nor', 'nand' or 'initrd'
rootfs_loc=disk
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root-$machine.$rootfs_type
# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo
kernelimage=zImage-$machine
if [ -n $user ]; then
kernelimage="$user"-"$kernelimage"
nfsroot="$serverip:/home/$user/nfsroot/$machine"
rootfsimage="$user"-"$rootfsimage"
else
nfsroot="$serverip:/path/to/nfs/root"
fi
autoboot_timeout=3
bootargs="console=ttymxc2,115200"
disk_parts="1M(barebox)ro,3M(bareboxenv),4M(kernel),-(root)"
rootfs_part_linux_dev=sda1
rootfs_type=ext2
# set a fancy prompt (if support is compiled in)
PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m "

170
arch/arm/boards/freescale-mx6-arm2/flash_header.c Normal file
View File

@ -0,0 +1,170 @@
/*
* Copyright (C) 2011 Marc Kleine-Budde <mkl@pengutronix.de>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <common.h>
#include <asm/byteorder.h>
#include <mach/imx-flash-header.h>
#include <mach/imx6-regs.h>
void __naked __flash_header_start go(void)
{
__asm__ __volatile__("b exception_vectors\n");
}
#define DCD(a, v) { .addr = cpu_to_be32(a), .val = cpu_to_be32(v), }
struct imx_dcd_v2_entry __dcd_entry_section dcd_entry[] = {
DCD(MX6_IOMUXC_BASE_ADDR + 0x5a8, 0x00000030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x5b0, 0x00000030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x524, 0x00000030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x51c, 0x00000030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x518, 0x00000030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x50c, 0x00000030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x5b8, 0x00000030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x5c0, 0x00000030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x5ac, 0x00020030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x5b4, 0x00020030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x528, 0x00020030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x520, 0x00020030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x514, 0x00020030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x510, 0x00020030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x5bc, 0x00020030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x5c4, 0x00020030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x56c, 0x00020030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x578, 0x00020030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x588, 0x00020030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x594, 0x00020030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x57c, 0x00020030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x590, 0x00003000),
DCD(MX6_IOMUXC_BASE_ADDR + 0x598, 0x00003000),
DCD(MX6_IOMUXC_BASE_ADDR + 0x58c, 0x00000000),
DCD(MX6_IOMUXC_BASE_ADDR + 0x59c, 0x00003030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x5a0, 0x00003030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x784, 0x00000030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x788, 0x00000030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x794, 0x00000030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x79c, 0x00000030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x7a0, 0x00000030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x7a4, 0x00000030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x7a8, 0x00000030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x748, 0x00000030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x74c, 0x00000030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x750, 0x00020000),
DCD(MX6_IOMUXC_BASE_ADDR + 0x758, 0x00000000),
DCD(MX6_IOMUXC_BASE_ADDR + 0x774, 0x00020000),
DCD(MX6_IOMUXC_BASE_ADDR + 0x78c, 0x00000030),
DCD(MX6_IOMUXC_BASE_ADDR + 0x798, 0x000C0000),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x81c, 0x33333333),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x820, 0x33333333),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x824, 0x33333333),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x828, 0x33333333),
DCD(MX6_MMDC_P1_BASE_ADDR + 0x81c, 0x33333333),
DCD(MX6_MMDC_P1_BASE_ADDR + 0x820, 0x33333333),
DCD(MX6_MMDC_P1_BASE_ADDR + 0x824, 0x33333333),
DCD(MX6_MMDC_P1_BASE_ADDR + 0x828, 0x33333333),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x018, 0x00081740),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x00008000),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x00c, 0x555A7975),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x010, 0xFF538E64),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x014, 0x01FF00DB),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x02c, 0x000026D2),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x030, 0x005B0E21),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x008, 0x09444040),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x004, 0x00025576),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x040, 0x00000027),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x000, 0xC31A0000),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x04088032),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x0408803A),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x00008033),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x0000803B),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x00428031),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x00428039),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x09408030),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x09408038),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x04008040),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x04008048),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x800, 0xA1380003),
DCD(MX6_MMDC_P1_BASE_ADDR + 0x800, 0xA1380003),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x020, 0x00005800),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x818, 0x00022227),
DCD(MX6_MMDC_P1_BASE_ADDR + 0x818, 0x00022227),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x83c, 0x434B0350),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x840, 0x034C0359),
DCD(MX6_MMDC_P1_BASE_ADDR + 0x83c, 0x434B0350),
DCD(MX6_MMDC_P1_BASE_ADDR + 0x840, 0x03650348),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x848, 0x4436383B),
DCD(MX6_MMDC_P1_BASE_ADDR + 0x848, 0x39393341),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x850, 0x35373933),
DCD(MX6_MMDC_P1_BASE_ADDR + 0x850, 0x48254A36),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x80c, 0x001F001F),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x810, 0x001F001F),
DCD(MX6_MMDC_P1_BASE_ADDR + 0x80c, 0x00440044),
DCD(MX6_MMDC_P1_BASE_ADDR + 0x810, 0x00440044),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x8b8, 0x00000800),
DCD(MX6_MMDC_P1_BASE_ADDR + 0x8b8, 0x00000800),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x00000000),
DCD(MX6_MMDC_P0_BASE_ADDR + 0x404, 0x00011006),
/* enable AXI cache for VDOA/VPU/IPU */
DCD(MX6_IOMUXC_BASE_ADDR + 0x010, 0xf00000ff),
/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
DCD(MX6_IOMUXC_BASE_ADDR + 0x018, 0x007f007f),
DCD(MX6_IOMUXC_BASE_ADDR + 0x01c, 0x007f007f),
};
#define APP_DEST CONFIG_TEXT_BASE
struct imx_flash_header_v2 __flash_header_section flash_header = {
.header.tag = IVT_HEADER_TAG,
.header.length = cpu_to_be16(32),
.header.version = IVT_VERSION,
.entry = APP_DEST + 0x1000,
.dcd_ptr = APP_DEST + 0x400 + offsetof(struct imx_flash_header_v2, dcd),
.boot_data_ptr = APP_DEST + 0x400 + offsetof(struct imx_flash_header_v2, boot_data),
.self = APP_DEST + 0x400,
.boot_data.start = APP_DEST,
.boot_data.size = 0x40000,
.dcd.header.tag = DCD_HEADER_TAG,
.dcd.header.length = cpu_to_be16(sizeof(struct imx_dcd) + sizeof(dcd_entry)),
.dcd.header.version = DCD_VERSION,
.dcd.command.tag = DCD_COMMAND_WRITE_TAG,
.dcd.command.length = cpu_to_be16(sizeof(struct imx_dcd_command) + sizeof(dcd_entry)),
.dcd.command.param = DCD_COMMAND_WRITE_PARAM,
};

2
arch/arm/boards/guf-cupid/board.c
View File

@ -146,7 +146,7 @@ static int cupid_devices_init(void)
device_initcall(cupid_devices_init);
static struct pad_desc cupid_pads[] = {
static iomux_v3_cfg_t cupid_pads[] = {
/* UART1 */
MX35_PAD_CTS1__UART1_CTS,
MX35_PAD_RTS1__UART1_RTS,

14
arch/arm/boards/guf-cupid/env/config vendored
View File

@ -1,6 +1,6 @@
#!/bin/sh
machine=cupid
hostname=cupid
eth0.serverip=
user=
@ -21,16 +21,16 @@ rootfs_loc=net
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root-$machine.$rootfs_type
rootfsimage=root-$hostname.$rootfs_type
kernelimage=zImage-$machine
#kernelimage=uImage-$machine
#kernelimage=Image-$machine
#kernelimage=Image-$machine.lzo
kernelimage=zImage-$hostname
#kernelimage=uImage-$hostname
#kernelimage=Image-$hostname
#kernelimage=Image-$hostname.lzo
if [ -n $user ]; then
kernelimage="$user"-"$kernelimage"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$machine"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$hostname"
rootfsimage="$user"-"$rootfsimage"
else
nfsroot="$eth0.serverip:/path/to/nfs/root"

14
arch/arm/boards/guf-neso/env/config vendored
View File

@ -1,6 +1,6 @@
#!/bin/sh
machine=guf-neso
hostname=guf-neso
eth0.serverip=
user=
@ -21,16 +21,16 @@ rootfs_loc=net
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root-$machine.$rootfs_type
rootfsimage=root-$hostname.$rootfs_type
kernelimage=zImage-$machine
#kernelimage=uImage-$machine
#kernelimage=Image-$machine
#kernelimage=Image-$machine.lzo
kernelimage=zImage-$hostname
#kernelimage=uImage-$hostname
#kernelimage=Image-$hostname
#kernelimage=Image-$hostname.lzo
if [ -n $user ]; then
kernelimage="$user"-"$kernelimage"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$machine"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$hostname"
rootfsimage="$user"-"$rootfsimage"
else
nfsroot="$eth0.serverip:/path/to/nfs/root"

2
arch/arm/boards/imx21ads/imx21ads.c
View File

@ -168,7 +168,7 @@ static int mx21ads_devices_init(void)
add_cfi_flash_device(-1, 0xC8000000, 32 * 1024 * 1024, 0);
imx21_add_nand(&nand_info);
add_generic_device("cs8900", -1, NULL, IMX_CS1_BASE, 0x1000,
add_generic_device("cs8900", DEVICE_ID_DYNAMIC, NULL, IMX_CS1_BASE, 0x1000,
IORESOURCE_MEM, NULL);
imx21_add_fb(&imx_fb_data);

6
arch/arm/boards/karo-tx25/board.c
View File

@ -64,7 +64,7 @@ static int tx25_mem_init(void)
}
mem_initcall(tx25_mem_init);
static struct pad_desc karo_tx25_padsd_fec[] = {
static iomux_v3_cfg_t karo_tx25_padsd_fec[] = {
MX25_PAD_D11__GPIO_4_9, /* FEC PHY power on pin */
MX25_PAD_D13__GPIO_4_7, /* FEC reset */
MX25_PAD_FEC_MDC__FEC_MDC,
@ -131,7 +131,7 @@ static int tx25_devices_init(void)
device_initcall(tx25_devices_init);
static struct pad_desc tx25_pads[] = {
static iomux_v3_cfg_t tx25_pads[] = {
MX25_PAD_D12__GPIO_4_8,
MX25_PAD_D10__GPIO_4_10,
MX25_PAD_NF_CE0__NF_CE0,
@ -172,7 +172,7 @@ void __bare_init nand_boot(void)
}
#endif
static struct pad_desc tx25_lcdc_gpios[] = {
static iomux_v3_cfg_t tx25_lcdc_gpios[] = {
MX25_PAD_A18__GPIO_2_4, /* LCD Reset (active LOW) */
MX25_PAD_PWM__GPIO_1_26, /* LCD Backlight brightness 0: full 1: off */
MX25_PAD_A19__GPIO_2_5, /* LCD Power Enable 0: off 1: on */

14
arch/arm/boards/karo-tx25/env/config vendored
View File

@ -1,5 +1,5 @@
machine=tx25
hostname=tx25
baseboard=tx28stk5
user=
@ -21,16 +21,16 @@ rootfs_loc=net
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root-$machine.$rootfs_type
rootfsimage=root-$hostname.$rootfs_type
kernelimage=zImage-$machine
#kernelimage=uImage-$machine
#kernelimage=Image-$machine
#kernelimage=Image-$machine.lzo
kernelimage=zImage-$hostname
#kernelimage=uImage-$hostname
#kernelimage=Image-$hostname
#kernelimage=Image-$hostname.lzo
if [ -n $user ]; then
kernelimage="$user"-"$kernelimage"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$machine"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$hostname"
rootfsimage="$user"-"$rootfsimage"
else
nfsroot="$eth0.serverip:/path/to/nfs/root"

14
arch/arm/boards/karo-tx28/env/config vendored
View File

@ -1,7 +1,7 @@
#
#
machine=tx28
hostname=tx28
baseboard=tx28stk5
# use 'dhcp' to do dhcp in barebox and in kernel
@ -22,16 +22,16 @@ rootfs_loc=net
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root-$machine.$rootfs_type
rootfsimage=root-$hostname.$rootfs_type
kernelimage=zImage-$machine
#kernelimage=uImage-$machine
#kernelimage=Image-$machine
#kernelimage=Image-$machine.lzo
kernelimage=zImage-$hostname
#kernelimage=uImage-$hostname
#kernelimage=Image-$hostname
#kernelimage=Image-$hostname.lzo
if [ -n $user ]; then
kernelimage="$user"-"$kernelimage"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$machine"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$hostname"
rootfsimage="$user"-"$rootfsimage"
else
nfsroot="$eth0.serverip:/path/to/nfs/root"

23
arch/arm/boards/karo-tx28/tx28-stk5.c
View File

@ -21,11 +21,13 @@
#include <fec.h>
#include <sizes.h>
#include <io.h>
#include <net.h>
#include <asm/sections.h>
#include <mach/imx-regs.h>
#include <mach/clock.h>
#include <mach/mci.h>
#include <mach/fb.h>
#include <mach/ocotp.h>
static struct mxs_mci_platform_data mci_pdata = {
.caps = MMC_MODE_4BIT,
@ -345,6 +347,22 @@ static int register_persistent_environment(void)
DEVFS_PARTITION_FIXED, "env0");
}
void tx28_get_ethaddr(void)
{
u32 buf[2]; /* to make use of cpu_to_be32 */
u32 ethaddr[2];
int ret;
ret = mxs_ocotp_read(buf, 8, 0);
if (ret != 8)
return;
ethaddr[0] = cpu_to_be32(buf[0]);
ethaddr[1] = cpu_to_be32(buf[1]);
eth_register_ethaddr(0, (char *)ethaddr);
}
void base_board_init(void)
{
int i, ret;
@ -369,6 +387,11 @@ void base_board_init(void)
add_generic_device("stmfb", 0, NULL, IMX_FB_BASE, 4096,
IORESOURCE_MEM, &tx28_fb_pdata);
add_generic_device("ocotp", 0, NULL, IMX_OCOTP_BASE, 0,
IORESOURCE_MEM, NULL);
tx28_get_ethaddr();
imx_enable_enetclk();
add_generic_device("fec_imx", 0, NULL, IMX_FEC0_BASE, 0,
IORESOURCE_MEM, &fec_info);

2
arch/arm/boards/karo-tx51/Makefile Normal file
View File

@ -0,0 +1,2 @@
obj-y += tx51.o
obj-y += flash_header.o

21
arch/arm/boards/karo-tx51/config.h Normal file
View File

@ -0,0 +1,21 @@
/**
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#endif /* __CONFIG_H */

42
arch/arm/boards/karo-tx51/env/config vendored Normal file
View File

@ -0,0 +1,42 @@
#!/bin/sh
machine=tx51
# use 'dhcp' to do dhcp in barebox and in kernel
# use 'none' if you want to skip kernel ip autoconfiguration
ip=dhcp
# or set your networking parameters here
#eth0.ipaddr=a.b.c.d
#eth0.ethaddr=de:ad:be:ef:00:00
#eth0.netmask=a.b.c.d
#eth0.serverip=a.b.c.d
#eth0.gateway=a.b.c.d
# can be either 'nfs', 'tftp', 'nor' or 'nand'
kernel_loc=tftp
# can be either 'net', 'nor', 'nand' or 'initrd'
rootfs_loc=net
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root-$machine.$rootfs_type
kernelimage=zImage_$machine
#kernelimage=uImage-$machine
#kernelimage=Image-$machine
#kernelimage=Image-$machine.lzo
kernel_part=nand0.kernel
#nfsroot="$serverip:/srv/root"
autoboot_timeout=3
bootargs="console=ttymxc0,115200"
nand_device=mxc_nand
nand_parts="256k(barebox)ro,256k(bareboxenv),4M@0xc00000(kernel),64M(rootfs),-(rootfs_data)"
# set a fancy prompt (if support is compiled in)
PS1="\e[1;32mbarebox@\e[1;31mtx51:\w\e[0m "

56
arch/arm/boards/karo-tx51/flash_header.c Normal file
View File

@ -0,0 +1,56 @@
/**
* Copyright (C) 2012 Christian Kapeller, <christian.kapeller@cmotion.eu>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/barebox-arm-head.h>
#include <mach/imx-flash-header.h>
void __naked __flash_header_start go(void)
{
barebox_arm_head();
}
struct imx_dcd_entry __dcd_entry_section dcd_entry[] = {
{ .ptr_type = 4, .addr = 0x83fd9000, .val = 0x80000000, },
{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x04008008, },
{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00008010, },
{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00008010, },
{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00338018, },
{ .ptr_type = 4, .addr = 0x83fd9000, .val = 0xb2220000, },
{ .ptr_type = 4, .addr = 0x83fd9004, .val = 0xb08564a9, },
{ .ptr_type = 4, .addr = 0x83fd9034, .val = 0x20020000, },
{ .ptr_type = 4, .addr = 0x83fd9010, .val = 0x000a0080, },
{ .ptr_type = 4, .addr = 0x83fd9014, .val = 0x00000000, },
};
#define APP_DEST CONFIG_ARCH_TEXT_BASE
struct imx_flash_header __flash_header_section flash_header = {
.app_code_jump_vector = APP_DEST + 0x1000,
.app_code_barker = APP_CODE_BARKER,
.app_code_csf = 0,
.dcd_ptr_ptr = APP_DEST + 0x400 + offsetof(struct imx_flash_header, dcd),
.super_root_key = 0,
.dcd = APP_DEST + 0x400 + offsetof(struct imx_flash_header, dcd_barker),
.app_dest = APP_DEST,
.dcd_barker = DCD_BARKER,
.dcd_block_len = sizeof (dcd_entry),
};
unsigned long __image_len_section barebox_len = DCD_BAREBOX_SIZE;

291
arch/arm/boards/karo-tx51/tx51.c Normal file
View File

@ -0,0 +1,291 @@
/*
* Copyright (C) 2007 Sascha Hauer, Pengutronix
* Copyright (C) 2012 Christian Kapeller, <christian.kapeller@cmotion.eu>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <init.h>
#include <environment.h>
#include <mach/imx-regs.h>
#include <fec.h>
#include <mach/gpio.h>
#include <asm/armlinux.h>
#include <generated/mach-types.h>
#include <partition.h>
#include <fs.h>
#include <fcntl.h>
#include <nand.h>
#include <spi/spi.h>
#include <mfd/mc13xxx.h>
#include <io.h>
#include <asm/mmu.h>
#include <mach/imx5.h>
#include <mach/imx-nand.h>
#include <mach/spi.h>
#include <mach/generic.h>
#include <mach/iomux-mx51.h>
#include <mach/devices-imx51.h>
#include <mach/iim.h>
#define STK5_MX51_PAD_DISPB2_SER_RS__GPIO3_8 \
IOMUX_PAD(0x6C8, 0x2C8, 4, 0x994, 1, PAD_CTL_PKE | PAD_CTL_PUE)
#define STK5_MX51_PAD_DISPB2_SER_DIO__GPIO3_6 \
IOMUX_PAD(0x6c0, 0x2c0, 4, 0x098c, 1, 0)
static struct fec_platform_data fec_info = {
.xcv_type = MII100,
};
struct imx_nand_platform_data nand_info = {
.width = 1,
.hw_ecc = 1,
.flash_bbt = 1,
};
struct gpio_led tx51_leds[] = {
{
.led = { .name = "GPIO-LED", },
.gpio = IMX_GPIO_NR(4,10),
.active_low = 0,
},
};
static iomux_v3_cfg_t tx51_pads[] = {
/*UART1*/
MX51_PAD_UART1_RXD__UART1_RXD,
MX51_PAD_UART1_TXD__UART1_TXD,
MX51_PAD_UART1_CTS__UART1_CTS,
MX51_PAD_UART1_RTS__UART1_RTS,
/* (e)CSPI */
MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,
MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
MX51_PAD_CSPI1_RDY__ECSPI1_RDY,
/* (e)CSPI chip select lines */
MX51_PAD_CSPI1_SS0__GPIO4_24,
MX51_PAD_CSPI1_SS1__GPIO4_25,
#ifdef CONFIG_MCI_IMX_ESDHC
/* eSDHC 1 */
MX51_PAD_SD1_CMD__SD1_CMD,
MX51_PAD_SD1_CLK__SD1_CLK,
MX51_PAD_SD1_DATA0__SD1_DATA0,
MX51_PAD_SD1_DATA1__SD1_DATA1,
MX51_PAD_SD1_DATA2__SD1_DATA2,
MX51_PAD_SD1_DATA3__SD1_DATA3,
/* SD1 card detect */
STK5_MX51_PAD_DISPB2_SER_RS__GPIO3_8,
/* eSDHC 2 */
MX51_PAD_SD2_CMD__SD2_CMD,
MX51_PAD_SD2_CLK__SD2_CLK,
MX51_PAD_SD2_DATA0__SD2_DATA0,
MX51_PAD_SD2_DATA1__SD2_DATA1,
MX51_PAD_SD2_DATA2__SD2_DATA2,
MX51_PAD_SD2_DATA3__SD2_DATA3,
/* SD2 card detect */
STK5_MX51_PAD_DISPB2_SER_DIO__GPIO3_6,
#endif
/* SW controlled LED on STK5 baseboard */
MX51_PAD_CSI2_D13__GPIO4_10,
/* unuseable pads configured as GPIO */
MX51_PAD_GPIO1_1__GPIO1_1,
MX51_PAD_GPIO1_0__GPIO1_0,
};
static int tx51_mem_init(void)
{
arm_add_mem_device("ram0", MX51_CSD0_BASE_ADDR, 128 * 1024 * 1024);
return 0;
}
mem_initcall(tx51_mem_init);
static int spi_0_cs[] = {
IMX_GPIO_NR(4, 24),
IMX_GPIO_NR(4, 25),
};
static struct spi_imx_master tx51_spi_0_data = {
.chipselect = spi_0_cs,
.num_chipselect = ARRAY_SIZE(spi_0_cs),
};
static const struct spi_board_info mx51_tx51_spi_board_info[] = {};
static struct tx51_fec_gpio_setup {
iomux_v3_cfg_t pad;
unsigned group:4,
shift:5,
level:1;
} tx51_fec_gpios[] = {
{ MX51_PAD_EIM_A20__GPIO2_14, 2, 14, 0 }, /* PHY reset */
{ MX51_PAD_GPIO1_3__GPIO1_3, 1, 3, 0 }, /* PHY power enable */
{ MX51_PAD_NANDF_CS3__GPIO3_19, 3, 19, 0 }, /* MDC */
{ MX51_PAD_EIM_EB2__GPIO2_22, 2, 22, 0 }, /* MDIO */
{ MX51_PAD_NANDF_RB3__GPIO3_11, 3, 11, 0 }, /* RX_CLK */
{ MX51_PAD_NANDF_D11__GPIO3_29, 3, 29, 0 }, /* RX_DV */
{ MX51_PAD_NANDF_D9__GPIO3_31, 3, 31, 1 }, /* RXD0/Mode0 */
{ MX51_PAD_EIM_EB3__GPIO2_23, 2, 23, 1 }, /* RXD1/Mode1 */
{ MX51_PAD_EIM_CS2__GPIO2_27, 2, 27, 1 }, /* RXD2/Mode2 */
{ MX51_PAD_EIM_CS3__GPIO2_28, 2, 28, 1 }, /* RXD3/nINTSEL */
{ MX51_PAD_EIM_CS4__GPIO2_29, 2, 29, 0 }, /* RX_ER/RXD4 */
{ MX51_PAD_NANDF_RDY_INT__GPIO3_24, 3, 24, 0 }, /* TX_CLK */
{ MX51_PAD_NANDF_CS7__GPIO3_23, 3, 23, 0 }, /* TX_EN */
{ MX51_PAD_NANDF_D8__GPIO4_0, 4, 0, 0 }, /* TXD0 */
{ MX51_PAD_NANDF_CS4__GPIO3_20, 3, 20, 0 }, /* TXD1 */
{ MX51_PAD_NANDF_CS5__GPIO3_21, 3, 21, 0 }, /* TXD2 */
{ MX51_PAD_NANDF_CS6__GPIO3_22, 3, 22, 0 }, /* TXD3 */
{ MX51_PAD_NANDF_RB2__GPIO3_10, 3, 10, 0 }, /* COL/RMII/CRSDV */
{ MX51_PAD_EIM_CS5__GPIO2_30, 2, 30, 0 }, /* CRS */
{ MX51_PAD_NANDF_CS2__GPIO3_18, 3, 18, 0 }, /* nINT/TX_ER/TXD4 */
};
static iomux_v3_cfg_t tx51_fec_pads[] = {
MX51_PAD_NANDF_CS2__FEC_TX_ER,
MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK,
MX51_PAD_NANDF_CS3__FEC_MDC,
MX51_PAD_NANDF_CS4__FEC_TDATA1,
MX51_PAD_NANDF_CS5__FEC_TDATA2,
MX51_PAD_NANDF_CS6__FEC_TDATA3,
MX51_PAD_NANDF_CS7__FEC_TX_EN,
MX51_PAD_NANDF_RB2__FEC_COL,
MX51_PAD_NANDF_RB3__FEC_RX_CLK,
MX51_PAD_NANDF_D8__FEC_TDATA0,
MX51_PAD_NANDF_D9__FEC_RDATA0,
MX51_PAD_NANDF_D11__FEC_RX_DV,
MX51_PAD_EIM_EB2__FEC_MDIO,
MX51_PAD_EIM_EB3__FEC_RDATA1,
MX51_PAD_EIM_CS2__FEC_RDATA2,
MX51_PAD_EIM_CS3__FEC_RDATA3,
MX51_PAD_EIM_CS4__FEC_RX_ER,
MX51_PAD_EIM_CS5__FEC_CRS,
};
#define TX51_FEC_PHY_RST IMX_GPIO_NR(2, 14)
#define TX51_FEC_PHY_PWR IMX_GPIO_NR(1, 3)
#define TX51_FEC_PHY_INT IMX_GPIO_NR(3, 18)
static inline void tx51_fec_init(void)
{
int i;
/* Configure LAN8700 pads as GPIO and set up
* necessary strap options for PHY
*/
for (i = 0; i < ARRAY_SIZE(tx51_fec_gpios); i++) {
struct tx51_fec_gpio_setup *gs = &tx51_fec_gpios[i];
gpio_direction_output(IMX_GPIO_NR(gs->group, gs->shift ), gs->level);
mxc_iomux_v3_setup_pad(gs->pad);
}
/*
*Turn on phy power, leave in reset state
*/
gpio_set_value(TX51_FEC_PHY_PWR, 1);
/*
* Wait some time to let the phy activate the internal regulator
*/
mdelay(10);
/*
* Deassert reset, phy latches the rest of bootstrap pins
*/
gpio_set_value(TX51_FEC_PHY_RST, 1);
/* LAN7800 has an internal Power On Reset (POR) signal (OR'ed with
* the external RESET signal) which is deactivated 21ms after
* power on and latches the strap options.
* Delay for 22ms to ensure, that the internal POR is inactive
* before reconfiguring the strap pins.
*/
mdelay(22);
/*
* The phy is ready, now configure imx51 pads for fec operation
*/
mxc_iomux_v3_setup_multiple_pads(tx51_fec_pads,
ARRAY_SIZE(tx51_fec_pads));
}
static void tx51_leds_init(void)
{
int i;
for (i = 0 ; i < ARRAY_SIZE(tx51_leds) ; i++)
led_gpio_register(&tx51_leds[i]);
}
static int tx51_devices_init(void)
{
#ifdef CONFIG_MCI_IMX_ESDHC
imx51_add_mmc0(NULL);
imx51_add_mmc1(NULL);
#endif
imx51_add_nand(&nand_info);
spi_register_board_info(mx51_tx51_spi_board_info,
ARRAY_SIZE(mx51_tx51_spi_board_info));
imx51_add_spi0(&tx51_spi_0_data);
imx51_iim_register_fec_ethaddr();
tx51_fec_init();
imx51_add_fec(&fec_info);
tx51_leds_init();
//Linux Parameters
armlinux_set_bootparams((void *)MX51_CSD0_BASE_ADDR + 0x100);
armlinux_set_architecture(MACH_TYPE_TX51);
return 0;
}
device_initcall(tx51_devices_init);
static int tx51_part_init(void)
{
devfs_add_partition("nand0", 0x00000, 0x40000, PARTITION_FIXED, "self_raw");
dev_add_bb_dev("self_raw", "self0");
devfs_add_partition("nand0", 0x40000, 0x80000, PARTITION_FIXED, "env_raw");
dev_add_bb_dev("env_raw", "env0");
return 0;
}
late_initcall(tx51_part_init);
static int tx51_console_init(void)
{
imx51_init_lowlevel(800);
mxc_iomux_v3_setup_multiple_pads(tx51_pads, ARRAY_SIZE(tx51_pads));
imx51_add_uart0();
return 0;
}
console_initcall(tx51_console_init);

50
arch/arm/boards/karo-tx51/tx51.dox Normal file
View File

@ -0,0 +1,50 @@
/**
@page tx51 KARO's TX51 CPU module
@section tx51_cpu_card The CPU module
http://www.karo-electronics.de/
This CPU card is based on a Freescale i.MX51 CPU. The card is shipped with:
- 128 MiB synchronous dynamic RAM (DDR2 type), 200 MHz support
- 128 MiB NAND K9F1G08U0A (3.3V type)
- DS1339 RTC
- LAN8700 Phy
@section tx51_baseboards Supported baseboards
Supported baseboards are:
- KARO's Starterkit 5 (currently only SD1, FEC implemented but non-working)
@section tx28_stk5_howto How to get barebox for 'KARO's Starterkit 5'
Using the default configuration:
@verbatim
make ARCH=arm tx51tk5_defconfig
@endverbatim
Build the binary image:
@verbatim
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabi-
@endverbatim
@note replace the arm-linux-gnueabi with your ARM v7 cross compiler.
@note To use the result, you also need the following resources from Freescale:
- the 'bootlets' archive
- the 'elftosb2' encryption tool
- in the case you want to start @b barebox from an attached SD card the
'sdimage' tool from Freescale's 'uuc' archive.
@section tx28_mlayout Memory layout when barebox is running:
- 0x90000000 start of SDRAM
- 0x90000100 start of kernel's boot parameters
- below malloc area: stack area
- below barebox: malloc area
- 0x97f00000 start of @b barebox
*/

14
arch/arm/boards/mini2440/env/config vendored
View File

@ -1,6 +1,6 @@
#!/bin/sh
machine=mini2440
hostname=mini2440
eth0.serverip=
user=
@ -21,16 +21,16 @@ rootfs_loc=net
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root-${machine}.${rootfs_type}
rootfsimage=root-${hostname}.${rootfs_type}
kernelimage=zImage-${machine}
#kernelimage=uImage-$machine
#kernelimage=Image-$machine
#kernelimage=Image-$machine.lzo
kernelimage=zImage-${hostname}
#kernelimage=uImage-$hostname
#kernelimage=Image-$hostname
#kernelimage=Image-$hostname.lzo
if [ -n $user ]; then
kernelimage="${user}"-"${kernelimage}"
nfsroot="${eth0.serverip}:/home/${user}/nfsroot/${machine}"
nfsroot="${eth0.serverip}:/home/${user}/nfsroot/${hostname}"
rootfsimage="${user}"-"${rootfsimage}"
else
nfsroot="${eth0.serverip}:/path/to/nfs/root"

8
arch/arm/boards/mini2440/mini2440.c
View File

@ -297,8 +297,8 @@ static int mini2440_devices_init(void)
reg |= 0x10000;
writel(reg, S3C_MISCCR);
add_generic_device("s3c24x0_nand", -1, NULL, S3C24X0_NAND_BASE, 0,
IORESOURCE_MEM, &nand_info);
add_generic_device("s3c24x0_nand", DEVICE_ID_DYNAMIC, NULL, S3C24X0_NAND_BASE,
0, IORESOURCE_MEM, &nand_info);
add_dm9000_device(0, S3C_CS4_BASE + 0x300, S3C_CS4_BASE + 0x304,
IORESOURCE_MEM_16BIT, &dm9000_data);
@ -344,8 +344,8 @@ static int mini2440_console_init(void)
s3c_gpio_mode(GPH2_TXD0);
s3c_gpio_mode(GPH3_RXD0);
add_generic_device("s3c_serial", -1, NULL, S3C_UART1_BASE, S3C_UART1_SIZE,
IORESOURCE_MEM, NULL);
add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART1_BASE,
S3C_UART1_SIZE, IORESOURCE_MEM, NULL);
return 0;
}

4
arch/arm/boards/mioa701/board.c
View File

@ -123,8 +123,8 @@ static int mioa701_devices_init(void)
pxa_add_fb((void *)0x44000000, &mioa701_pxafb_info);
pxa_add_mmc((void *)0x41100000, -1, &mioa701_mmc_info);
docg3_iospace = map_io_sections(0x0, (void *)0xe0000000, 0x2000);
add_generic_device("docg3", -1, NULL, (ulong) docg3_iospace, 0x2000,
IORESOURCE_MEM, NULL);
add_generic_device("docg3", DEVICE_ID_DYNAMIC, NULL, (ulong) docg3_iospace,
0x2000, IORESOURCE_MEM, NULL);
armlinux_set_bootparams((void *)0xa0000100);
armlinux_set_architecture(MACH_TYPE_MIOA701);

8
arch/arm/boards/netx/netx.c
View File

@ -49,8 +49,10 @@ mem_initcall(netx_mem_init);
static int netx_devices_init(void) {
add_cfi_flash_device(-1, 0xC0000000, 32 * 1024 * 1024, 0);
add_generic_device("netx-eth", -1, NULL, 0, 0, IORESOURCE_MEM, &eth0_data);
add_generic_device("netx-eth", -1, NULL, 0, 0, IORESOURCE_MEM, &eth1_data);
add_generic_device("netx-eth", DEVICE_ID_DYNAMIC, NULL, 0, 0, IORESOURCE_MEM,
&eth0_data);
add_generic_device("netx-eth", DEVICE_ID_DYNAMIC, NULL, 0, 0, IORESOURCE_MEM,
&eth1_data);
devfs_add_partition("nor0", 0x00000, 0x40000, PARTITION_FIXED, "self0");
@ -75,7 +77,7 @@ static int netx_console_init(void)
*(volatile unsigned long *)(0x00100808) = 2;
*(volatile unsigned long *)(0x0010080c) = 2;
add_generic_device("netx_serial", -1, NULL, NETX_PA_UART0, 0x40,
add_generic_device("netx_serial", DEVICE_ID_DYNAMIC, NULL, NETX_PA_UART0, 0x40,
IORESOURCE_MEM, NULL);
return 0;
}

4
arch/arm/boards/nhk8815/setup.c
View File

@ -69,7 +69,7 @@ static struct resource nhk8815_nand_resources[] = {
};
static struct device_d nhk8815_nand_device = {
.id = -1,
.id = DEVICE_ID_DYNAMIC,
.name = "nomadik_nand",
.num_resources = ARRAY_SIZE(nhk8815_nand_resources),
.resource = nhk8815_nand_resources,
@ -95,7 +95,7 @@ static int nhk8815_devices_init(void)
writel(0x0000305b, FSMC_BCR(1));
writel(0x00033f33, FSMC_BTR(1));
add_generic_device("smc91c111", -1, NULL, 0x34000300, 16,
add_generic_device("smc91c111", DEVICE_ID_DYNAMIC, NULL, 0x34000300, 16,
IORESOURCE_MEM, NULL);
register_device(&nhk8815_nand_device);

4
arch/arm/boards/omap3evm/board.c
View File

@ -230,7 +230,7 @@ static struct NS16550_plat serial_plat = {
*/
static int omap3evm_init_console(void)
{
add_ns16550_device(-1,
add_ns16550_device(DEVICE_ID_DYNAMIC,
#if defined(CONFIG_OMAP3EVM_UART1)
OMAP_UART1_BASE,
#elif defined(CONFIG_OMAP3EVM_UART3)
@ -260,7 +260,7 @@ static int omap3evm_init_devices(void)
gpmc_generic_init(0x10);
#endif
#ifdef CONFIG_MCI_OMAP_HSMMC
add_generic_device("omap-hsmmc", -1, NULL, OMAP_MMC1_BASE, SZ_4K,
add_generic_device("omap-hsmmc", DEVICE_ID_DYNAMIC, NULL, OMAP_MMC1_BASE, SZ_4K,
IORESOURCE_MEM, NULL);
#endif
armlinux_set_bootparams((void *)0x80000100);

6
arch/arm/boards/panda/board.c
View File

@ -38,8 +38,8 @@ static struct NS16550_plat serial_plat = {
static int panda_console_init(void)
{
/* Register the serial port */
add_ns16550_device(-1, OMAP44XX_UART3_BASE, 1024, IORESOURCE_MEM_8BIT,
&serial_plat);
add_ns16550_device(DEVICE_ID_DYNAMIC, OMAP44XX_UART3_BASE, 1024,
IORESOURCE_MEM_8BIT, &serial_plat);
return 0;
}
@ -133,7 +133,7 @@ static int panda_devices_init(void)
sr32(OMAP44XX_SCRM_ALTCLKSRC, 2, 2, 0x3);
}
add_generic_device("omap-hsmmc", -1, NULL, 0x4809C100, SZ_4K,
add_generic_device("omap-hsmmc", DEVICE_ID_DYNAMIC, NULL, 0x4809C100, SZ_4K,
IORESOURCE_MEM, NULL);
panda_ehci_init();

12
arch/arm/boards/panda/env/config vendored
View File

@ -1,6 +1,6 @@
#!/bin/sh
machine=panda
hostname=panda
user=
# use 'dhcp' to do dhcp in barebox and in kernel
@ -18,14 +18,14 @@ kernel_loc=tftp
# can be either 'net', 'nor', 'nand' or 'initrd'
rootfs_loc=net
kernelimage=zImage-$machine
#kernelimage=uImage-$machine
#kernelimage=Image-$machine
#kernelimage=Image-${machine}.lzo
kernelimage=zImage-$hostname
#kernelimage=uImage-$hostname
#kernelimage=Image-$hostname
#kernelimage=Image-${hostname}.lzo
if [ -n $user ]; then
kernelimage="$user"-"$kernelimage"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$machine"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$hostname"
rootfsimage="$user"-"$rootfsimage"
else
nfsroot="$eth0.serverip:/path/to/nfs/root"

2
arch/arm/boards/pcm027/Makefile Normal file
View File

@ -0,0 +1,2 @@
obj-y += board.o
obj-y += lowlevel_init.o

190
arch/arm/boards/pcm027/board.c Normal file
View File

@ -0,0 +1,190 @@
/*
* (C) 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
* 2010 by Marc Kleine-Budde <kernel@pengutronix.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <driver.h>
#include <environment.h>
#include <fs.h>
#include <init.h>
#include <partition.h>
#include <sizes.h>
#include <plat/gpio.h>
#include <mach/mfp-pxa27x.h>
#include <mach/pxa-regs.h>
#include <mach/pxafb.h>
#include <mach/devices.h>
#include <asm/armlinux.h>
#include <asm/io.h>
#include <generated/mach-types.h>
#include <asm/mmu.h>
#define PCM990_CTRL_PHYS (void *)PXA_CS1_PHYS
#define PCM990_CTRL_REG3 0x0006 /* LCD CTRL REGISTER 3 */
#define PCM990_CTRL_LCDPWR 0x0001 /* RW LCD Power on */
#define PCM990_CTRL_LCDON 0x0002 /* RW LCD Latch on */
#define PCM990_CTRL_LCDPOS1 0x0004 /* RW POS 1 */
#define PCM990_CTRL_LCDPOS2 0x0008 /* RW POS 2 */
static void lcd_power(int on)
{
void __iomem *ctrl3 = PCM990_CTRL_PHYS + PCM990_CTRL_REG3;
if (on)
writeb(PCM990_CTRL_LCDPWR | PCM990_CTRL_LCDON, ctrl3);
else
writeb(0x0, ctrl3);
}
static void backlight_power(int on)
{
if (on) {
mdelay(20);
gpio_set_value(16, 1);
} else {
gpio_set_value(16, 0);
}
}
static struct pxafb_videomode pxafb_mode = {
.mode = {
.pixclock = 28000,
.xres = 640,
.yres = 480,
.hsync_len = 20,
.left_margin = 103,
.right_margin = 47,
.vsync_len = 6,
.upper_margin = 28,
.lower_margin = 5,
.sync = 0,
},
.bpp = 16,
};
static struct pxafb_platform_data fb_pdata = {
.mode = &pxafb_mode,
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
.lcd_power = lcd_power,
.backlight_power = backlight_power,
};
static int pcm027_mem_init(void)
{
arm_add_mem_device("ram0", 0xa0000000, SZ_64M);
return 0;
}
mem_initcall(pcm027_mem_init);
static unsigned long pin_config[] = {
/* Chip Selects */
GPIO20_nSDCS_2,
GPIO21_nSDCS_3,
GPIO15_nCS_1,
GPIO78_nCS_2,
GPIO80_nCS_4,
/* Variable Latency I/O Ready Pin */
GPIO18_RDY,
/* FFUART */
GPIO85_nPCE_1, /* enables RX */
GPIO34_FFUART_RXD,
GPIO35_FFUART_CTS,
GPIO36_FFUART_DCD,
GPIO37_FFUART_DSR,
GPIO38_FFUART_RI,
GPIO39_FFUART_TXD,
GPIO40_FFUART_DTR,
GPIO41_FFUART_RTS,
/* LCD */
GPIO58_LCD_LDD_0,
GPIO59_LCD_LDD_1,
GPIO60_LCD_LDD_2,
GPIO61_LCD_LDD_3,
GPIO62_LCD_LDD_4,
GPIO63_LCD_LDD_5,
GPIO64_LCD_LDD_6,
GPIO65_LCD_LDD_7,
GPIO66_LCD_LDD_8,
GPIO67_LCD_LDD_9,
GPIO68_LCD_LDD_10,
GPIO69_LCD_LDD_11,
GPIO70_LCD_LDD_12,
GPIO71_LCD_LDD_13,
GPIO72_LCD_LDD_14,
GPIO73_LCD_LDD_15,
GPIO74_LCD_FCLK,
GPIO75_LCD_LCLK,
GPIO76_LCD_PCLK,
GPIO77_LCD_BIAS,
MFP_CFG_OUT(GPIO16, AF0, DRIVE_LOW), /* backlight */
/* NIC */
GPIO33_nCS_5,
GPIO49_nPWE,
};
static int pcm027_devices_init(void)
{
void *cfi_iospace;
add_generic_device("smc91c111", DEVICE_ID_DYNAMIC, NULL, 0x14000300, 16,
IORESOURCE_MEM, NULL);
cfi_iospace = map_io_sections(0x0, (void *)0xe0000000, SZ_32M);
add_cfi_flash_device(DEVICE_ID_DYNAMIC, (unsigned long)cfi_iospace, SZ_32M, 0);
pxa_add_fb((void *)0x44000000, &fb_pdata);
armlinux_set_bootparams((void *)0xa0000100);
armlinux_set_architecture(MACH_TYPE_PCM027);
devfs_add_partition("nor0", 0x00000, SZ_512K, PARTITION_FIXED, "self0");
devfs_add_partition("nor0", SZ_512K, SZ_256K, PARTITION_FIXED, "env0");
protect_file("/dev/env0", 1);
return 0;
}
device_initcall(pcm027_devices_init);
static int pcm027_console_init(void)
{
/* route pins */
pxa2xx_mfp_config(ARRAY_AND_SIZE(pin_config));
/* enable clock */
CKEN |= CKEN_FFUART;
pxa_add_uart((void *)0x40100000, 0);
return 0;
}
console_initcall(pcm027_console_init);

328
arch/arm/boards/pcm027/config.h Normal file
View File

@ -0,0 +1,328 @@
/*
* Copyright (C) 2005 Phytec Messtechnik GmbH
* Juergen Kilb, H. Klaholz <armlinux@phytec.de>
*
* Copyright (C) 2006 Pengutronix
* Sascha Hauer <s.hauer@pengutronix.de>
* Robert Schwebel <r.schwebel@pengutronix.de>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#ifndef __CONFIG_H
#define __CONFIG_H
/*
* phyCORE-PXA270 configuration settings
* Set these to 0/1 to enable or disable the features.
*/
#define PHYCORE_PXA270_USE_K3FLASH 0
/* 260 MHz or 520 MHZ */
#define PHYCORE_PXA270_SPEED 520
/*********************************************************************
* CONFIG PXA270 GPIO settings *
*********************************************************************/
/*
* GPIO set "1"
*
*** REG GPSR0
* GP15 == nCS1 is 1
* GP20 == nSDCS2 is 1
* GP21 == nSDCS3 is 1
*** REG GPSR1
* GP33 == nCS5 is 1
*** REG GPSR2
* GP78 == nCS2 is 1
* GP80 == nCS4 is 1
*/
#define GPSR0_DFT 0x00308000
#define GPSR1_DFT 0x00000002
#define GPSR2_DFT 0x00014000
#define CONFIG_GPSR0_VAL GPSR0_DFT
#define CONFIG_GPSR1_VAL GPSR1_DFT
#define CONFIG_GPSR2_VAL GPSR2_DFT
#define CONFIG_GPSR3_VAL GPSR3_DFT
/*
* set Direction "1" GPIO == output else input
*
** REG GPDR0
* GP03 == PWR_SDA is output
* GP04 == PWR_SCL is output
* GP15 == nCS1 is output
* GP20 == nSDCS2 is output
* GP21 == nSDCS3 is output
** REG GPDR1
* GP33 == nCS5 is output
** REG GPDR2
* GP78 == nCS2 is output
* GP80 == nCS4 is output
* GP90 == LED0 is output
* GP91 == LED1 is output
*/
#define GPDR0_DFT 0x00308018
#define GPDR1_DFT 0x00000002
#define GPDR2_DFT 0x00014000
#define CONFIG_GPDR0_VAL GPDR0_DFT
#define CONFIG_GPDR1_VAL GPDR1_DFT
#define CONFIG_GPDR2_VAL GPDR2_DFT
/*
* set Alternate Funktions
*
** REG GAFR0_L
* GP15 == nCS1 is AF10
** REG GAFR0_U
* GP18 == RDY is AF01
* GP20 == nSDCS2 is AF01
* GP21 == nSDCS3 is AF01
** REG GAFR1_L
* GP33 == nCS5 is AF10
** REG GAFR2_L
* GP78 == nCS2 is AF10
** REG GAFR2_U
* GP80 == nCS4 is AF10
*/
#define GAFR0_L_DFT 0x80000000
#define GAFR0_U_DFT 0x00000510
#define GAFR1_L_DFT 0x00000008
#define GAFR1_U_DFT 0x00000000
#define GAFR2_L_DFT 0x20000000
#define GAFR2_U_DFT 0x00000002
#define CONFIG_GAFR0_L_VAL GAFR0_L_DFT
#define CONFIG_GAFR0_U_VAL GAFR0_U_DFT
#define CONFIG_GAFR1_L_VAL GAFR1_L_DFT
#define CONFIG_GAFR1_U_VAL GAFR1_U_DFT
#define CONFIG_GAFR2_L_VAL GAFR2_L_DFT
#define CONFIG_GAFR2_U_VAL GAFR2_U_DFT
/*
* Power Manager Sleep Status Register (PSSR)
*
* [6] = 0 OTG pad is not holding it's state
* [5] = 1 Read Disable Hold: receivers of all gpio pins are disabled
* [4] = 1 gpio pins are held in their sleep mode state
* [3] = 0 The processor has not been placed in standby mode by
* configuring the PWRMODE register since STS was cleared
* by a reset or by software.
* [2] = 1 nVDD_FAULT has been asserted and caused the processor to
* enter deep-sleep mode.
* [1] = 1 nBATT_FAULT has been asserted and caused the processor to
* enter deep-sleep mode.
* [0] = 1 The processor was placed in sleep mode by configuring the
* PWRMODE register.
*/
#define CONFIG_PSSR_VAL 0x37
/*********************************************************************
* CONFIG PXA270 Chipselect settings *
*********************************************************************/
/*
* Memory settings
*
* This is the configuration for nCS1/0 -> PLD / flash
* configuration for nCS1:
* [31] 0 - Slower Device
* [30:28] 001 - CS deselect to CS time: 1*(2*MemClk) = 20 ns
* [27:24] 0010 - Address to data valid in bursts: (2+1)*MemClk = 30 ns
* [23:20] 1011 - " for first access: (11+2)*MemClk = 130 ns
* [19] 1 - 16 Bit bus width
* [18:16] 011 - burst RAM or FLASH
* configuration for nCS0 (J3 Flash):
* [15] 0 - Slower Device
* [14:12] 001 - CS deselect to CS time: 1*(2*MemClk) = 20 ns
* [11:08] 0010 - Address to data valid in bursts: (2+1)*MemClk = 30 ns
* [07:04] 1011 - " for first access: (11+2)*MemClk = 130 ns
* [03] 0 - 32 Bit bus width
* [02:00] 011 - burst RAM or FLASH
*/
#if PHYCORE_PXA270_USE_K3FLASH == 0
#define CONFIG_MSC0_VAL 0x128C1262
#else
/* configuration for nCS0 (K3 Flash):
* [15] 0 - Slower Device
* [14:12] 001 - CS deselect to CS time: 1*(2*MemClk) = 20 ns
* [11:08] 0010 - Address to data valid in bursts: (2+1)*MemClk = 30 ns
* [07:04] 1011 - " for first access: (11+2)*MemClk = 130 ns
* [03] 0 - 32 Bit bus width
* [02:00] 011 - burst RAM or FLASH
*/
#define CONFIG_MSC0_VAL 0x128C12B3
#endif
/*
* This is the configuration for nCS3/2
* configuration for nCS3: POWER
*
* [31] 0 - Slower Device
* [30:28] 111 - RRR3: CS deselect to CS time: 7*(2*MemClk) = 140 ns
* [27:24] 1111 - RDN3: Address to data valid in bursts: (15+1)*MemClk = 160 ns
* [23:20] 1111 - RDF3: Address for first access: (23+1)*MemClk = 240 ns
* [19] 0 - 32 Bit bus width
* [18:16] 100 - variable latency I/O
* configuration for nCS2: PLD
* [15] 0 - Slower Device
* [14:12] 111 - RRR2: CS deselect to CS time: 7*(2*MemClk) = 140 ns
* [11:08] 1111 - RDN2: Address to data valid in bursts: (15+1)*MemClk = 160 ns
* [07:04] 1111 - RDF2: Address for first access: (23+1)*MemClk = 240 ns
* [03] 1 - 16 Bit bus width
* [02:00] 100 - variable latency I/O
*/
#define CONFIG_MSC1_VAL 0x128c128c
/*
* This is the configuration for nCS5/4
*
* configuration for nCS5: LAN Controller
* [31] 0 - Slower Device
* [30:28] 001 - RRR5: CS deselect to CS time: 1*(2*MemClk) = 20 ns
* [27:24] 0010 - RDN5: Address to data valid in bursts: (2+1)*MemClk = 30 ns
* [23:20] 0011 - RDF5: Address for first access: (3+1)*MemClk = 40 ns
* [19] 0 - 32 Bit bus width
* [18:16] 100 - variable latency I/O
* configuration for nCS4: USB
* [15] 0 - Slower Device
* [14:12] 111 - RRR4: CS deselect to CS time: 7*(2*MemClk) = 140 ns
* [11:08] 1111 - RDN4: Address to data valid in bursts: (15+1)*MemClk = 160 ns
* [07:04] 1111 - RDF4: Address for first access: (23+1)*MemClk = 240 ns
* [03] 1 - 16 Bit bus width
* [02:00] 100 - variable latency I/O
*/
#define CONFIG_MSC2_VAL 0x1234128C
/*********************************************************************
* CONFIG PXA270 SDRAM settings *
*********************************************************************/
#define CONFIG_DRAM_BASE 0xa0000000
/* MDCNFG: SDRAM Configuration Register
*
* [31] 0 - Stack1
* [30] 0 - dcacx2
* [20] 0 - reserved
* [31:29] 000 - reserved
* [28] 1 - SA1111 compatiblity mode
* [27] 1 - latch return data with return clock
* [26] 0 - alternate addressing for pair 2/3
* [25:24] 10 - timings
* [23] 1 - internal banks in lower partition 2/3 (not used)
* [22:21] 10 - row address bits for partition 2/3 (not used)
* [20:19] 01 - column address bits for partition 2/3 (not used)
* [18] 0 - SDRAM partition 2/3 width is 32 bit
* [17] 0 - SDRAM partition 3 disabled
* [16] 0 - SDRAM partition 2 disabled
* [15] 0 - Stack1
* [14] 0 - dcacx0
* [13] 0 - Stack0
* [12] 0 - SA1110 compatiblity mode
* [11] 1 - always 1
* [10] 0 - no alternate addressing for pair 0/1
* [09:08] 10 - tRP=2*MemClk CL=2 tRCD=2*MemClk tRAS=5*MemClk tRC=8*MemClk
* [7] 1 - 4 internal banks in lower partition pair
* [06:05] 10 - 13 row address bits for partition 0/1
* [04:03] 01 - 9 column address bits for partition 0/1
* [02] 0 - SDRAM partition 0/1 width is 32 bit
* [01] 0 - disable SDRAM partition 1
* [00] 1 - enable SDRAM partition 0
*/
/* K4S561633*/
#define CONFIG_MDCNFG_VAL 0x0AC90AC9
/* MDREFR: SDRAM Refresh Control Register
*
* [31] 0 - ALTREFA
* [30] 0 - ALTREFB
* [29] 1 - K0DB4
* [28] 0 - reserved
* [27] 0 - reserved
* [26] 0 - reserved
* [25] 1 - K2FREE: not free running
* [24] 0 - K1FREE: not free running
* [23] 1 - K0FREE: not free running
* [22] 0 - SLFRSH: self refresh disabled
* [21] 0 - reserved
* [20] 0 - APD: no auto power down
* [19] 0 - K2DB2: SDCLK2 is MemClk
* [18] 0 - K2RUN: disable SDCLK2
* [17] 0 - K1DB2: SDCLK1 is MemClk
* [16] 1 - K1RUN: enable SDCLK1
* [15] 1 - E1PIN: SDRAM clock enable
* [14] 1 - K0DB2: SDCLK0 is MemClk
* [13] 0 - K0RUN: disable SDCLK0
* [12] 0 - RESERVED
* [11:00] 000000011000 - (64ms/8192)*MemClkFreq/32 = 24
*/
#define CONFIG_MDREFR_VAL 0x2281C018
/* MDMRS: Mode Register Set Configuration Register
*
* [31] 0 - reserved
* [30:23] 00000000- MDMRS2: SDRAM2/3 MRS Value. (not used)
* [22:20] 000 - MDCL2: SDRAM2/3 Cas Latency. (not used)
* [19] 0 - MDADD2: SDRAM2/3 burst Type. Fixed to sequential. (not used)
* [18:16] 010 - MDBL2: SDRAM2/3 burst Length. Fixed to 4. (not used)
* [15] 0 - reserved
* [14:07] 00000000- MDMRS0: SDRAM0/1 MRS Value.
* [06:04] 010 - MDCL0: SDRAM0/1 Cas Latency.
* [03] 0 - MDADD0: SDRAM0/1 burst Type. Fixed to sequential.
* [02:00] 010 - MDBL0: SDRAM0/1 burst Length. Fixed to 4.
*/
#define CONFIG_MDMRS_VAL 0x00020022
/*********************************************************************
* CONFIG PXA270 Clock generation *
*********************************************************************/
#define CONFIG_FLYCNFG_VAL 0x00010001
#define CONFIG_SXCNFG_VAL 0x40044004
#define CONFIG_CKEN (CKEN_MEMC | CKEN_OSTIMER)
#if PHYCORE_PXA270_SPEED == 520
#define CONFIG_CCCR 0x00000290 /* Memory Clock is f. Table; N=2.5, L=16 => 16x13=208, 208x2,5=520 MHz */
#elif PHYCORE_PXA270_SPEED == 260
#define CONFIG_CCCR 0x02000288 /* Memory Clock is System-Bus Freq., N=2.5, L=8 => 8x13=104, 104x2,5=260 MHz */
#else
#error You have specified an illegal speed.
#endif
/*********************************************************************
* CONFIG PXA270 CF interface *
*********************************************************************/
#define CONFIG_MECR_VAL 0x00000003
#define CONFIG_MCMEM0_VAL 0x00010504
#define CONFIG_MCMEM1_VAL 0x00010504
#define CONFIG_MCATT0_VAL 0x00010504
#define CONFIG_MCATT1_VAL 0x00010504
#define CONFIG_MCIO0_VAL 0x00004715
#define CONFIG_MCIO1_VAL 0x00004715
#endif /* __CONFIG_H */

46
arch/arm/boards/pcm027/env/config vendored Normal file
View File

@ -0,0 +1,46 @@
#!/bin/sh
hostname=pcm027
eth0.serverip=
user=
# use 'dhcp' to do dhcp in barebox and in kernel
# use 'none' if you want to skip kernel ip autoconfiguration
ip=dhcp
# or set your networking parameters here
#eth0.ipaddr=a.b.c.d
#eth0.netmask=a.b.c.d
#eth0.gateway=a.b.c.d
#eth0.serverip=a.b.c.d
# can be either 'nfs', 'tftp', 'nor' or 'nand'
kernel_loc=tftp
# can be either 'net', 'nor', 'nand' or 'initrd'
rootfs_loc=net
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root-$hostname.$rootfs_type
kernelimage=zImage-$hostname
#kernelimage=uImage-$hostname
#kernelimage=Image-$hostname
#kernelimage=Image-$hostname.lzo
if [ -n $user ]; then
kernelimage="$user"-"$kernelimage"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$hostname"
rootfsimage="$user"-"$rootfsimage"
else
nfsroot="$eth0.serverip:/path/to/nfs/root"
fi
autoboot_timeout=3
bootargs="console=ttyS0,115200"
nor_parts="512k(barebox)ro,256k(bareboxenv),4M(kernel),-(root)"
rootfs_mtdblock_nor=3
PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m "

456
arch/arm/boards/pcm027/lowlevel_init.S Normal file
View File

@ -0,0 +1,456 @@
/*
* This was originally from the Lubbock u-boot port.
*
* Most of this taken from Redboot hal_platform_setup.h with cleanup
*
* NOTE: I haven't clean this up considerably, just enough to get it
* running. See hal_platform_setup.h for the source. See
* board/cradle/lowlevel_init.S for another PXA250 setup that is
* much cleaner.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <mach/pxa-regs.h>
#include <mach/regs-ost.h>
#include <mach/regs-intc.h>
#define GPSR0 0x40E00018 /* GPIO Pin Output Set Register GPIO <31:00> */
#define GPSR1 0x40E0001C /* GPIO Pin Output Set Register GPIO <63:32> */
#define GPSR2 0x40E00020 /* GPIO Pin Output Set Register GPIO <80:64> */
#define GPCR0 0x40E00024 /* GPIO Pin Output Clear Register GPIO <31:00> */
#define GPCR1 0x40E00028 /* GPIO Pin Output Clear Register GPIO <63:32> */
#define GPCR2 0x40E0002C /* GPIO Pin Output Clear Register GPIO <80:64> */
#define GPDR0 0x40E0000C /* GPIO Pin Direction Register GPIO <31:0o> */
#define GPDR1 0x40E00010 /* GPIO Pin Direction Register GPIO <63:32> */
#define GPDR2 0x40E00014 /* GPIO Pin Direction Register GPIO <80:64> */
#define GAFR0_L 0x40E00054 /* GPIO Alternate Function Select Register GPIO <15:00> */
#define GAFR0_U 0x40E00058 /* GPIO Alternate Function Select Register GPIO <31:16> */
#define GAFR1_L 0x40E0005C /* GPIO Alternate Function Select Register GPIO <47:32> */
#define GAFR1_U 0x40E00060 /* GPIO Alternate Function Select Register GPIO <63:48> */
#define GAFR2_L 0x40E00064 /* GPIO Alternate Function Select Register GPIO <79:64> */
#define GAFR2_U 0x40E00068 /* GPIO Alternate Function Select Register GPIO <95:80> */
/*
* Memory setup
*/
.globl board_init_lowlevel
board_init_lowlevel:
@ Preserve r8/r7 i.e. kernel entry values
@ Data cache might be active.
@ Be sure to flush kernel binary out of the cache,
@ whatever state it is, before it is turned off.
@ This is done by fetching through currently executed
@ memory to be sure we hit the same cache.
bic r2, pc, #0x1f
add r3, r2, #0x10000 @ 64 kb is quite enough...
1: ldr r0, [r2], #32
teq r2, r3
bne 1b
mcr p15, 0, r0, c7, c10, 4 @ drain WB
mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches
@ disabling MMU and caches
mrc p15, 0, r0, c1, c0, 0 @ read control reg
bic r0, r0, #0x05 @ clear DC, MMU
bic r0, r0, #0x1000 @ clear Icache
mcr p15, 0, r0, c1, c0, 0
/* set output */
ldr r0, =GPSR0
ldr r1, =CONFIG_GPSR0_VAL
str r1, [r0]
ldr r0, =GPSR1
ldr r1, =CONFIG_GPSR1_VAL
str r1, [r0]
ldr r0, =GPSR2
ldr r1, =CONFIG_GPSR2_VAL
str r1, [r0]
/* set direction */
ldr r0, =GPDR0
ldr r1, =CONFIG_GPDR0_VAL
str r1, [r0]
ldr r0, =GPDR1
ldr r1, =CONFIG_GPDR1_VAL
str r1, [r0]
ldr r0, =GPDR2
ldr r1, =CONFIG_GPDR2_VAL
str r1, [r0]
/* alternate function */
ldr r0, =GAFR0_L
ldr r1, =CONFIG_GAFR0_L_VAL
str r1, [r0]
ldr r0, =GAFR0_U
ldr r1, =CONFIG_GAFR0_U_VAL
str r1, [r0]
ldr r0, =GAFR1_L
ldr r1, =CONFIG_GAFR1_L_VAL
str r1, [r0]
ldr r0, =GAFR1_U
ldr r1, =CONFIG_GAFR1_U_VAL
str r1, [r0]
ldr r0, =GAFR2_L
ldr r1, =CONFIG_GAFR2_L_VAL
str r1, [r0]
ldr r0, =GAFR2_U
ldr r1, =CONFIG_GAFR2_U_VAL
str r1, [r0]
/* enable GPIO pins */
ldr r0, =PSSR
ldr r1, =CONFIG_PSSR_VAL
str r1, [r0]
/* -------------------------------------------------------------------- */
/* Enable memory interface */
/* */
/* The sequence below is based on the recommended init steps */
/* detailed in the Intel PXA250 Operating Systems Developers Guide, */
/* Chapter 10. */
/* -------------------------------------------------------------------- */
/* -------------------------------------------------------------------- */
/* Step 1: Wait for at least 200 microsedonds to allow internal */
/* clocks to settle. Only necessary after hard reset... */
/* FIXME: can be optimized later */
/* -------------------------------------------------------------------- */
ldr r3, =OSCR /* reset the OS Timer Count to zero */
mov r2, #0
str r2, [r3]
ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
/* so 0x300 should be plenty */
1:
ldr r2, [r3]
cmp r4, r2
bgt 1b
cmp pc, #0xa0000000
bls mem_init
cmp pc, #0xb0000000
bhi mem_init
b skip_mem_init
mem_init:
ldr r1, =MDCNFG /* get memory controller base addr. */
/* -------------------------------------------------------------------- */
/* Step 2a: Initialize Asynchronous static memory controller */
/* -------------------------------------------------------------------- */
/* MSC registers: timing, bus width, mem type */
/* MSC0: nCS(0,1) */
ldr r2, =CONFIG_MSC0_VAL
str r2, [r1, #MSC0_OFFSET]
ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */
/* that data latches */
/* MSC1: nCS(2,3) */
ldr r2, =CONFIG_MSC1_VAL
str r2, [r1, #MSC1_OFFSET]
ldr r2, [r1, #MSC1_OFFSET]
/* MSC2: nCS(4,5) */
ldr r2, =CONFIG_MSC2_VAL
str r2, [r1, #MSC2_OFFSET]
ldr r2, [r1, #MSC2_OFFSET]
/* -------------------------------------------------------------------- */
/* Step 2b: Initialize Card Interface */
/* -------------------------------------------------------------------- */
/* MECR: Memory Expansion Card Register */
ldr r2, =CONFIG_MECR_VAL
str r2, [r1, #MECR_OFFSET]
ldr r2, [r1, #MECR_OFFSET]
/* MCMEM0: Card Interface slot 0 timing */
ldr r2, =CONFIG_MCMEM0_VAL
str r2, [r1, #MCMEM0_OFFSET]
ldr r2, [r1, #MCMEM0_OFFSET]
/* MCMEM1: Card Interface slot 1 timing */
ldr r2, =CONFIG_MCMEM1_VAL
str r2, [r1, #MCMEM1_OFFSET]
ldr r2, [r1, #MCMEM1_OFFSET]
/* MCATT0: Card Interface Attribute Space Timing, slot 0 */
ldr r2, =CONFIG_MCATT0_VAL
str r2, [r1, #MCATT0_OFFSET]
ldr r2, [r1, #MCATT0_OFFSET]
/* MCATT1: Card Interface Attribute Space Timing, slot 1 */
ldr r2, =CONFIG_MCATT1_VAL
str r2, [r1, #MCATT1_OFFSET]
ldr r2, [r1, #MCATT1_OFFSET]
/* MCIO0: Card Interface I/O Space Timing, slot 0 */
ldr r2, =CONFIG_MCIO0_VAL
str r2, [r1, #MCIO0_OFFSET]
ldr r2, [r1, #MCIO0_OFFSET]
/* MCIO1: Card Interface I/O Space Timing, slot 1 */
ldr r2, =CONFIG_MCIO1_VAL
str r2, [r1, #MCIO1_OFFSET]
ldr r2, [r1, #MCIO1_OFFSET]
/* -------------------------------------------------------------------- */
/* Step 2c: Write FLYCNFG FIXME: what's that??? */
/* -------------------------------------------------------------------- */
ldr r2, =CONFIG_FLYCNFG_VAL
str r2, [r1, #FLYCNFG_OFFSET]
str r2, [r1, #FLYCNFG_OFFSET]
/* -------------------------------------------------------------------- */
/* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */
/* -------------------------------------------------------------------- */
/* Before accessing MDREFR we need a valid DRI field, so we set */
/* this to power on defaults + DRI field. */
ldr r4, [r1, #MDREFR_OFFSET]
ldr r2, =0xFFF
bic r4, r4, r2
ldr r3, =CONFIG_MDREFR_VAL
and r3, r3, r2
orr r4, r4, r3
str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
orr r4, r4, #MDREFR_K0RUN
orr r4, r4, #MDREFR_K0DB4
orr r4, r4, #MDREFR_K0FREE
orr r4, r4, #MDREFR_K2FREE
orr r4, r4, #MDREFR_K0DB2
orr r4, r4, #MDREFR_K1DB2
bic r4, r4, #MDREFR_K1FREE
str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
ldr r4, [r1, #MDREFR_OFFSET]
/* Note: preserve the mdrefr value in r4 */
/* -------------------------------------------------------------------- */
/* Step 3: Initialize Synchronous Static Memory (Flash/Peripherals) */
/* -------------------------------------------------------------------- */
/* Initialize SXCNFG register. Assert the enable bits */
/*
* Write SXMRS to cause an MRS command to all enabled banks of
* synchronous static memory. Note that SXLCR need not be
* written at this time.
*/
ldr r2, =CONFIG_SXCNFG_VAL
str r2, [r1, #SXCNFG_OFFSET]
/* -------------------------------------------------------------------- */
/* Step 4: Initialize SDRAM */
/* -------------------------------------------------------------------- */
bic r4, r4, #(MDREFR_K1FREE | MDREFR_K0FREE)
orr r4, r4, #MDREFR_K1RUN
orr r4, r4, #MDREFR_K2FREE
bic r4, r4, #MDREFR_K2DB2
str r4, [r1, #MDREFR_OFFSET]
ldr r4, [r1, #MDREFR_OFFSET]
bic r4, r4, #MDREFR_SLFRSH
str r4, [r1, #MDREFR_OFFSET]
ldr r4, [r1, #MDREFR_OFFSET]
orr r4, r4, #MDREFR_E1PIN
str r4, [r1, #MDREFR_OFFSET]
ldr r4, [r1, #MDREFR_OFFSET]
nop
nop
/*
* Step 4d: write MDCNFG with MDCNFG:DEx deasserted
* (set to 0), to configure but not enable each SDRAM
* partition pair.
*/
ldr r4, =CONFIG_MDCNFG_VAL
bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1)
bic r4, r4, #(MDCNFG_DE2|MDCNFG_DE3)
str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */
ldr r4, [r1, #MDCNFG_OFFSET]
/*
* Step 4e: Wait for the clock to the SDRAMs to stabilize,
* 100..200 usec.
*/
ldr r3, =OSCR /* reset the OS Timer Count to zero */
mov r2, #0
str r2, [r3]
ldr r4, =0x300 /* really 0x2E1 is about 200 usec, */
/* so 0x300 should be plenty */
1:
ldr r2, [r3]
cmp r4, r2
bgt 1b
/* Step 4f: Trigger a number (usually 8) refresh cycles by */
/* attempting non-burst read or write accesses to disabled */
/* SDRAM, as commonly specified in the power up sequence */
/* documented in SDRAM data sheets. The address(es) used */
/* for this purpose must not be cacheable. */
ldr r3, =CONFIG_DRAM_BASE
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
/*
* Step 4g: Write MDCNFG with enable bits asserted
* (MDCNFG:DEx set to 1)
*/
ldr r3, [r1, #MDCNFG_OFFSET]
mov r4, r3
orr r3, r3, #MDCNFG_DE0
str r3, [r1, #MDCNFG_OFFSET]
mov r0, r3
/* Step 4h: Write MDMRS. */
ldr r2, =CONFIG_MDMRS_VAL
str r2, [r1, #MDMRS_OFFSET]
/* enable APD */
ldr r3, [r1, #MDREFR_OFFSET]
orr r3, r3, #MDREFR_APD
str r3, [r1, #MDREFR_OFFSET]
/* We are finished with Intel's memory controller initialisation */
skip_mem_init:
wakeup:
/* Are we waking from sleep? */
ldr r0, =RCSR
ldr r1, [r0]
and r1, r1, #(RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR)
str r1, [r0]
teq r1, #RCSR_SMR
bne initirqs
ldr r0, =PSSR
mov r1, #PSSR_PH
str r1, [r0]
/* if so, resume at PSPR */
ldr r0, =PSPR
ldr r1, [r0]
mov pc, r1
/* -------------------------------------------------------------------- */
/* Disable (mask) all interrupts at interrupt controller */
/* -------------------------------------------------------------------- */
initirqs:
mov r1, #0 /* clear int. level register (IRQ, not FIQ) */
ldr r2, =ICLR
str r1, [r2]
ldr r2, =ICMR /* mask all interrupts at the controller */
str r1, [r2]
/* -------------------------------------------------------------------- */
/* Clock initialisation */
/* -------------------------------------------------------------------- */
initclks:
/* Disable the peripheral clocks, and set the core clock frequency */
/* Turn Off on-chip peripheral clocks (except for memory) */
/* for re-configuration. */
ldr r1, =CKEN
ldr r2, =CONFIG_CKEN
str r2, [r1]
/* ... and write the core clock config register */
ldr r2, =CONFIG_CCCR
ldr r1, =CCCR
str r2, [r1]
/* Turn on turbo mode */
mrc p14, 0, r2, c6, c0, 0
orr r2, r2, #0xB /* Turbo, Fast-Bus, Freq change */
mcr p14, 0, r2, c6, c0, 0
/* Re-write MDREFR */
ldr r1, =MDCNFG
ldr r2, [r1, #MDREFR_OFFSET]
str r2, [r1, #MDREFR_OFFSET]
/* enable the 32Khz oscillator for RTC and PowerManager */
ldr r1, =OSCC
mov r2, #OSCC_OON
str r2, [r1]
/* Interrupt init: Mask all interrupts */
ldr r0, =ICMR /* enable no sources */
mov r1, #0
str r1, [r0]
/* FIXME */
#ifdef NODEBUG
/* Disable software and data breakpoints */
mov r0, #0
mcr p15, 0, r0, c14, c8, 0 /* ibcr0 */
mcr p15, 0, r0, c14, c9, 0 /* ibcr1 */
mcr p15, 0, r0, c14, c4, 0 /* dbcon */
/* Enable all debug functionality */
mov r0, #0x80000000
mcr p14, 0, r0, c10, c0, 0 /* dcsr */
#endif
/* -------------------------------------------------------------------- */
/* End lowlevel_init */
/* -------------------------------------------------------------------- */
endlowlevel_init:
mov pc, lr

14
arch/arm/boards/pcm037/env/config vendored
View File

@ -1,6 +1,6 @@
#!/bin/sh
machine=pcm037
hostname=pcm037
eth0.serverip=
user=
@ -21,16 +21,16 @@ rootfs_loc=net
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root-$machine.$rootfs_type
rootfsimage=root-$hostname.$rootfs_type
kernelimage=zImage-$machine
#kernelimage=uImage-$machine
#kernelimage=Image-$machine
#kernelimage=Image-$machine.lzo
kernelimage=zImage-$hostname
#kernelimage=uImage-$hostname
#kernelimage=Image-$hostname
#kernelimage=Image-$hostname.lzo
if [ -n $user ]; then
kernelimage="$user"-"$kernelimage"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$machine"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$hostname"
rootfsimage="$user"-"$rootfsimage"
else
nfsroot="$eth0.serverip:/path/to/nfs/root"

10
arch/arm/boards/pcm037/pcm037.c
View File

@ -188,7 +188,7 @@ static int imx31_devices_init(void)
* Up to 32MiB NOR type flash, connected to
* CS line 0, data width is 16 bit
*/
add_cfi_flash_device(-1, IMX_CS0_BASE, 32 * 1024 * 1024, 0);
add_cfi_flash_device(DEVICE_ID_DYNAMIC, IMX_CS0_BASE, 32 * 1024 * 1024, 0);
/*
* Create partitions that should be
@ -212,13 +212,13 @@ static int imx31_devices_init(void)
* connected to CS line 1 and interrupt line
* GPIO3, data width is 16 bit
*/
add_generic_device("smc911x", -1, NULL, IMX_CS1_BASE, IMX_CS1_RANGE,
IORESOURCE_MEM, NULL);
add_generic_device("smc911x", DEVICE_ID_DYNAMIC, NULL, IMX_CS1_BASE,
IMX_CS1_RANGE, IORESOURCE_MEM, NULL);
#ifdef CONFIG_USB
pcm037_usb_init();
add_generic_usb_ehci_device(-1, IMX_OTG_BASE, NULL);
add_generic_usb_ehci_device(-1, IMX_OTG_BASE + 0x400, NULL);
add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, IMX_OTG_BASE, NULL);
add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, IMX_OTG_BASE + 0x400, NULL);
#endif
armlinux_set_bootparams((void *)0x80000100);

14
arch/arm/boards/pcm038/env/config vendored
View File

@ -1,6 +1,6 @@
#!/bin/sh
machine=pcm038
hostname=pcm038
eth0.serverip=
user=
@ -21,16 +21,16 @@ rootfs_loc=net
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root-$machine.$rootfs_type
rootfsimage=root-$hostname.$rootfs_type
kernelimage=zImage-$machine
#kernelimage=uImage-$machine
#kernelimage=Image-$machine
#kernelimage=Image-$machine.lzo
kernelimage=zImage-$hostname
#kernelimage=uImage-$hostname
#kernelimage=Image-$hostname
#kernelimage=Image-$hostname.lzo
if [ -n $user ]; then
kernelimage="$user"-"$kernelimage"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$machine"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$hostname"
rootfsimage="$user"-"$rootfsimage"
else
nfsroot="$eth0.serverip:/path/to/nfs/root"

37
arch/arm/boards/pcm038/pcm038.c
View File

@ -28,7 +28,6 @@
#include <mach/gpio.h>
#include <asm/armlinux.h>
#include <generated/mach-types.h>
#include <mach/pmic.h>
#include <partition.h>
#include <fs.h>
#include <fcntl.h>
@ -45,6 +44,7 @@
#include <mach/spi.h>
#include <mach/iomux-mx27.h>
#include <mach/devices-imx27.h>
#include <mfd/mc13xxx.h>
#include "pll.h"
@ -62,7 +62,7 @@ static struct spi_imx_master pcm038_spi_0_data = {
static struct spi_board_info pcm038_spi_board_info[] = {
{
.name = "mc13783",
.name = "mc13xxx-spi",
.max_speed_hz = 3000000,
.bus_num = 0,
.chip_select = 0,
@ -306,6 +306,35 @@ static int pcm038_console_init(void)
console_initcall(pcm038_console_init);
#ifdef CONFIG_MFD_MC13XXX
static int pmic_power(void)
{
struct mc13xxx *mc13xxx;
mc13xxx = mc13xxx_get();
if (!mc13xxx)
return -ENODEV;
mc13xxx_reg_write(mc13xxx, MC13783_REG_SWITCHERS(0),
MC13783_SWX_VOLTAGE(MC13783_SWX_VOLTAGE_1_450) |
MC13783_SWX_VOLTAGE_DVS(MC13783_SWX_VOLTAGE_1_450) |
MC13783_SWX_VOLTAGE_STANDBY(MC13783_SWX_VOLTAGE_1_450));
mc13xxx_reg_write(mc13xxx, MC13783_REG_SWITCHERS(4),
MC13783_SW1A_MODE(MC13783_SWX_MODE_NO_PULSE_SKIP) |
MC13783_SW1A_MODE_STANDBY(MC13783_SWX_MODE_NO_PULSE_SKIP) |
MC13783_SW1A_SOFTSTART |
MC13783_SW1B_MODE(MC13783_SWX_MODE_NO_PULSE_SKIP) |
MC13783_SW1B_MODE_STANDBY(MC13783_SWX_MODE_NO_PULSE_SKIP) |
MC13783_SW1B_SOFTSTART |
MC13783_SW_PLL_FACTOR(32));
return 0;
}
#else
# define pmic_power() (1)
#endif
/**
* The spctl0 register is a beast: Seems you can read it
* only one times without writing it again.
@ -326,15 +355,13 @@ static inline uint32_t get_pll_spctl10(void)
static int pcm038_power_init(void)
{
uint32_t spctl0;
int ret;
spctl0 = get_pll_spctl10();
/* PLL registers already set to their final values? */
if (spctl0 == SPCTL0_VAL && MPCTL0 == MPCTL0_VAL) {
console_flush();
ret = pmic_power();
if (ret == 0) {
if (!pmic_power()) {
/* wait for required power level to run the CPU at 400 MHz */
udelay(100000);
CSCR = CSCR_VAL_FINAL;

14
arch/arm/boards/pcm043/env/config vendored
View File

@ -1,6 +1,6 @@
#!/bin/sh
machine=pcm043
hostname=pcm043
eth0.serverip=
user=
@ -21,16 +21,16 @@ rootfs_loc=net
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root-$machine.$rootfs_type
rootfsimage=root-$hostname.$rootfs_type
kernelimage=zImage-$machine
#kernelimage=uImage-$machine
#kernelimage=Image-$machine
#kernelimage=Image-$machine.lzo
kernelimage=zImage-$hostname
#kernelimage=uImage-$hostname
#kernelimage=Image-$hostname
#kernelimage=Image-$hostname.lzo
if [ -n $user ]; then
kernelimage="$user"-"$kernelimage"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$machine"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$hostname"
rootfsimage="$user"-"$rootfsimage"
else
nfsroot="$eth0.serverip:/path/to/nfs/root"

2
arch/arm/boards/pcm043/pcm043.c
View File

@ -178,7 +178,7 @@ static int imx35_devices_init(void)
device_initcall(imx35_devices_init);
static struct pad_desc pcm043_pads[] = {
static iomux_v3_cfg_t pcm043_pads[] = {
MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
MX35_PAD_FEC_RX_DV__FEC_RX_DV,

9
arch/arm/boards/pcm049/board.c
View File

@ -50,7 +50,8 @@ static struct NS16550_plat serial_plat = {
static int pcm049_console_init(void)
{
/* Register the serial port */
add_ns16550_device(-1, OMAP44XX_UART3_BASE, 1024, IORESOURCE_MEM_8BIT, &serial_plat);
add_ns16550_device(DEVICE_ID_DYNAMIC, OMAP44XX_UART3_BASE, 1024,
IORESOURCE_MEM_8BIT, &serial_plat);
return 0;
}
@ -83,7 +84,7 @@ static void pcm049_network_init(void)
{
gpmc_cs_config(5, &net_cfg);
add_generic_device("smc911x", -1, NULL, 0x2C000000, 0x4000,
add_generic_device("smc911x", DEVICE_ID_DYNAMIC, NULL, 0x2C000000, 0x4000,
IORESOURCE_MEM, NULL);
}
@ -96,10 +97,10 @@ static struct i2c_board_info i2c_devices[] = {
static int pcm049_devices_init(void)
{
i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
add_generic_device("i2c-omap", -1, NULL, 0x48070000, 0x1000,
add_generic_device("i2c-omap", DEVICE_ID_DYNAMIC, NULL, 0x48070000, 0x1000,
IORESOURCE_MEM, NULL);
add_generic_device("omap-hsmmc", -1, NULL, 0x4809C100, SZ_4K,
add_generic_device("omap-hsmmc", DEVICE_ID_DYNAMIC, NULL, 0x4809C100, SZ_4K,
IORESOURCE_MEM, NULL);
gpmc_generic_init(0x10);

14
arch/arm/boards/pcm049/env/config vendored
View File

@ -1,6 +1,6 @@
#!/bin/sh
machine=pcm049
hostname=pcm049
eth0.serverip=
user=
@ -21,16 +21,16 @@ rootfs_loc=net
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root-${machine}.$rootfs_type
rootfsimage=root-${hostname}.$rootfs_type
kernelimage=zImage-$machine
#kernelimage=uImage-$machine
#kernelimage=Image-$machine
#kernelimage=Image-${machine}.lzo
kernelimage=zImage-$hostname
#kernelimage=uImage-$hostname
#kernelimage=Image-$hostname
#kernelimage=Image-${hostname}.lzo
if [ -n $user ]; then
kernelimage="$user"-"$kernelimage"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$machine"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$hostname"
rootfsimage="$user"-"$rootfsimage"
else
nfsroot="$eth0.serverip:/path/to/nfs/root"

18
arch/arm/boards/phycard-a-l1/env/config vendored
View File

@ -1,6 +1,6 @@
#!/bin/sh
machine=pcaal1
hostname=pcaal1
#user=
# Enter MAC address here if not retrieved automatically
@ -26,26 +26,26 @@ rootfs_loc=nand
rootfs_type=jffs2
# where is the rootfs in case of 'rootfs_loc=disk' (linux name)
rootfs_part_linux_dev=mmcblk0p4
rootfsimage=rootfs-${machine}.$rootfs_type
rootfsimage=rootfs-${hostname}.$rootfs_type
# where is the kernel image in case of 'kernel_loc=disk'
kernel_part=disk0.2
# The image type of the kernel. Can be uimage, zimage, raw or raw_lzo
#kernelimage=zImage-$machine
kernelimage=uImage-$machine
#kernelimage=Image-$machine
#kernelimage=Image-$machine.lzo
#kernelimage=zImage-$hostname
kernelimage=uImage-$hostname
#kernelimage=Image-$hostname
#kernelimage=Image-$hostname.lzo
bareboximage=barebox-${machine}.bin
bareboxenvimage=barebox-${machine}.bin
bareboximage=barebox-${hostname}.bin
bareboxenvimage=barebox-${hostname}.bin
if [ -n $user ]; then
bareboximage="$user"-"$bareboximage"
bareboxenvimage="$user"-"$bareboxenvimage"
kernelimage="$user"-"$kernelimage"
rootfsimage="$user"-"$rootfsimage"
nfsroot="/home/$user/nfsroot/$machine"
nfsroot="/home/$user/nfsroot/$hostname"
else
nfsroot="/path/to/nfs/root"
fi

4
arch/arm/boards/phycard-a-l1/pca-a-l1.c
View File

@ -311,13 +311,13 @@ struct omap_hsmmc_platform_data pcaal1_hsmmc_plat = {
static int pcaal1_init_devices(void)
{
#ifdef CONFIG_MCI_OMAP_HSMMC
add_generic_device("omap-hsmmc", -1, NULL, OMAP_MMC1_BASE, SZ_4K,
add_generic_device("omap-hsmmc", DEVICE_ID_DYNAMIC, NULL, OMAP_MMC1_BASE, SZ_4K,
IORESOURCE_MEM, &pcaal1_hsmmc_plat);
#endif
#ifdef CONFIG_DRIVER_NET_SMC911X
pcaal1_setup_net_chip();
add_generic_device("smc911x", -1, NULL, SMC911X_BASE, SZ_4K,
add_generic_device("smc911x", DEVICE_ID_DYNAMIC, NULL, SMC911X_BASE, SZ_4K,
IORESOURCE_MEM, NULL);
#endif

14
arch/arm/boards/phycard-a-xl2/env/config vendored
View File

@ -1,6 +1,6 @@
#!/bin/sh
machine=pcaaxl2
hostname=pcaaxl2
user=
# use 'dhcp' to do dhcp in barebox and in kernel
@ -20,16 +20,16 @@ rootfs_loc=net
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root-${machine}.$rootfs_type
rootfsimage=root-${hostname}.$rootfs_type
kernelimage=zImage-$machine
#kernelimage=uImage-$machine
#kernelimage=Image-$machine
#kernelimage=Image-${machine}.lzo
kernelimage=zImage-$hostname
#kernelimage=uImage-$hostname
#kernelimage=Image-$hostname
#kernelimage=Image-${hostname}.lzo
if [ -n $user ]; then
kernelimage="$user"-"$kernelimage"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$machine"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$hostname"
rootfsimage="$user"-"$rootfsimage"
else
nfsroot="$eth0.serverip:/path/to/nfs/root"

4
arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
View File

@ -109,7 +109,7 @@ static int pcaaxl2_devices_init(void)
u32 value;
i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
add_generic_device("i2c-omap", -1, NULL, 0x48070000, 0x1000,
add_generic_device("i2c-omap", DEVICE_ID_DYNAMIC, NULL, 0x48070000, 0x1000,
IORESOURCE_MEM, NULL);
value = readl(OMAP4_CONTROL_PBIASLITE);
@ -117,7 +117,7 @@ static int pcaaxl2_devices_init(void)
value |= (OMAP4_MMC1_PBIASLITE_PWRDNZ | OMAP4_MMC1_PWRDNZ);
writel(value, OMAP4_CONTROL_PBIASLITE);
add_generic_device("omap-hsmmc", -1, NULL, 0x4809C100, SZ_4K,
add_generic_device("omap-hsmmc", DEVICE_ID_DYNAMIC, NULL, 0x4809C100, SZ_4K,
IORESOURCE_MEM, &mmc_device);
gpmc_generic_init(0x10);

14
arch/arm/boards/phycard-i.MX27/env/config vendored
View File

@ -1,6 +1,6 @@
#!/bin/sh
machine=pca100
hostname=pca100
eth0.serverip=
user=
@ -21,16 +21,16 @@ rootfs_loc=net
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root-$machine.$rootfs_type
rootfsimage=root-$hostname.$rootfs_type
kernelimage=zImage-$machine
#kernelimage=uImage-$machine
#kernelimage=Image-$machine
#kernelimage=Image-$machine.lzo
kernelimage=zImage-$hostname
#kernelimage=uImage-$hostname
#kernelimage=Image-$hostname
#kernelimage=Image-$hostname.lzo
if [ -n $user ]; then
kernelimage="$user"-"$kernelimage"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$machine"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$hostname"
rootfsimage="$user"-"$rootfsimage"
else
nfsroot="$eth0.serverip:/path/to/nfs/root"

14
arch/arm/boards/scb9328/env/config vendored
View File

@ -1,6 +1,6 @@
#!/bin/sh
machine=scb9328
hostname=scb9328
eth0.serverip=
user=
@ -21,16 +21,16 @@ rootfs_loc=net
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root-$machine.$rootfs_type
rootfsimage=root-$hostname.$rootfs_type
kernelimage=zImage-$machine
#kernelimage=uImage-$machine
#kernelimage=Image-$machine
#kernelimage=Image-$machine.lzo
kernelimage=zImage-$hostname
#kernelimage=uImage-$hostname
#kernelimage=Image-$hostname
#kernelimage=Image-$hostname.lzo
if [ -n $user ]; then
kernelimage="$user"-"$kernelimage"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$machine"
nfsroot="$eth0.serverip:/home/$user/nfsroot/$hostname"
rootfsimage="$user"-"$rootfsimage"
else
nfsroot="$eth0.serverip:/path/to/nfs/root"

13
arch/arm/boards/tny-a926x/env/config vendored
View File

@ -3,6 +3,9 @@
# use 'dhcp' to do dhcp in barebox and in kernel
# use 'none' if you want to skip kernel ip autoconfiguration
ip=dhcp-barebox
[ x$armlinux_architecture = x2058 ] && dhcp_vendor_id=barebox-tny-a9260
[ x$armlinux_architecture = x2059 ] && dhcp_vendor_id=barebox-tny-a9g20
[ x$armlinux_architecture = x2140 ] && dhcp_vendor_id=barebox-tny-a9263
# or set your networking parameters here
#eth0.ipaddr=a.b.c.d
@ -14,19 +17,21 @@ ip=dhcp-barebox
kernel_loc=nand
# can be either 'net', 'nor', 'nand' or 'initrd'
rootfs_loc=nand
# can be either 'nfs', 'tftp', 'nor', 'nand' or empty
oftree_loc=nand
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root.$rootfs_type
#kernelimage=zImage
kernelimage=uImage
kernelimage=zImage
#kernelimage=uImage
#kernelimage=Image
#kernelimage=Image.lzo
nand_device=atmel_nand
nand_parts="128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),4M(kernel),120M(rootfs),-(data)"
rootfs_mtdblock_nand=5
nand_parts="128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),128k(oftree),4M(kernel),120M(rootfs),-(data)"
rootfs_mtdblock_nand=6
autoboot_timeout=3

2
arch/arm/boards/tqma53/board.c
View File

@ -43,7 +43,7 @@ static struct fec_platform_data fec_info = {
.xcv_type = RMII,
};
static struct pad_desc tqma53_pads[] = {
static iomux_v3_cfg_t tqma53_pads[] = {
MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD,
MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC,
MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD,

8
arch/arm/boards/tqma53/env/config vendored
View File

@ -1,6 +1,6 @@
#!/bin/sh
machine=tqma53
hostname=tqma53
serverip=
user=
@ -21,13 +21,13 @@ rootfs_loc=net
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root-$machine.$rootfs_type
rootfsimage=root-$hostname.$rootfs_type
kernelimage=zImage-$machine
kernelimage=zImage-$hostname
if [ -n $user ]; then
kernelimage="$user"-"$kernelimage"
nfsroot="$serverip:/home/$user/nfsroot/$machine"
nfsroot="$serverip:/home/$user/nfsroot/$hostname"
rootfsimage="$user"-"$rootfsimage"
else
nfsroot="$serverip:/path/to/nfs/root"

16
arch/arm/boards/usb-a926x/env/config vendored
View File

@ -3,7 +3,9 @@
# use 'dhcp' to do dhcp in barebox and in kernel
# use 'none' if you want to skip kernel ip autoconfiguration
ip=dhcp-barebox
dhcp_vendor_id=barebox-at91sam9x5ek
[ x$armlinux_architecture = x1709 ] && dhcp_vendor_id=barebox-usb-a9260
[ x$armlinux_architecture = x1710 ] && dhcp_vendor_id=barebox-usb-a9263
[ x$armlinux_architecture = x1841 ] && dhcp_vendor_id=barebox-usb-a9g20
# or set your networking parameters here
#eth0.ipaddr=a.b.c.d
@ -12,22 +14,24 @@ dhcp_vendor_id=barebox-at91sam9x5ek
#eth0.serverip=a.b.c.d
# can be either 'nfs', 'tftp', 'nor' or 'nand'
kernel_loc=tftp
kernel_loc=nfs
# can be either 'net', 'nor', 'nand' or 'initrd'
rootfs_loc=net
# can be either 'nfs', 'tftp', 'nor', 'nand' or empty
oftree_loc=nfs
# can be either 'jffs2' or 'ubifs'
rootfs_type=ubifs
rootfsimage=root.$rootfs_type
#kernelimage=zImage
kernelimage=uImage
kernelimage=zImage
#kernelimage=uImage
#kernelimage=Image
#kernelimage=Image.lzo
nand_device=atmel_nand
nand_parts="128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),4M(kernel),120M(rootfs),-(data)"
rootfs_mtdblock_nand=5
nand_parts="128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),128k(oftree),4M(kernel),120M(rootfs),-(data)"
rootfs_mtdblock_nand=6
autoboot_timeout=3

4
arch/arm/boards/versatile/versatilepb.c
View File

@ -54,8 +54,8 @@ static int vpb_devices_init(void)
devfs_add_partition("nor0", 0x00000, 0x40000, PARTITION_FIXED, "self");
devfs_add_partition("nor0", 0x40000, 0x20000, PARTITION_FIXED, "env0");
add_generic_device("smc91c111", -1, NULL, VERSATILE_ETH_BASE, 64 * 1024,
IORESOURCE_MEM, NULL);
add_generic_device("smc91c111", DEVICE_ID_DYNAMIC, NULL, VERSATILE_ETH_BASE,
64 * 1024, IORESOURCE_MEM, NULL);
armlinux_set_architecture(MACH_TYPE_VERSATILE_PB);
armlinux_set_bootparams((void *)(0x00000100));

2
arch/arm/configs/at91sam9260ek_defconfig
View File

@ -51,6 +51,7 @@ CONFIG_NET_NETCONSOLE=y
CONFIG_DRIVER_NET_MACB=y
# CONFIG_SPI is not set
CONFIG_MTD=y
# CONFIG_MTD_OOB_DEVICE is not set
CONFIG_NAND=y
# CONFIG_NAND_ECC_HW is not set
# CONFIG_NAND_ECC_HW_SYNDROME is not set
@ -69,4 +70,3 @@ CONFIG_LED_TRIGGERS=y
CONFIG_FS_FAT=y
CONFIG_FS_FAT_WRITE=y
CONFIG_FS_FAT_LFN=y
CONFIG_ZLIB=y

3
arch/arm/configs/at91sam9263ek_defconfig
View File

@ -1,4 +1,5 @@
CONFIG_ARCH_AT91SAM9263=y
# CONFIG_CMD_ARM_CPUINFO is not set
CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
CONFIG_MMU=y
CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
@ -29,6 +30,7 @@ CONFIG_CMD_BOOTM_INITRD=y
CONFIG_CMD_BOOTM_OFTREE=y
CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y
CONFIG_CMD_UIMAGE=y
# CONFIG_CMD_BOOTZ is not set
# CONFIG_CMD_BOOTU is not set
CONFIG_CMD_RESET=y
CONFIG_CMD_GO=y
@ -47,6 +49,7 @@ CONFIG_DRIVER_NET_MACB=y
# CONFIG_SPI is not set
CONFIG_DRIVER_CFI=y
# CONFIG_DRIVER_CFI_INTEL is not set
# CONFIG_DRIVER_CFI_BANK_WIDTH_4 is not set
CONFIG_MTD=y
# CONFIG_MTD_OOB_DEVICE is not set
CONFIG_NAND=y

2
arch/arm/configs/at91sam9g20ek_defconfig
View File

@ -52,6 +52,7 @@ CONFIG_NET_NETCONSOLE=y
CONFIG_DRIVER_NET_MACB=y
# CONFIG_SPI is not set
CONFIG_MTD=y
# CONFIG_MTD_OOB_DEVICE is not set
CONFIG_NAND=y
# CONFIG_NAND_ECC_HW is not set
# CONFIG_NAND_ECC_HW_SYNDROME is not set
@ -70,4 +71,3 @@ CONFIG_LED_TRIGGERS=y
CONFIG_FS_FAT=y
CONFIG_FS_FAT_WRITE=y
CONFIG_FS_FAT_LFN=y
CONFIG_ZLIB=y

69
arch/arm/configs/freescale-mx6-arm2_defconfig Normal file
View File

@ -0,0 +1,69 @@
CONFIG_ARCH_IMX=y
CONFIG_ARCH_IMX6=y
CONFIG_IMX_IIM=y
CONFIG_IMX_IIM_FUSE_BLOW=y
CONFIG_AEABI=y
CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
CONFIG_ARM_UNWIND=y
CONFIG_MMU=y
CONFIG_MALLOC_SIZE=0x8000000
CONFIG_MALLOC_TLSF=y
CONFIG_KALLSYMS=y
CONFIG_LONGHELP=y
CONFIG_GLOB=y
CONFIG_HUSH_FANCY_PROMPT=y
CONFIG_CMDLINE_EDITING=y
CONFIG_AUTO_COMPLETE=y
CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
CONFIG_DEFAULT_ENVIRONMENT_PATH="defaultenv arch/arm/boards/freescale-mx6-arm2/env/"
CONFIG_DEBUG_INFO=y
CONFIG_CMD_EDIT=y
CONFIG_CMD_SLEEP=y
CONFIG_CMD_SAVEENV=y
CONFIG_CMD_EXPORT=y
CONFIG_CMD_PRINTENV=y
CONFIG_CMD_READLINE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_ECHO_E=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_IOMEM=y
CONFIG_CMD_FLASH=y
CONFIG_CMD_BOOTM_SHOW_TYPE=y
CONFIG_CMD_BOOTM_VERBOSE=y
CONFIG_CMD_BOOTM_INITRD=y
CONFIG_CMD_BOOTM_OFTREE=y
CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y
CONFIG_CMD_UIMAGE=y
# CONFIG_CMD_BOOTZ is not set
# CONFIG_CMD_BOOTU is not set
CONFIG_CMD_RESET=y
CONFIG_CMD_GO=y
CONFIG_CMD_TIMEOUT=y
CONFIG_CMD_PARTITION=y
CONFIG_CMD_MAGICVAR=y
CONFIG_CMD_MAGICVAR_HELP=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_UNCOMPRESS=y
CONFIG_NET=y
CONFIG_NET_DHCP=y
CONFIG_NET_NFS=y
CONFIG_NET_PING=y
CONFIG_NET_TFTP=y
CONFIG_NET_TFTP_PUSH=y
CONFIG_NET_NETCONSOLE=y
CONFIG_DRIVER_NET_FEC_IMX=y
CONFIG_NET_USB=y
CONFIG_NET_USB_ASIX=y
CONFIG_NET_USB_SMSC95XX=y
# CONFIG_SPI is not set
CONFIG_USB=y
CONFIG_USB_EHCI=y
CONFIG_USB_STORAGE=y
CONFIG_MCI=y
CONFIG_MCI_STARTUP=y
CONFIG_MCI_IMX_ESDHC=y
CONFIG_FS_FAT=y
CONFIG_FS_FAT_WRITE=y
CONFIG_FS_FAT_LFN=y
CONFIG_ZLIB=y
CONFIG_LZO_DECOMPRESS=y

2
arch/arm/configs/freescale_mx51_babbage_defconfig
View File

@ -58,7 +58,7 @@ CONFIG_CFI_BUFFER_WRITE=y
CONFIG_MCI=y
CONFIG_MCI_STARTUP=y
CONFIG_MCI_IMX_ESDHC=y
CONFIG_I2C_MC13892=y
CONFIG_MFD_MC13XXX=y
CONFIG_FS_FAT=y
CONFIG_FS_FAT_WRITE=y
CONFIG_FS_FAT_LFN=y

3
arch/arm/configs/freescale_mx53_loco_defconfig
View File

@ -57,6 +57,9 @@ CONFIG_DRIVER_NET_FEC_IMX=y
# CONFIG_SPI is not set
CONFIG_I2C=y
CONFIG_I2C_IMX=y
CONFIG_USB=y
CONFIG_USB_EHCI=y
CONFIG_USB_STORAGE=y
CONFIG_MCI=y
CONFIG_MCI_STARTUP=y
CONFIG_MCI_IMX_ESDHC=y

4
arch/arm/configs/mx21ads_defconfig
View File

@ -2,8 +2,8 @@ CONFIG_ARCH_IMX=y
CONFIG_ARCH_IMX21=y
CONFIG_IMX_CLKO=y
CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
CONFIG_TEXT_BASE=0xc1000000
CONFIG_MALLOC_SIZE=0x500000
CONFIG_TEXT_BASE=0xc3000000
CONFIG_MALLOC_SIZE=0x2000000
CONFIG_LONGHELP=y
CONFIG_CMDLINE_EDITING=y
CONFIG_AUTO_COMPLETE=y

1
arch/arm/configs/mx27ads_defconfig
View File

@ -32,7 +32,6 @@ CONFIG_NET_DHCP=y
CONFIG_NET_PING=y
CONFIG_NET_TFTP=y
CONFIG_DRIVER_SPI_IMX=y
CONFIG_DRIVER_SPI_MC13783=y
CONFIG_DRIVER_CFI=y
# CONFIG_DRIVER_CFI_INTEL is not set
CONFIG_CFI_BUFFER_WRITE=y

1
arch/arm/configs/neso_defconfig
View File

@ -72,4 +72,3 @@ CONFIG_USB_ULPI=y
CONFIG_VIDEO=y
CONFIG_DRIVER_VIDEO_IMX=y
CONFIG_IMXFB_DRIVER_VIDEO_IMX_OVERLAY=y
CONFIG_DRIVER_SPI_MC13783=y

61
arch/arm/configs/pcm027_defconfig Normal file
View File

@ -0,0 +1,61 @@
CONFIG_ARCH_PXA=y
CONFIG_MACH_PCM027=y
CONFIG_AEABI=y
CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
CONFIG_ARM_UNWIND=y
CONFIG_MMU=y
CONFIG_MALLOC_SIZE=0x1000000
CONFIG_MALLOC_TLSF=y
CONFIG_KALLSYMS=y
CONFIG_LONGHELP=y
CONFIG_GLOB=y
CONFIG_HUSH_FANCY_PROMPT=y
CONFIG_CMDLINE_EDITING=y
CONFIG_AUTO_COMPLETE=y
CONFIG_PARTITION=y
CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/pcm027/env"
CONFIG_DEBUG_INFO=y
CONFIG_CMD_EDIT=y
CONFIG_CMD_SLEEP=y
CONFIG_CMD_SAVEENV=y
CONFIG_CMD_EXPORT=y
CONFIG_CMD_PRINTENV=y
CONFIG_CMD_READLINE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_AUTOMOUNT=y
CONFIG_CMD_ECHO_E=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_IOMEM=y
CONFIG_CMD_FLASH=y
CONFIG_CMD_BOOTM_SHOW_TYPE=y
CONFIG_CMD_BOOTM_VERBOSE=y
CONFIG_CMD_BOOTM_INITRD=y
CONFIG_CMD_BOOTM_OFTREE=y
CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y
CONFIG_CMD_UIMAGE=y
# CONFIG_CMD_BOOTZ is not set
# CONFIG_CMD_BOOTU is not set
CONFIG_CMD_RESET=y
CONFIG_CMD_GO=y
CONFIG_CMD_OFTREE=y
CONFIG_CMD_TIMEOUT=y
CONFIG_CMD_PARTITION=y
CONFIG_CMD_MAGICVAR=y
CONFIG_CMD_MAGICVAR_HELP=y
CONFIG_CMD_BMP=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_UNCOMPRESS=y
CONFIG_NET=y
CONFIG_NET_DHCP=y
CONFIG_NET_PING=y
CONFIG_NET_TFTP=y
CONFIG_NET_TFTP_PUSH=y
CONFIG_DRIVER_SERIAL_PXA=y
CONFIG_DRIVER_NET_SMC91111=y
# CONFIG_SPI is not set
CONFIG_DRIVER_CFI=y
CONFIG_VIDEO=y
CONFIG_DRIVER_VIDEO_PXA=y
CONFIG_FS_TFTP=y
CONFIG_LZO_DECOMPRESS=y

1
arch/arm/configs/pcm038_defconfig
View File

@ -76,3 +76,4 @@ CONFIG_DRIVER_VIDEO_IMX=y
CONFIG_IMXFB_DRIVER_VIDEO_IMX_OVERLAY=y
CONFIG_ZLIB=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MFD_MC13XXX=y

4
arch/arm/configs/tny_a9260_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_CALAO_MOB_TNY_MD2=y
CONFIG_AEABI=y
# CONFIG_CMD_ARM_CPUINFO is not set
CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
CONFIG_MMU=y
CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
CONFIG_EXPERIMENTAL=y
CONFIG_MALLOC_TLSF=y
@ -22,7 +23,6 @@ CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/tny-a926x/env"
CONFIG_CMD_EDIT=y
CONFIG_CMD_SLEEP=y
CONFIG_CMD_SAVEENV=y
CONFIG_CMD_LOADENV=y
CONFIG_CMD_EXPORT=y
CONFIG_CMD_PRINTENV=y
CONFIG_CMD_READLINE=y
@ -59,6 +59,7 @@ CONFIG_NET_NETCONSOLE=y
CONFIG_DRIVER_NET_MACB=y
CONFIG_DRIVER_SPI_ATMEL=y
CONFIG_MTD=y
# CONFIG_MTD_OOB_DEVICE is not set
CONFIG_NAND=y
# CONFIG_NAND_ECC_HW is not set
# CONFIG_NAND_ECC_HW_SYNDROME is not set
@ -68,4 +69,3 @@ CONFIG_UBI=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_SERIAL=y
CONFIG_EEPROM_AT25=y
CONFIG_ZLIB=y

4
arch/arm/configs/tny_a9263_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_CALAO_MOB_TNY_MD2=y
CONFIG_AEABI=y
# CONFIG_CMD_ARM_CPUINFO is not set
CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
CONFIG_MMU=y
CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
CONFIG_EXPERIMENTAL=y
CONFIG_MALLOC_TLSF=y
@ -22,7 +23,6 @@ CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/tny-a926x/env"
CONFIG_CMD_EDIT=y
CONFIG_CMD_SLEEP=y
CONFIG_CMD_SAVEENV=y
CONFIG_CMD_LOADENV=y
CONFIG_CMD_EXPORT=y
CONFIG_CMD_PRINTENV=y
CONFIG_CMD_READLINE=y
@ -59,6 +59,7 @@ CONFIG_NET_NETCONSOLE=y
CONFIG_DRIVER_NET_MACB=y
CONFIG_DRIVER_SPI_ATMEL=y
CONFIG_MTD=y
# CONFIG_MTD_OOB_DEVICE is not set
CONFIG_NAND=y
# CONFIG_NAND_ECC_HW is not set
# CONFIG_NAND_ECC_HW_SYNDROME is not set
@ -68,4 +69,3 @@ CONFIG_UBI=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_SERIAL=y
CONFIG_EEPROM_AT25=y
CONFIG_ZLIB=y

4
arch/arm/configs/tny_a9g20_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_CALAO_MOB_TNY_MD2=y
CONFIG_AEABI=y
# CONFIG_CMD_ARM_CPUINFO is not set
CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
CONFIG_MMU=y
CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
CONFIG_EXPERIMENTAL=y
CONFIG_MALLOC_TLSF=y
@ -22,7 +23,6 @@ CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/tny-a926x/env"
CONFIG_CMD_EDIT=y
CONFIG_CMD_SLEEP=y
CONFIG_CMD_SAVEENV=y
CONFIG_CMD_LOADENV=y
CONFIG_CMD_EXPORT=y
CONFIG_CMD_PRINTENV=y
CONFIG_CMD_READLINE=y
@ -59,6 +59,7 @@ CONFIG_NET_NETCONSOLE=y
CONFIG_DRIVER_NET_MACB=y
CONFIG_DRIVER_SPI_ATMEL=y
CONFIG_MTD=y
# CONFIG_MTD_OOB_DEVICE is not set
CONFIG_NAND=y
# CONFIG_NAND_ECC_HW is not set
# CONFIG_NAND_ECC_HW_SYNDROME is not set
@ -68,4 +69,3 @@ CONFIG_UBI=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_SERIAL=y
CONFIG_EEPROM_AT25=y
CONFIG_ZLIB=y

148
arch/arm/configs/tx51stk5_defconfig Normal file
View File

@ -0,0 +1,148 @@
CONFIG_GENERIC_LINKER_SCRIPT=y
CONFIG_ARM=y
CONFIG_ARM_LINUX=y
CONFIG_ARCH_IMX=y
CONFIG_CPU_32=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v7=y
CONFIG_ARCH_IMX_INTERNAL_BOOT=y
CONFIG_ARCH_IMX_INTERNAL_BOOT_NAND=y
CONFIG_ARCH_IMX51=y
CONFIG_MACH_TX51=y
CONFIG_IMX_IIM=y
CONFIG_AEABI=y
CONFIG_CMD_ARM_CPUINFO=y
CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
CONFIG_ARM_EXCEPTIONS=y
CONFIG_ARM_UNWIND=y
CONFIG_GREGORIAN_CALENDER=y
CONFIG_HAS_KALLSYMS=y
CONFIG_HAS_MODULES=y
CONFIG_CMD_MEMORY=y
CONFIG_ENV_HANDLING=y
CONFIG_GENERIC_GPIO=y
CONFIG_BLOCK=y
CONFIG_BLOCK_WRITE=y
CONFIG_FILETYPE=y
CONFIG_LOCALVERSION_AUTO=y
CONFIG_BANNER=y
CONFIG_ENVIRONMENT_VARIABLES=y
CONFIG_MMU=y
CONFIG_HAVE_CONFIGURABLE_TEXT_BASE=y
CONFIG_HAVE_CONFIGURABLE_MEMORY_LAYOUT=y
CONFIG_MEMORY_LAYOUT_DEFAULT=y
CONFIG_MALLOC_TLSF=y
CONFIG_KALLSYMS=y
CONFIG_LONGHELP=y
CONFIG_SHELL_HUSH=y
CONFIG_GLOB=y
CONFIG_HUSH_FANCY_PROMPT=y
CONFIG_HUSH_GETOPT=y
CONFIG_CMDLINE_EDITING=y
CONFIG_AUTO_COMPLETE=y
CONFIG_DYNAMIC_CRC_TABLE=y
CONFIG_ERRNO_MESSAGES=y
CONFIG_TIMESTAMP=y
CONFIG_CONSOLE_FULL=y
CONFIG_CONSOLE_ACTIVATE_FIRST=y
CONFIG_PARTITION=y
CONFIG_PARTITION_DISK=y
CONFIG_PARTITION_DISK_DOS=y
CONFIG_DEFAULT_ENVIRONMENT=y
CONFIG_DEFAULT_ENVIRONMENT_COMPRESSED=y
CONFIG_DEFAULT_ENVIRONMENT_COMPRESSED_GZIP=y
CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
CONFIG_COMMAND_SUPPORT=y
CONFIG_CMD_EDIT=y
CONFIG_CMD_SLEEP=y
CONFIG_CMD_SAVEENV=y
CONFIG_CMD_LOADENV=y
CONFIG_CMD_EXPORT=y
CONFIG_CMD_PRINTENV=y
CONFIG_CMD_READLINE=y
CONFIG_CMD_TRUE=y
CONFIG_CMD_FALSE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_LS=y
CONFIG_CMD_RM=y
CONFIG_CMD_CAT=y
CONFIG_CMD_MKDIR=y
CONFIG_CMD_RMDIR=y
CONFIG_CMD_CP=y
CONFIG_CMD_PWD=y
CONFIG_CMD_CD=y
CONFIG_CMD_MOUNT=y
CONFIG_CMD_UMOUNT=y
CONFIG_CMD_NAND=y
CONFIG_CMD_CLEAR=y
CONFIG_CMD_ECHO=y
CONFIG_CMD_ECHO_E=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_IOMEM=y
CONFIG_CMD_CRC=y
CONFIG_CMD_CRC_CMP=y
CONFIG_CMD_MTEST=y
CONFIG_CMD_MTEST_ALTERNATIVE=y
CONFIG_CMD_FLASH=y
CONFIG_CMD_UBI=y
CONFIG_CMD_BOOTM=y
CONFIG_CMD_BOOTM_SHOW_TYPE=y
CONFIG_CMD_BOOTM_VERBOSE=y
CONFIG_CMD_BOOTM_INITRD=y
CONFIG_CMD_UIMAGE=y
CONFIG_CMD_RESET=y
CONFIG_CMD_GO=y
CONFIG_CMD_TIMEOUT=y
CONFIG_CMD_PARTITION=y
CONFIG_CMD_TEST=y
CONFIG_CMD_VERSION=y
CONFIG_CMD_HELP=y
CONFIG_CMD_MAGICVAR=y
CONFIG_CMD_MAGICVAR_HELP=y
CONFIG_CMD_DEVINFO=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_UNCOMPRESS=y
CONFIG_CMD_LED=y
CONFIG_NET=y
CONFIG_NET_DHCP=y
CONFIG_NET_PING=y
CONFIG_NET_TFTP=y
CONFIG_NET_TFTP_PUSH=y
CONFIG_DRIVER_SERIAL_IMX=y
CONFIG_ARCH_HAS_FEC_IMX=y
CONFIG_MIIDEV=y
CONFIG_DRIVER_NET_FEC_IMX=y
CONFIG_DRIVER_SPI_IMX_2_3=y
CONFIG_MTD=y
CONFIG_MTD_WRITE=y
CONFIG_MTD_OOB_DEVICE=y
CONFIG_NAND=y
CONFIG_NAND_ECC_SOFT=y
CONFIG_NAND_ECC_HW=y
CONFIG_NAND_ECC_HW_SYNDROME=y
CONFIG_NAND_ECC_HW_NONE=y
CONFIG_NAND_INFO=y
CONFIG_NAND_READ_OOB=y
CONFIG_NAND_BBT=y
CONFIG_NAND_IMX=y
CONFIG_MTD_NAND_IDS=y
CONFIG_UBI=y
CONFIG_DISK=y
CONFIG_DISK_WRITE=y
CONFIG_MCI=y
CONFIG_MCI_STARTUP=y
CONFIG_MCI_INFO=y
CONFIG_MCI_WRITE=y
CONFIG_MCI_IMX_ESDHC=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_FS_RAMFS=y
CONFIG_FS_DEVFS=y
CONFIG_FS_FAT=y
CONFIG_PARTITION_NEED_MTD=y
CONFIG_PARAMETER=y
CONFIG_UNCOMPRESS=y
CONFIG_ZLIB=y
CONFIG_PROCESS_ESCAPE_SEQUENCE=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_CRC32=y

7
arch/arm/configs/usb_a9260_defconfig
View File

@ -3,6 +3,7 @@ CONFIG_MACH_USB_A9260=y
CONFIG_AEABI=y
# CONFIG_CMD_ARM_CPUINFO is not set
CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
CONFIG_MMU=y
CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
CONFIG_EXPERIMENTAL=y
CONFIG_PROMPT="USB-9G20:"
@ -21,7 +22,6 @@ CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/usb-a926x/env"
CONFIG_CMD_EDIT=y
CONFIG_CMD_SLEEP=y
CONFIG_CMD_SAVEENV=y
CONFIG_CMD_LOADENV=y
CONFIG_CMD_EXPORT=y
CONFIG_CMD_PRINTENV=y
CONFIG_CMD_READLINE=y
@ -33,12 +33,14 @@ CONFIG_CMD_LOADB=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MD5SUM=y
CONFIG_CMD_SHA1SUM=y
CONFIG_CMD_SHA256SUM=y
CONFIG_CMD_MTEST=y
CONFIG_CMD_MTEST_ALTERNATIVE=y
CONFIG_CMD_FLASH=y
CONFIG_CMD_BOOTM_SHOW_TYPE=y
CONFIG_CMD_BOOTM_VERBOSE=y
CONFIG_CMD_BOOTM_INITRD=y
CONFIG_CMD_BOOTM_OFTREE=y
CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y
CONFIG_CMD_UIMAGE=y
# CONFIG_CMD_BOOTZ is not set
# CONFIG_CMD_BOOTU is not set
@ -61,6 +63,7 @@ CONFIG_NET_RESOLV=y
CONFIG_DRIVER_NET_MACB=y
# CONFIG_SPI is not set
CONFIG_MTD=y
# CONFIG_MTD_OOB_DEVICE is not set
CONFIG_NAND=y
# CONFIG_NAND_ECC_HW is not set
# CONFIG_NAND_ECC_HW_SYNDROME is not set

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