mci: tegra: apply pad autocalibration on T30
Needed for SD cards connected to sdmmc1 or sdmmc3 to work properly. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -59,6 +59,14 @@
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#define TEGRA_SDMMC_INT_SIG_EN 0x038
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#define TEGRA_SDMMC_INT_SIG_EN_XFER_COMPLETE (1 << 1)
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#define TEGRA_SDMMC_SDMEMCOMPPADCTRL 0x1e0
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#define TEGRA_SDMMC_SDMEMCOMPPADCTRL_VREF_SEL_SHIFT 0
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#define TEGRA_SDMMC_AUTO_CAL_CONFIG 0x1e4
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#define TEGRA_SDMMC_AUTO_CAL_CONFIG_PU_OFFSET_SHIFT 0
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#define TEGRA_SDMMC_AUTO_CAL_CONFIG_PD_OFFSET_SHIFT 8
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#define TEGRA_SDMMC_AUTO_CAL_CONFIG_ENABLE (1 << 29)
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struct tegra_sdmmc_host {
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struct mci_host mci;
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void __iomem *regs;
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@ -333,6 +341,23 @@ static int tegra_sdmmc_init(struct mci_host *mci, struct device_d *dev)
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val |= TEGRA_SDMMC_PWR_CNTL_33_V | TEGRA_SDMMC_PWR_CNTL_SD_BUS;
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writel(val, regs + TEGRA_SDMMC_PWR_CNTL);
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/* sdmmc1 and sdmmc3 on T30 need a bit of padctrl init */
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if (of_device_is_compatible(mci->hw_dev->device_node,
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"nvidia,tegra30-sdhci") &&
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((u32)regs == 0x78000000 || (u32)regs == 78000400)) {
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val = readl(regs + TEGRA_SDMMC_SDMEMCOMPPADCTRL);
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val &= 0xfffffff0;
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val |= 0x7 << TEGRA_SDMMC_SDMEMCOMPPADCTRL_VREF_SEL_SHIFT;
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writel(val, regs + TEGRA_SDMMC_SDMEMCOMPPADCTRL);
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val = readl(regs + TEGRA_SDMMC_AUTO_CAL_CONFIG);
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val &= 0xffff0000;
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val |= (0x62 << TEGRA_SDMMC_AUTO_CAL_CONFIG_PU_OFFSET_SHIFT) |
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(0x70 << TEGRA_SDMMC_AUTO_CAL_CONFIG_PD_OFFSET_SHIFT) |
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TEGRA_SDMMC_AUTO_CAL_CONFIG_ENABLE;
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writel(val, regs + TEGRA_SDMMC_AUTO_CAL_CONFIG);
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}
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/* setup signaling */
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writel(0xffffffff, regs + TEGRA_SDMMC_INT_STAT_EN);
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writel(0xffffffff, regs + TEGRA_SDMMC_INT_SIG_EN);
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