arm: mach-imx: add MMDC and CCM register defines for use in DCD
Makes .imxcfg files a lot more readable. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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/*
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* Copyright (C) Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#define MX6_CCM_CCOSR 0x020c4060
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#define MX6_CCM_CCGR0 0x020C4068
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#define MX6_CCM_CCGR1 0x020C406c
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#define MX6_CCM_CCGR2 0x020C4070
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#define MX6_CCM_CCGR3 0x020C4074
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#define MX6_CCM_CCGR4 0x020C4078
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#define MX6_CCM_CCGR5 0x020C407c
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#define MX6_CCM_CCGR6 0x020C4080
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#define MX6_PMU_MISC2 0x020C8170
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/*
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* Copyright (C) 2013 Boundary Devices Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#define MX6_MMDC_P0_MDCTL 0x021b0000
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#define MX6_MMDC_P0_MDPDC 0x021b0004
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#define MX6_MMDC_P0_MDOTC 0x021b0008
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#define MX6_MMDC_P0_MDCFG0 0x021b000c
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#define MX6_MMDC_P0_MDCFG1 0x021b0010
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#define MX6_MMDC_P0_MDCFG2 0x021b0014
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#define MX6_MMDC_P0_MDMISC 0x021b0018
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#define MX6_MMDC_P0_MDSCR 0x021b001c
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#define MX6_MMDC_P0_MDREF 0x021b0020
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#define MX6_MMDC_P0_MDRWD 0x021b002c
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#define MX6_MMDC_P0_MDOR 0x021b0030
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#define MX6_MMDC_P0_MDASP 0x021b0040
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#define MX6_MMDC_P0_MAPSR 0x021b0404
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#define MX6_MMDC_P0_MPZQHWCTRL 0x021b0800
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#define MX6_MMDC_P0_MPWLDECTRL0 0x021b080c
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#define MX6_MMDC_P0_MPWLDECTRL1 0x021b0810
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#define MX6_MMDC_P0_MPODTCTRL 0x021b0818
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#define MX6_MMDC_P0_MPRDDQBY0DL 0x021b081c
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#define MX6_MMDC_P0_MPRDDQBY1DL 0x021b0820
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#define MX6_MMDC_P0_MPRDDQBY2DL 0x021b0824
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#define MX6_MMDC_P0_MPRDDQBY3DL 0x021b0828
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#define MX6_MMDC_P0_MPDGCTRL0 0x021b083c
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#define MX6_MMDC_P0_MPDGCTRL1 0x021b0840
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#define MX6_MMDC_P0_MPRDDLCTL 0x021b0848
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#define MX6_MMDC_P0_MPWRDLCTL 0x021b0850
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#define MX6_MMDC_P0_MPMUR0 0x021b08b8
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#define MX6_MMDC_P1_MDCTL 0x021b4000
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#define MX6_MMDC_P1_MDPDC 0x021b4004
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#define MX6_MMDC_P1_MDOTC 0x021b4008
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#define MX6_MMDC_P1_MDCFG0 0x021b400c
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#define MX6_MMDC_P1_MDCFG1 0x021b4010
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#define MX6_MMDC_P1_MDCFG2 0x021b4014
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#define MX6_MMDC_P1_MDMISC 0x021b4018
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#define MX6_MMDC_P1_MDSCR 0x021b401c
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#define MX6_MMDC_P1_MDREF 0x021b4020
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#define MX6_MMDC_P1_MDRWD 0x021b402c
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#define MX6_MMDC_P1_MDOR 0x021b4030
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#define MX6_MMDC_P1_MDASP 0x021b4040
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#define MX6_MMDC_P1_MAPSR 0x021b4404
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#define MX6_MMDC_P1_MPZQHWCTRL 0x021b4800
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#define MX6_MMDC_P1_MPWLDECTRL0 0x021b480c
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#define MX6_MMDC_P1_MPWLDECTRL1 0x021b4810
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#define MX6_MMDC_P1_MPODTCTRL 0x021b4818
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#define MX6_MMDC_P1_MPRDDQBY0DL 0x021b481c
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#define MX6_MMDC_P1_MPRDDQBY1DL 0x021b4820
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#define MX6_MMDC_P1_MPRDDQBY2DL 0x021b4824
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#define MX6_MMDC_P1_MPRDDQBY3DL 0x021b4828
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#define MX6_MMDC_P1_MPDGCTRL0 0x021b483c
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#define MX6_MMDC_P1_MPDGCTRL1 0x021b4840
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#define MX6_MMDC_P1_MPRDDLCTL 0x021b4848
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#define MX6_MMDC_P1_MPWRDLCTL 0x021b4850
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#define MX6_MMDC_P1_MPMUR0 0x021b48b8
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/*
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* Copyright (C) 2013 Boundary Devices Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#define MX6_IOM_DRAM_DQM0 0x020e0470
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#define MX6_IOM_DRAM_DQM1 0x020e0474
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#define MX6_IOM_DRAM_DQM2 0x020e0478
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#define MX6_IOM_DRAM_DQM3 0x020e047c
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#define MX6_IOM_DRAM_DQM4 0x020e0480
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#define MX6_IOM_DRAM_DQM5 0x020e0484
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#define MX6_IOM_DRAM_DQM6 0x020e0488
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#define MX6_IOM_DRAM_DQM7 0x020e048c
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#define MX6_IOM_DRAM_CAS 0x020e0464
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#define MX6_IOM_DRAM_RAS 0x020e0490
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#define MX6_IOM_DRAM_RESET 0x020e0494
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#define MX6_IOM_DRAM_SDCLK_0 0x020e04ac
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#define MX6_IOM_DRAM_SDCLK_1 0x020e04b0
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#define MX6_IOM_DRAM_SDBA2 0x020e04a0
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#define MX6_IOM_DRAM_SDCKE0 0x020e04a4
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#define MX6_IOM_DRAM_SDCKE1 0x020e04a8
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#define MX6_IOM_DRAM_SDODT0 0x020e04b4
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#define MX6_IOM_DRAM_SDODT1 0x020e04b8
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#define MX6_IOM_DRAM_SDQS0 0x020e04bc
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#define MX6_IOM_DRAM_SDQS1 0x020e04c0
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#define MX6_IOM_DRAM_SDQS2 0x020e04c4
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#define MX6_IOM_DRAM_SDQS3 0x020e04c8
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#define MX6_IOM_DRAM_SDQS4 0x020e04cc
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#define MX6_IOM_DRAM_SDQS5 0x020e04d0
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#define MX6_IOM_DRAM_SDQS6 0x020e04d4
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#define MX6_IOM_DRAM_SDQS7 0x020e04d8
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#define MX6_IOM_GRP_B0DS 0x020e0764
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#define MX6_IOM_GRP_B1DS 0x020e0770
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#define MX6_IOM_GRP_B2DS 0x020e0778
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#define MX6_IOM_GRP_B3DS 0x020e077c
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#define MX6_IOM_GRP_B4DS 0x020e0780
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#define MX6_IOM_GRP_B5DS 0x020e0784
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#define MX6_IOM_GRP_B6DS 0x020e078c
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#define MX6_IOM_GRP_B7DS 0x020e0748
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#define MX6_IOM_GRP_ADDDS 0x020e074c
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#define MX6_IOM_DDRMODE_CTL 0x020e0750
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#define MX6_IOM_GRP_DDRPKE 0x020e0754
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#define MX6_IOM_GRP_DDRMODE 0x020e0760
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#define MX6_IOM_GRP_CTLDS 0x020e076c
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#define MX6_IOM_GRP_DDR_TYPE 0x020e0774
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/*
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* Copyright (C) 2013 Boundary Devices Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#define MX6_IOM_DRAM_DQM0 0x020e05ac
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#define MX6_IOM_DRAM_DQM1 0x020e05b4
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#define MX6_IOM_DRAM_DQM2 0x020e0528
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#define MX6_IOM_DRAM_DQM3 0x020e0520
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#define MX6_IOM_DRAM_DQM4 0x020e0514
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#define MX6_IOM_DRAM_DQM5 0x020e0510
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#define MX6_IOM_DRAM_DQM6 0x020e05bc
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#define MX6_IOM_DRAM_DQM7 0x020e05c4
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#define MX6_IOM_DRAM_CAS 0x020e056c
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#define MX6_IOM_DRAM_RAS 0x020e0578
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#define MX6_IOM_DRAM_RESET 0x020e057c
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#define MX6_IOM_DRAM_SDCLK_0 0x020e0588
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#define MX6_IOM_DRAM_SDCLK_1 0x020e0594
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#define MX6_IOM_DRAM_SDBA2 0x020e058c
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#define MX6_IOM_DRAM_SDCKE0 0x020e0590
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#define MX6_IOM_DRAM_SDCKE1 0x020e0598
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#define MX6_IOM_DRAM_SDODT0 0x020e059c
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#define MX6_IOM_DRAM_SDODT1 0x020e05a0
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#define MX6_IOM_DRAM_SDQS0 0x020e05a8
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#define MX6_IOM_DRAM_SDQS1 0x020e05b0
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#define MX6_IOM_DRAM_SDQS2 0x020e0524
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#define MX6_IOM_DRAM_SDQS3 0x020e051c
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#define MX6_IOM_DRAM_SDQS4 0x020e0518
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#define MX6_IOM_DRAM_SDQS5 0x020e050c
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#define MX6_IOM_DRAM_SDQS6 0x020e05b8
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#define MX6_IOM_DRAM_SDQS7 0x020e05c0
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#define MX6_IOM_GRP_B0DS 0x020e0784
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#define MX6_IOM_GRP_B1DS 0x020e0788
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#define MX6_IOM_GRP_B2DS 0x020e0794
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#define MX6_IOM_GRP_B3DS 0x020e079c
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#define MX6_IOM_GRP_B4DS 0x020e07a0
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#define MX6_IOM_GRP_B5DS 0x020e07a4
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#define MX6_IOM_GRP_B6DS 0x020e07a8
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#define MX6_IOM_GRP_B7DS 0x020e0748
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#define MX6_IOM_GRP_ADDDS 0x020e074c
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#define MX6_IOM_DDRMODE_CTL 0x020e0750
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#define MX6_IOM_GRP_DDRPKE 0x020e0758
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#define MX6_IOM_GRP_DDRMODE 0x020e0774
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#define MX6_IOM_GRP_CTLDS 0x020e078c
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#define MX6_IOM_GRP_DDR_TYPE 0x020e0798
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