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Merge branch 'work/iomux-v3' into next 

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sascha Hauer 2012-04-13 10:47:27 +02:00
parent ed921b0401 b346a85b94
commit d66d79eefb
16 changed files with 888 additions and 405 deletions
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2
arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
View File

@ -164,7 +164,7 @@ static int eukrea_cpuimx25_mem_init(void)
}
mem_initcall(eukrea_cpuimx25_mem_init);
static struct pad_desc eukrea_cpuimx25_pads[] = {
static iomux_v3_cfg_t eukrea_cpuimx25_pads[] = {
MX25_PAD_FEC_MDC__FEC_MDC,
MX25_PAD_FEC_MDIO__FEC_MDIO,
MX25_PAD_FEC_RDATA0__FEC_RDATA0,

2
arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
View File

@ -179,7 +179,7 @@ static int eukrea_cpuimx35_devices_init(void)
device_initcall(eukrea_cpuimx35_devices_init);
static struct pad_desc eukrea_cpuimx35_pads[] = {
static iomux_v3_cfg_t eukrea_cpuimx35_pads[] = {
MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
MX35_PAD_FEC_RX_DV__FEC_RX_DV,

2
arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c
View File

@ -52,7 +52,7 @@ struct imx_nand_platform_data nand_info = {
.flash_bbt = 1,
};
static struct pad_desc eukrea_cpuimx51_pads[] = {
static iomux_v3_cfg_t eukrea_cpuimx51_pads[] = {
/* FEC */
MX51_PAD_DISP2_DAT1__FEC_RX_ER,
MX51_PAD_DISP2_DAT15__FEC_TDATA0,

2
arch/arm/boards/freescale-mx25-3-stack/3stack.c
View File

@ -243,7 +243,7 @@ static int imx25_devices_init(void)
device_initcall(imx25_devices_init);
static struct pad_desc imx25_pads[] = {
static iomux_v3_cfg_t imx25_pads[] = {
MX25_PAD_FEC_MDC__FEC_MDC,
MX25_PAD_FEC_MDIO__FEC_MDIO,
MX25_PAD_FEC_RDATA0__FEC_RDATA0,

2
arch/arm/boards/freescale-mx35-3-stack/3stack.c
View File

@ -206,7 +206,7 @@ static int f3s_enable_display(void)
late_initcall(f3s_enable_display);
static struct pad_desc f3s_pads[] = {
static iomux_v3_cfg_t f3s_pads[] = {
MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
MX35_PAD_FEC_RX_DV__FEC_RX_DV,

16
arch/arm/boards/freescale-mx51-pdk/board.c
View File

@ -47,7 +47,7 @@ static struct fec_platform_data fec_info = {
.xcv_type = MII100,
};
static struct pad_desc f3s_pads[] = {
static iomux_v3_cfg_t f3s_pads[] = {
MX51_PAD_EIM_EB2__FEC_MDIO,
MX51_PAD_EIM_EB3__FEC_RDATA1,
MX51_PAD_EIM_CS2__FEC_RDATA2,
@ -56,7 +56,7 @@ static struct pad_desc f3s_pads[] = {
MX51_PAD_EIM_CS5__FEC_CRS,
MX51_PAD_NANDF_RB2__FEC_COL,
MX51_PAD_NANDF_RB3__FEC_RX_CLK,
MX51_PAD_NANDF_RB7__FEC_TX_ER,
MX51_PAD_NANDF_CS2__FEC_TX_ER,
MX51_PAD_NANDF_CS3__FEC_MDC,
MX51_PAD_NANDF_CS4__FEC_TDATA1,
MX51_PAD_NANDF_CS5__FEC_TDATA2,
@ -64,13 +64,13 @@ static struct pad_desc f3s_pads[] = {
MX51_PAD_NANDF_CS7__FEC_TX_EN,
MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK,
MX51_PAD_NANDF_D11__FEC_RX_DV,
MX51_PAD_NANDF_RB6__FEC_RDATA0,
MX51_PAD_NANDF_D9__FEC_RDATA0,
MX51_PAD_NANDF_D8__FEC_TDATA0,
MX51_PAD_CSPI1_SS0__CSPI1_SS0,
MX51_PAD_CSPI1_MOSI__CSPI1_MOSI,
MX51_PAD_CSPI1_MISO__CSPI1_MISO,
MX51_PAD_CSPI1_RDY__CSPI1_RDY,
MX51_PAD_CSPI1_SCLK__CSPI1_SCLK,
MX51_PAD_CSPI1_SS0__GPIO4_24,
MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,
MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
MX51_PAD_CSPI1_RDY__ECSPI1_RDY,
MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
MX51_PAD_EIM_A20__GPIO2_14, /* LAN8700 reset pin */
IOMUX_PAD(0x60C, 0x21C, 3, 0x0, 0, 0x85), /* FIXME: needed? */
/* SD 1 */

2
arch/arm/boards/freescale-mx53-loco/board.c
View File

@ -47,7 +47,7 @@ static struct fec_platform_data fec_info = {
.xcv_type = RMII,
};
static struct pad_desc loco_pads[] = {
static iomux_v3_cfg_t loco_pads[] = {
/* UART1 */
MX53_PAD_CSI0_DAT10__UART1_TXD_MUX,
MX53_PAD_CSI0_DAT11__UART1_RXD_MUX,

2
arch/arm/boards/freescale-mx53-smd/board.c
View File

@ -44,7 +44,7 @@ static struct fec_platform_data fec_info = {
.xcv_type = RMII,
};
static struct pad_desc smd_pads[] = {
static iomux_v3_cfg_t smd_pads[] = {
/* UART1 */
MX53_PAD_CSI0_DAT10__UART1_TXD_MUX,
MX53_PAD_CSI0_DAT11__UART1_RXD_MUX,

2
arch/arm/boards/guf-cupid/board.c
View File

@ -146,7 +146,7 @@ static int cupid_devices_init(void)
device_initcall(cupid_devices_init);
static struct pad_desc cupid_pads[] = {
static iomux_v3_cfg_t cupid_pads[] = {
/* UART1 */
MX35_PAD_CTS1__UART1_CTS,
MX35_PAD_RTS1__UART1_RTS,

6
arch/arm/boards/karo-tx25/board.c
View File

@ -64,7 +64,7 @@ static int tx25_mem_init(void)
}
mem_initcall(tx25_mem_init);
static struct pad_desc karo_tx25_padsd_fec[] = {
static iomux_v3_cfg_t karo_tx25_padsd_fec[] = {
MX25_PAD_D11__GPIO_4_9, /* FEC PHY power on pin */
MX25_PAD_D13__GPIO_4_7, /* FEC reset */
MX25_PAD_FEC_MDC__FEC_MDC,
@ -131,7 +131,7 @@ static int tx25_devices_init(void)
device_initcall(tx25_devices_init);
static struct pad_desc tx25_pads[] = {
static iomux_v3_cfg_t tx25_pads[] = {
MX25_PAD_D12__GPIO_4_8,
MX25_PAD_D10__GPIO_4_10,
MX25_PAD_NF_CE0__NF_CE0,
@ -172,7 +172,7 @@ void __bare_init nand_boot(void)
}
#endif
static struct pad_desc tx25_lcdc_gpios[] = {
static iomux_v3_cfg_t tx25_lcdc_gpios[] = {
MX25_PAD_A18__GPIO_2_4, /* LCD Reset (active LOW) */
MX25_PAD_PWM__GPIO_1_26, /* LCD Backlight brightness 0: full 1: off */
MX25_PAD_A19__GPIO_2_5, /* LCD Power Enable 0: off 1: on */

2
arch/arm/boards/pcm043/pcm043.c
View File

@ -178,7 +178,7 @@ static int imx35_devices_init(void)
device_initcall(imx35_devices_init);
static struct pad_desc pcm043_pads[] = {
static iomux_v3_cfg_t pcm043_pads[] = {
MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
MX35_PAD_FEC_RX_DV__FEC_RX_DV,

2
arch/arm/boards/tqma53/board.c
View File

@ -43,7 +43,7 @@ static struct fec_platform_data fec_info = {
.xcv_type = RMII,
};
static struct pad_desc tqma53_pads[] = {
static iomux_v3_cfg_t tqma53_pads[] = {
MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD,
MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC,
MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD,

1127
arch/arm/mach-imx/include/mach/iomux-mx51.h
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File diff suppressed because it is too large Load Diff

8
arch/arm/mach-imx/include/mach/iomux-mx53.h
View File

@ -30,9 +30,7 @@
#define MX53_SDHC_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_HIGH | \
PAD_CTL_SRE_FAST)
#define MX53_I2C_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_22K_UP | PAD_CTL_DSE_HIGH | \
PAD_CTL_SRE_FAST)
#define MX53_PAD_GPIO_19__KPP_COL_5 IOMUX_PAD(0x348, 0x020, 0, 0x840, 0, NO_PAD_CTRL)
#define MX53_PAD_GPIO_19__GPIO4_5 IOMUX_PAD(0x348, 0x020, 1, __NA_, 0, NO_PAD_CTRL)
@ -379,7 +377,7 @@
#define MX53_PAD_CSI0_DAT8__KPP_COL_7 IOMUX_PAD(0x40C, 0x0E0, 2, 0x848, 0, NO_PAD_CTRL)
#define MX53_PAD_CSI0_DAT8__ECSPI2_SCLK IOMUX_PAD(0x40C, 0x0E0, 3, 0x7B8, 1, NO_PAD_CTRL)
#define MX53_PAD_CSI0_DAT8__USBOH3_USBH3_OC IOMUX_PAD(0x40C, 0x0E0, 4, __NA_, 0, NO_PAD_CTRL)
#define MX53_PAD_CSI0_DAT8__I2C1_SDA IOMUX_PAD(0x40C, 0x0E0, 5 | IOMUX_CONFIG_SION, 0x818, 0, MX53_I2C_PAD_CTRL)
#define MX53_PAD_CSI0_DAT8__I2C1_SDA IOMUX_PAD(0x40C, 0x0E0, 5 | IOMUX_CONFIG_SION, 0x818, 0, NO_PAD_CTRL)
#define MX53_PAD_CSI0_DAT8__EMI_EMI_DEBUG_37 IOMUX_PAD(0x40C, 0x0E0, 6, __NA_, 0, NO_PAD_CTRL)
#define MX53_PAD_CSI0_DAT8__TPIU_TRACE_5 IOMUX_PAD(0x40C, 0x0E0, 7, __NA_, 0, NO_PAD_CTRL)
#define MX53_PAD_CSI0_DAT9__IPU_CSI0_D_9 IOMUX_PAD(0x410, 0x0E4, 0, __NA_, 0, NO_PAD_CTRL)
@ -387,7 +385,7 @@
#define MX53_PAD_CSI0_DAT9__KPP_ROW_7 IOMUX_PAD(0x410, 0x0E4, 2, 0x854, 0, NO_PAD_CTRL)
#define MX53_PAD_CSI0_DAT9__ECSPI2_MOSI IOMUX_PAD(0x410, 0x0E4, 3, 0x7C0, 1, NO_PAD_CTRL)
#define MX53_PAD_CSI0_DAT9__USBOH3_USBH3_PWR IOMUX_PAD(0x410, 0x0E4, 4, __NA_, 0, NO_PAD_CTRL)
#define MX53_PAD_CSI0_DAT9__I2C1_SCL IOMUX_PAD(0x410, 0x0E4, 5 | IOMUX_CONFIG_SION, 0x814, 0, MX53_I2C_PAD_CTRL)
#define MX53_PAD_CSI0_DAT9__I2C1_SCL IOMUX_PAD(0x410, 0x0E4, 5 | IOMUX_CONFIG_SION, 0x814, 0, NO_PAD_CTRL)
#define MX53_PAD_CSI0_DAT9__EMI_EMI_DEBUG_38 IOMUX_PAD(0x410, 0x0E4, 6, __NA_, 0, NO_PAD_CTRL)
#define MX53_PAD_CSI0_DAT9__TPIU_TRACE_6 IOMUX_PAD(0x410, 0x0E4, 7, __NA_, 0, NO_PAD_CTRL)
#define MX53_PAD_CSI0_DAT10__IPU_CSI0_D_10 IOMUX_PAD(0x414, 0x0E8, 0, __NA_, 0, NO_PAD_CTRL)

76
arch/arm/mach-imx/include/mach/iomux-v3.h
View File

@ -42,41 +42,59 @@
* If <padname> or <padmode> refers to a GPIO, it is named
* GPIO_<unit>_<num>
*
*/
* IOMUX/PAD Bit field definitions
*
* MUX_CTRL_OFS: 0..11 (12)
* PAD_CTRL_OFS: 12..23 (12)
* SEL_INPUT_OFS: 24..35 (12)
* MUX_MODE + SION: 36..40 (5)
* PAD_CTRL + NO_PAD_CTRL: 41..58 (18)
* SEL_INP: 59..62 (4)
* reserved: 63 (1)
*/
struct pad_desc {
unsigned mux_ctrl_ofs:12; /* IOMUXC_SW_MUX_CTL_PAD offset */
unsigned mux_mode:8;
unsigned pad_ctrl_ofs:12; /* IOMUXC_SW_PAD_CTRL offset */
#define NO_PAD_CTRL (1 << 16)
unsigned pad_ctrl:17;
unsigned select_input_ofs:12; /* IOMUXC_SELECT_INPUT offset */
unsigned select_input:3;
};
typedef u64 iomux_v3_cfg_t;
#define IOMUX_PAD(_pad_ctrl_ofs, _mux_ctrl_ofs, _mux_mode, _select_input_ofs, \
_select_input, _pad_ctrl) \
{ \
.mux_ctrl_ofs = _mux_ctrl_ofs, \
.mux_mode = _mux_mode, \
.pad_ctrl_ofs = _pad_ctrl_ofs, \
.pad_ctrl = _pad_ctrl, \
.select_input_ofs = _select_input_ofs, \
.select_input = _select_input, \
}
#define MUX_CTRL_OFS_SHIFT 0
#define MUX_CTRL_OFS_MASK ((iomux_v3_cfg_t)0xfff << MUX_CTRL_OFS_SHIFT)
#define MUX_PAD_CTRL_OFS_SHIFT 12
#define MUX_PAD_CTRL_OFS_MASK ((iomux_v3_cfg_t)0xfff << MUX_PAD_CTRL_OFS_SHIFT)
#define MUX_SEL_INPUT_OFS_SHIFT 24
#define MUX_SEL_INPUT_OFS_MASK ((iomux_v3_cfg_t)0xfff << MUX_SEL_INPUT_OFS_SHIFT)
#define MUX_MODE_SHIFT 36
#define MUX_MODE_MASK ((iomux_v3_cfg_t)0x1f << MUX_MODE_SHIFT)
#define MUX_PAD_CTRL_SHIFT 41
#define MUX_PAD_CTRL_MASK ((iomux_v3_cfg_t)0x3ffff << MUX_PAD_CTRL_SHIFT)
#define MUX_SEL_INPUT_SHIFT 59
#define MUX_SEL_INPUT_MASK ((iomux_v3_cfg_t)0xf << MUX_SEL_INPUT_SHIFT)
#define MUX_PAD_CTRL(x) ((iomux_v3_cfg_t)(x) << MUX_PAD_CTRL_SHIFT)
#define IOMUX_PAD(_pad_ctrl_ofs, _mux_ctrl_ofs, _mux_mode, _sel_input_ofs, \
_sel_input, _pad_ctrl) \
(((iomux_v3_cfg_t)(_mux_ctrl_ofs) << MUX_CTRL_OFS_SHIFT) | \
((iomux_v3_cfg_t)(_mux_mode) << MUX_MODE_SHIFT) | \
((iomux_v3_cfg_t)(_pad_ctrl_ofs) << MUX_PAD_CTRL_OFS_SHIFT) | \
((iomux_v3_cfg_t)(_pad_ctrl) << MUX_PAD_CTRL_SHIFT) | \
((iomux_v3_cfg_t)(_sel_input_ofs) << MUX_SEL_INPUT_OFS_SHIFT) | \
((iomux_v3_cfg_t)(_sel_input) << MUX_SEL_INPUT_SHIFT))
#define NEW_PAD_CTRL(cfg, pad) (((cfg) & ~MUX_PAD_CTRL_MASK) | MUX_PAD_CTRL(pad))
/*
* Use to set PAD control
*/
#define NO_PAD_CTRL (1 << 17)
#define PAD_CTL_DVS (1 << 13)
#define PAD_CTL_HYS (1 << 8)
#define PAD_CTL_PKE (1 << 7)
#define PAD_CTL_PUE (1 << 6)
#define PAD_CTL_PUS_100K_DOWN (0 << 4)
#define PAD_CTL_PUS_47K_UP (1 << 4)
#define PAD_CTL_PUS_100K_UP (2 << 4)
#define PAD_CTL_PUS_22K_UP (3 << 4)
#define PAD_CTL_PUE (1 << 6 | PAD_CTL_PKE)
#define PAD_CTL_PUS_100K_DOWN (0 << 4 | PAD_CTL_PUE)
#define PAD_CTL_PUS_47K_UP (1 << 4 | PAD_CTL_PUE)
#define PAD_CTL_PUS_100K_UP (2 << 4 | PAD_CTL_PUE)
#define PAD_CTL_PUS_22K_UP (3 << 4 | PAD_CTL_PUE)
#define PAD_CTL_ODE (1 << 3)
@ -91,16 +109,14 @@ struct pad_desc {
#define IOMUX_CONFIG_SION (0x1 << 4)
/*
* setups a single pad:
* - reserves the pad so that it is not claimed by another driver
* - setups the iomux according to the configuration
* setups a single pad in the iomuxer
*/
int mxc_iomux_v3_setup_pad(struct pad_desc *pad);
int mxc_iomux_v3_setup_pad(iomux_v3_cfg_t pad);
/*
* setups mutliple pads
* convenient way to call the above function with tables
*/
int mxc_iomux_v3_setup_multiple_pads(struct pad_desc *pad_list, unsigned count);
int mxc_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t *pad_list, unsigned count);
#endif /* __MACH_IOMUX_V3_H__*/

40
arch/arm/mach-imx/iomux-v3.c
View File

@ -23,36 +23,46 @@
#include <mach/iomux-v3.h>
#include <mach/imx-regs.h>
static void __iomem *base = (void *)IMX_IOMUXC_BASE;
/*
* setups a single pin:
* - reserves the pin so that it is not claimed by another driver
* - setups the iomux according to the configuration
* configures a single pad in the iomuxer
*/
int mxc_iomux_v3_setup_pad(struct pad_desc *pad)
int mxc_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
{
if (pad->mux_ctrl_ofs)
writel(pad->mux_mode, IMX_IOMUXC_BASE + pad->mux_ctrl_ofs);
u32 mux_ctrl_ofs = (pad & MUX_CTRL_OFS_MASK) >> MUX_CTRL_OFS_SHIFT;
u32 mux_mode = (pad & MUX_MODE_MASK) >> MUX_MODE_SHIFT;
u32 sel_input_ofs = (pad & MUX_SEL_INPUT_OFS_MASK) >> MUX_SEL_INPUT_OFS_SHIFT;
u32 sel_input = (pad & MUX_SEL_INPUT_MASK) >> MUX_SEL_INPUT_SHIFT;
u32 pad_ctrl_ofs = (pad & MUX_PAD_CTRL_OFS_MASK) >> MUX_PAD_CTRL_OFS_SHIFT;
u32 pad_ctrl = (pad & MUX_PAD_CTRL_MASK) >> MUX_PAD_CTRL_SHIFT;
if (pad->select_input_ofs)
writel(pad->select_input,
IMX_IOMUXC_BASE + pad->select_input_ofs);
if (mux_ctrl_ofs)
__raw_writel(mux_mode, base + mux_ctrl_ofs);
if (sel_input_ofs)
__raw_writel(sel_input, base + sel_input_ofs);
if (!(pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs)
__raw_writel(pad_ctrl, base + pad_ctrl_ofs);
if (!(pad->pad_ctrl & NO_PAD_CTRL))
writel(pad->pad_ctrl, IMX_IOMUXC_BASE + pad->pad_ctrl_ofs);
return 0;
}
EXPORT_SYMBOL(mxc_iomux_v3_setup_pad);
int mxc_iomux_v3_setup_multiple_pads(struct pad_desc *pad_list, unsigned count)
int mxc_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t *pad_list, unsigned count)
{
struct pad_desc *p = pad_list;
iomux_v3_cfg_t *p = pad_list;
int i;
int ret;
for (i = 0; i < count; i++) {
mxc_iomux_v3_setup_pad(p);
ret = mxc_iomux_v3_setup_pad(*p);
if (ret)
return ret;
p++;
}
return 0;
}
EXPORT_SYMBOL(mxc_iomux_v3_setup_multiple_pads);