NAND: Add updated NAND support from Kernel
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sascha Hauer
parent
a131b1abc3
commit
d9af366450
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@ -33,45 +33,43 @@
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static ssize_t nand_read(struct device_d *dev, void* buf, size_t count, ulong offset, ulong flags)
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{
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struct nand_chip *nand = dev->priv;
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struct mtd_info *info = dev->priv;
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size_t retlen;
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int ret;
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printf("nand_read: 0x%08x 0x%08x\n", offset, count);
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debug("nand_read: 0x%08x 0x%08x\n", offset, count);
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ret = nand->read(nand, offset, count, &retlen, buf);
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ret = info->read(info, offset, count, &retlen, buf);
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if(ret)
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return ret;
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return retlen;
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}
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#define NOTALIGNED(x) (x & (nand->oobblock-1)) != 0
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#define NOTALIGNED(x) (x & (info->writesize - 1)) != 0
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static ssize_t nand_write(struct device_d* dev, const void* buf, size_t _count, ulong offset, ulong flags)
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{
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struct nand_chip *nand = dev->priv;
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struct mtd_info *info = dev->priv;
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size_t retlen, now;
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int ret;
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void *wrbuf = NULL;
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size_t count = _count;
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printf("write: 0x%08x 0x%08x\n", offset, count);
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debug("write: 0x%08x 0x%08x\n", offset, count);
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while (count) {
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now = count > nand->oobblock ? nand->oobblock : count;
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now = count > info->writesize ? info->writesize : count;
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if (NOTALIGNED(now) || NOTALIGNED(offset)) {
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printf("not aligned: %d %d\n", nand->oobblock, (offset % nand->oobblock));
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wrbuf = xmalloc(nand->oobblock);
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memset(wrbuf, 0xff, nand->oobblock);
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memcpy(wrbuf + (offset % nand->oobblock), buf, now);
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ret = nand->write_ecc(nand, offset & ~(nand->oobblock - 1), nand->oobblock, &retlen, wrbuf,
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NULL, &nand->oobinfo);
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debug("not aligned: %d %d\n", info->writesize, (offset % info->writesize));
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wrbuf = xmalloc(info->writesize);
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memset(wrbuf, 0xff, info->writesize);
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memcpy(wrbuf + (offset % info->writesize), buf, now);
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ret = info->write(info, offset & ~(info->writesize - 1), info->writesize, &retlen, wrbuf);
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} else {
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ret = nand->write_ecc(nand, offset, now, &retlen, buf,
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NULL, &nand->oobinfo);
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printf("huhu offset: 0x%08x now: 0x%08x retlen: 0x%08x\n", offset, now, retlen);
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ret = info->write(info, offset, now, &retlen, buf);
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debug("offset: 0x%08x now: 0x%08x retlen: 0x%08x\n", offset, now, retlen);
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}
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if (ret)
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goto out;
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@ -90,22 +88,22 @@ out:
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static int nand_ioctl(struct device_d *dev, int request, void *buf)
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{
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struct nand_chip *nand = dev->priv;
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struct mtd_info_user *info = buf;
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struct mtd_info *info = dev->priv;
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struct mtd_info_user *user = buf;
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switch (request) {
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case MEMGETBADBLOCK:
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printf("MEMGETBADBLOCK: 0x%08x\n", (off_t)buf);
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return nand->block_isbad(nand, (off_t)buf);
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debug("MEMGETBADBLOCK: 0x%08x\n", (off_t)buf);
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return info->block_isbad(info, (off_t)buf);
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case MEMGETINFO:
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info->type = nand->type;
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info->flags = nand->flags;
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info->size = nand->size;
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info->erasesize = nand->erasesize;
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info->oobsize = nand->oobsize;
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user->type = info->type;
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user->flags = info->flags;
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user->size = info->size;
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user->erasesize = info->erasesize;
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user->oobsize = info->oobsize;
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/* The below fields are obsolete */
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info->ecctype = -1;
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info->eccsize = 0;
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user->ecctype = -1;
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user->eccsize = 0;
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return 0;
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}
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@ -114,74 +112,34 @@ static int nand_ioctl(struct device_d *dev, int request, void *buf)
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static ssize_t nand_erase(struct device_d *dev, size_t count, unsigned long offset)
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{
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struct nand_chip *nand = dev->priv;
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struct mtd_info *info = dev->priv;
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struct erase_info erase;
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int ret;
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memset(&erase, 0, sizeof(erase));
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erase.nand = nand;
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erase.mtd = info;
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erase.addr = offset;
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erase.len = nand->erasesize;
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erase.len = info->erasesize;
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while (count > 0) {
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debug("erase %d %d\n", erase.addr, erase.len);
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ret = nand->block_isbad(nand, erase.addr);
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ret = info->block_isbad(info, erase.addr);
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if (ret > 0) {
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printf("Skipping bad block at 0x%08x\n", erase.addr);
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} else {
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ret = nand->erase(nand, &erase);
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ret = info->erase(info, &erase);
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if (ret)
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return ret;
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}
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erase.addr += nand->erasesize;
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count -= count > nand->erasesize ? nand->erasesize : count;
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erase.addr += info->erasesize;
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count -= count > info->erasesize ? info->erasesize : count;
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}
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return 0;
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}
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static int nand_controller_probe(struct device_d *dev)
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{
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struct nand_chip *nand;
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struct nand_platform_data *pdata = dev->platform_data;
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int ret;
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nand = xzalloc(sizeof(*nand));
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dev->priv = nand;
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nand->IO_ADDR_R = nand->IO_ADDR_W = (void *)dev->map_base;
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nand->hwcontrol = pdata->hwcontrol;
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nand->eccmode = pdata->eccmode;
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nand->dev_ready = pdata->dev_ready;
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nand->chip_delay = pdata->chip_delay;
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ret = nand_scan(nand, 1);
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if (ret)
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goto out;
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strcpy(nand->dev.name, "nand_device");
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get_free_deviceid(nand->dev.id, "nand");
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nand->dev.size = nand->chipsize;
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nand->dev.priv = nand;
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ret = register_device(&nand->dev);
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if (ret)
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goto out;
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return 0;
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out:
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free(nand);
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return ret;
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}
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static struct driver_d nand_controller_driver = {
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.name = "nand_controller",
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.probe = nand_controller_probe,
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};
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static int nand_device_probe(struct device_d *dev)
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{
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return 0;
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@ -197,16 +155,48 @@ static struct driver_d nand_device_driver = {
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.close = dev_close_default,
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.lseek = dev_lseek_default,
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.erase = nand_erase,
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// .info = nand_info,
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.type = DEVICE_TYPE_NAND,
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};
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static int nand_init(void)
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{
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register_driver(&nand_device_driver);
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register_driver(&nand_controller_driver);
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return 0;
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}
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device_initcall(nand_init);
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int add_mtd_device(struct mtd_info *mtd) {
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struct device_d *dev;
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int ret;
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dev = xzalloc(sizeof(*dev));
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strcpy(dev->name, "nand_device");
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get_free_deviceid(dev->id, "nand");
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dev->size = mtd->size;
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dev->type = DEVICE_TYPE_NAND;
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dev->priv = mtd;
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mtd->dev = dev;
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ret = register_device(dev);
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if (ret)
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goto out;
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return 0;
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out:
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free(dev);
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return ret;
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}
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int del_mtd_device (struct mtd_info *mtd)
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{
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unregister_device(mtd->dev);
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free(mtd->dev);
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return 0;
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}
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
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@ -7,7 +7,9 @@
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* Copyright (C) 2000-2004 Steven J. Hill (sjhill@realitydiluted.com)
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* Toshiba America Electronics Components, Inc.
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*
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* $Id: nand_ecc.c,v 1.14 2004/06/16 15:34:37 gleixner Exp $
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* Copyright (C) 2006 Thomas Gleixner <tglx@linutronix.de>
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*
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* $Id: nand_ecc.c,v 1.15 2005/11/07 11:14:30 gleixner Exp $
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*
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* This file is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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@ -35,8 +37,10 @@
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* this file might be covered by the GNU General Public License.
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*/
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#include <linux/types.h>
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#include <common.h>
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#include<linux/mtd/mtd.h>
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#include <errno.h>
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#include <linux/mtd/nand_ecc.h>
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/*
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* Pre-calculated 256-way 1 byte column parity
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@ -60,90 +64,75 @@ static const u_char nand_ecc_precalc_table[] = {
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0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
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};
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/**
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* nand_trans_result - [GENERIC] create non-inverted ECC
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* @reg2: line parity reg 2
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* @reg3: line parity reg 3
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* @ecc_code: ecc
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*
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* Creates non-inverted ECC code from line parity
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*/
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static void nand_trans_result(u_char reg2, u_char reg3,
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u_char *ecc_code)
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{
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u_char a, b, i, tmp1, tmp2;
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/* Initialize variables */
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a = b = 0x80;
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tmp1 = tmp2 = 0;
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/* Calculate first ECC byte */
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for (i = 0; i < 4; i++) {
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if (reg3 & a) /* LP15,13,11,9 --> ecc_code[0] */
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tmp1 |= b;
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b >>= 1;
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if (reg2 & a) /* LP14,12,10,8 --> ecc_code[0] */
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tmp1 |= b;
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b >>= 1;
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a >>= 1;
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}
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/* Calculate second ECC byte */
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b = 0x80;
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for (i = 0; i < 4; i++) {
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if (reg3 & a) /* LP7,5,3,1 --> ecc_code[1] */
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tmp2 |= b;
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b >>= 1;
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if (reg2 & a) /* LP6,4,2,0 --> ecc_code[1] */
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tmp2 |= b;
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b >>= 1;
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a >>= 1;
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}
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/* Store two of the ECC bytes */
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ecc_code[0] = tmp1;
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ecc_code[1] = tmp2;
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}
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/**
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* nand_calculate_ecc - [NAND Interface] Calculate 3 byte ECC code for 256 byte block
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* nand_calculate_ecc - [NAND Interface] Calculate 3-byte ECC for 256-byte block
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* @mtd: MTD block structure
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* @dat: raw data
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* @ecc_code: buffer for ECC
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*/
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int nand_calculate_ecc(struct nand_chip *nand, const u_char *dat, u_char *ecc_code)
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int nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
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u_char *ecc_code)
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{
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u_char idx, reg1, reg2, reg3;
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int j;
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uint8_t idx, reg1, reg2, reg3, tmp1, tmp2;
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int i;
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/* Initialize variables */
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reg1 = reg2 = reg3 = 0;
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ecc_code[0] = ecc_code[1] = ecc_code[2] = 0;
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/* Build up column parity */
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for(j = 0; j < 256; j++) {
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for(i = 0; i < 256; i++) {
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/* Get CP0 - CP5 from table */
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idx = nand_ecc_precalc_table[dat[j]];
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idx = nand_ecc_precalc_table[*dat++];
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reg1 ^= (idx & 0x3f);
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/* All bit XOR = 1 ? */
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if (idx & 0x40) {
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reg3 ^= (u_char) j;
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reg2 ^= ~((u_char) j);
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reg3 ^= (uint8_t) i;
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reg2 ^= ~((uint8_t) i);
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}
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}
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/* Create non-inverted ECC code from line parity */
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nand_trans_result(reg2, reg3, ecc_code);
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tmp1 = (reg3 & 0x80) >> 0; /* B7 -> B7 */
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tmp1 |= (reg2 & 0x80) >> 1; /* B7 -> B6 */
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tmp1 |= (reg3 & 0x40) >> 1; /* B6 -> B5 */
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tmp1 |= (reg2 & 0x40) >> 2; /* B6 -> B4 */
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tmp1 |= (reg3 & 0x20) >> 2; /* B5 -> B3 */
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tmp1 |= (reg2 & 0x20) >> 3; /* B5 -> B2 */
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tmp1 |= (reg3 & 0x10) >> 3; /* B4 -> B1 */
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tmp1 |= (reg2 & 0x10) >> 4; /* B4 -> B0 */
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tmp2 = (reg3 & 0x08) << 4; /* B3 -> B7 */
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tmp2 |= (reg2 & 0x08) << 3; /* B3 -> B6 */
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tmp2 |= (reg3 & 0x04) << 3; /* B2 -> B5 */
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tmp2 |= (reg2 & 0x04) << 2; /* B2 -> B4 */
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tmp2 |= (reg3 & 0x02) << 2; /* B1 -> B3 */
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tmp2 |= (reg2 & 0x02) << 1; /* B1 -> B2 */
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tmp2 |= (reg3 & 0x01) << 1; /* B0 -> B1 */
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tmp2 |= (reg2 & 0x01) << 0; /* B7 -> B0 */
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/* Calculate final ECC code */
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ecc_code[0] = ~ecc_code[0];
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ecc_code[1] = ~ecc_code[1];
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#ifdef CONFIG_MTD_NAND_ECC_SMC
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ecc_code[0] = ~tmp2;
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ecc_code[1] = ~tmp1;
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#else
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ecc_code[0] = ~tmp1;
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ecc_code[1] = ~tmp2;
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#endif
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ecc_code[2] = ((~reg1) << 2) | 0x03;
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return 0;
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}
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EXPORT_SYMBOL(nand_calculate_ecc);
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static inline int countbits(uint32_t byte)
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{
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int res = 0;
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for (;byte; byte >>= 1)
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res += byte & 0x01;
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return res;
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}
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/**
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* nand_correct_data - [NAND Interface] Detect and correct bit error(s)
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@ -154,88 +143,56 @@ int nand_calculate_ecc(struct nand_chip *nand, const u_char *dat, u_char *ecc_co
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*
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* Detect and correct a 1 bit error for 256 byte block
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*/
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int nand_correct_data(struct nand_chip *nand, u_char *dat, u_char *read_ecc, u_char *calc_ecc)
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int nand_correct_data(struct mtd_info *mtd, u_char *dat,
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u_char *read_ecc, u_char *calc_ecc)
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{
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u_char a, b, c, d1, d2, d3, add, bit, i;
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uint8_t s0, s1, s2;
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/* Do error detection */
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d1 = calc_ecc[0] ^ read_ecc[0];
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d2 = calc_ecc[1] ^ read_ecc[1];
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d3 = calc_ecc[2] ^ read_ecc[2];
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if ((d1 | d2 | d3) == 0) {
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/* No errors */
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#ifdef CONFIG_MTD_NAND_ECC_SMC
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s0 = calc_ecc[0] ^ read_ecc[0];
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s1 = calc_ecc[1] ^ read_ecc[1];
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s2 = calc_ecc[2] ^ read_ecc[2];
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#else
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s1 = calc_ecc[0] ^ read_ecc[0];
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s0 = calc_ecc[1] ^ read_ecc[1];
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s2 = calc_ecc[2] ^ read_ecc[2];
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#endif
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if ((s0 | s1 | s2) == 0)
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return 0;
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}
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else {
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a = (d1 ^ (d1 >> 1)) & 0x55;
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b = (d2 ^ (d2 >> 1)) & 0x55;
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c = (d3 ^ (d3 >> 1)) & 0x54;
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/* Found and will correct single bit error in the data */
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if ((a == 0x55) && (b == 0x55) && (c == 0x54)) {
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c = 0x80;
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add = 0;
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a = 0x80;
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for (i=0; i<4; i++) {
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if (d1 & c)
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add |= a;
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c >>= 2;
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a >>= 1;
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}
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c = 0x80;
|
||||
for (i=0; i<4; i++) {
|
||||
if (d2 & c)
|
||||
add |= a;
|
||||
c >>= 2;
|
||||
a >>= 1;
|
||||
}
|
||||
bit = 0;
|
||||
b = 0x04;
|
||||
c = 0x80;
|
||||
for (i=0; i<3; i++) {
|
||||
if (d3 & c)
|
||||
bit |= b;
|
||||
c >>= 2;
|
||||
b >>= 1;
|
||||
}
|
||||
b = 0x01;
|
||||
a = dat[add];
|
||||
a ^= (b << bit);
|
||||
dat[add] = a;
|
||||
return 1;
|
||||
} else {
|
||||
i = 0;
|
||||
while (d1) {
|
||||
if (d1 & 0x01)
|
||||
++i;
|
||||
d1 >>= 1;
|
||||
}
|
||||
while (d2) {
|
||||
if (d2 & 0x01)
|
||||
++i;
|
||||
d2 >>= 1;
|
||||
}
|
||||
while (d3) {
|
||||
if (d3 & 0x01)
|
||||
++i;
|
||||
d3 >>= 1;
|
||||
}
|
||||
if (i == 1) {
|
||||
/* ECC Code Error Correction */
|
||||
read_ecc[0] = calc_ecc[0];
|
||||
read_ecc[1] = calc_ecc[1];
|
||||
read_ecc[2] = calc_ecc[2];
|
||||
return 2;
|
||||
}
|
||||
else {
|
||||
/* Uncorrectable Error */
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
/* Check for a single bit error */
|
||||
if( ((s0 ^ (s0 >> 1)) & 0x55) == 0x55 &&
|
||||
((s1 ^ (s1 >> 1)) & 0x55) == 0x55 &&
|
||||
((s2 ^ (s2 >> 1)) & 0x54) == 0x54) {
|
||||
|
||||
uint32_t byteoffs, bitnum;
|
||||
|
||||
byteoffs = (s1 << 0) & 0x80;
|
||||
byteoffs |= (s1 << 1) & 0x40;
|
||||
byteoffs |= (s1 << 2) & 0x20;
|
||||
byteoffs |= (s1 << 3) & 0x10;
|
||||
|
||||
byteoffs |= (s0 >> 4) & 0x08;
|
||||
byteoffs |= (s0 >> 3) & 0x04;
|
||||
byteoffs |= (s0 >> 2) & 0x02;
|
||||
byteoffs |= (s0 >> 1) & 0x01;
|
||||
|
||||
bitnum = (s2 >> 5) & 0x04;
|
||||
bitnum |= (s2 >> 4) & 0x02;
|
||||
bitnum |= (s2 >> 3) & 0x01;
|
||||
|
||||
dat[byteoffs] ^= (1 << bitnum);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Should never happen */
|
||||
return -1;
|
||||
if(countbits(s0 | ((uint32_t)s1 << 8) | ((uint32_t)s2 <<16)) == 1)
|
||||
return 1;
|
||||
|
||||
return -EBADMSG;
|
||||
}
|
||||
EXPORT_SYMBOL(nand_correct_data);
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>");
|
||||
MODULE_DESCRIPTION("Generic NAND ECC support");
|
||||
|
|
|
|||
|
|
@ -141,6 +141,13 @@ struct nand_manufacturers nand_manuf_ids[] = {
|
|||
{NAND_MFR_STMICRO, "ST Micro"},
|
||||
{NAND_MFR_HYNIX, "Hynix"},
|
||||
{NAND_MFR_MICRON, "Micron"},
|
||||
{NAND_MFR_AMD, "AMD"},
|
||||
{0x0, "Unknown"}
|
||||
};
|
||||
|
||||
EXPORT_SYMBOL(nand_manuf_ids);
|
||||
EXPORT_SYMBOL(nand_flash_ids);
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
|
||||
MODULE_DESCRIPTION("Nand device & manufacturer IDs");
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* $Id: mtd-abi.h,v 1.7 2004/11/23 15:37:32 gleixner Exp $
|
||||
* $Id: mtd-abi.h,v 1.13 2005/11/07 11:14:56 gleixner Exp $
|
||||
*
|
||||
* Portions of MTD ABI definition which are shared by kernel and user space
|
||||
*/
|
||||
|
|
@ -23,47 +23,41 @@ struct mtd_oob_buf {
|
|||
#define MTD_ROM 2
|
||||
#define MTD_NORFLASH 3
|
||||
#define MTD_NANDFLASH 4
|
||||
#define MTD_PEROM 5
|
||||
#define MTD_OTHER 14
|
||||
#define MTD_UNKNOWN 15
|
||||
#define MTD_DATAFLASH 6
|
||||
#define MTD_UBIVOLUME 7
|
||||
|
||||
#define MTD_CLEAR_BITS 1 /* Bits can be cleared (flash) */
|
||||
#define MTD_SET_BITS 2 /* Bits can be set */
|
||||
#define MTD_ERASEABLE 4 /* Has an erase function */
|
||||
#define MTD_WRITEB_WRITEABLE 8 /* Direct IO is possible */
|
||||
#define MTD_VOLATILE 16 /* Set for RAMs */
|
||||
#define MTD_XIP 32 /* eXecute-In-Place possible */
|
||||
#define MTD_OOB 64 /* Out-of-band data (NAND flash) */
|
||||
#define MTD_ECC 128 /* Device capable of automatic ECC */
|
||||
#define MTD_NO_VIRTBLOCKS 256 /* Virtual blocks not allowed */
|
||||
#define MTD_WRITEABLE 0x400 /* Device is writeable */
|
||||
#define MTD_BIT_WRITEABLE 0x800 /* Single bits can be flipped */
|
||||
#define MTD_NO_ERASE 0x1000 /* No erase necessary */
|
||||
#define MTD_POWERUP_LOCK 0x2000 /* Always locked after reset */
|
||||
|
||||
/* Some common devices / combinations of capabilities */
|
||||
// Some common devices / combinations of capabilities
|
||||
#define MTD_CAP_ROM 0
|
||||
#define MTD_CAP_RAM (MTD_CLEAR_BITS|MTD_SET_BITS|MTD_WRITEB_WRITEABLE)
|
||||
#define MTD_CAP_NORFLASH (MTD_CLEAR_BITS|MTD_ERASEABLE)
|
||||
#define MTD_CAP_NANDFLASH (MTD_CLEAR_BITS|MTD_ERASEABLE|MTD_OOB)
|
||||
#define MTD_WRITEABLE (MTD_CLEAR_BITS|MTD_SET_BITS)
|
||||
|
||||
|
||||
/* Types of automatic ECC/Checksum available */
|
||||
#define MTD_ECC_NONE 0 /* No automatic ECC available */
|
||||
#define MTD_ECC_RS_DiskOnChip 1 /* Automatic ECC on DiskOnChip */
|
||||
#define MTD_ECC_SW 2 /* SW ECC for Toshiba & Samsung devices */
|
||||
#define MTD_CAP_RAM (MTD_WRITEABLE | MTD_BIT_WRITEABLE | MTD_NO_ERASE)
|
||||
#define MTD_CAP_NORFLASH (MTD_WRITEABLE | MTD_BIT_WRITEABLE)
|
||||
#define MTD_CAP_NANDFLASH (MTD_WRITEABLE)
|
||||
|
||||
/* ECC byte placement */
|
||||
#define MTD_NANDECC_OFF 0 /* Switch off ECC (Not recommended) */
|
||||
#define MTD_NANDECC_PLACE 1 /* Use the given placement in the structure (YAFFS1 legacy mode) */
|
||||
#define MTD_NANDECC_AUTOPLACE 2 /* Use the default placement scheme */
|
||||
#define MTD_NANDECC_PLACEONLY 3 /* Use the given placement in the structure (Do not store ecc result on read) */
|
||||
#define MTD_NANDECC_AUTOPL_USR 4 /* Use the given autoplacement scheme rather than using the default */
|
||||
#define MTD_NANDECC_OFF 0 // Switch off ECC (Not recommended)
|
||||
#define MTD_NANDECC_PLACE 1 // Use the given placement in the structure (YAFFS1 legacy mode)
|
||||
#define MTD_NANDECC_AUTOPLACE 2 // Use the default placement scheme
|
||||
#define MTD_NANDECC_PLACEONLY 3 // Use the given placement in the structure (Do not store ecc result on read)
|
||||
#define MTD_NANDECC_AUTOPL_USR 4 // Use the given autoplacement scheme rather than using the default
|
||||
|
||||
/* OTP mode selection */
|
||||
#define MTD_OTP_OFF 0
|
||||
#define MTD_OTP_FACTORY 1
|
||||
#define MTD_OTP_USER 2
|
||||
|
||||
struct mtd_info_user {
|
||||
uint8_t type;
|
||||
uint32_t flags;
|
||||
uint32_t size; /* Total size of the MTD */
|
||||
uint32_t size; // Total size of the MTD
|
||||
uint32_t erasesize;
|
||||
uint32_t oobblock; /* Size of OOB blocks (e.g. 512) */
|
||||
uint32_t oobsize; /* Amount of OOB data per block (e.g. 16) */
|
||||
uint32_t writesize;
|
||||
uint32_t oobsize; // Amount of OOB data per block (e.g. 16)
|
||||
/* The below two fields are obsolete and broken, do not use them
|
||||
* (TODO: remove at some point) */
|
||||
uint32_t ecctype;
|
||||
uint32_t eccsize;
|
||||
};
|
||||
|
|
@ -76,19 +70,36 @@ struct region_info_user {
|
|||
uint32_t regionindex;
|
||||
};
|
||||
|
||||
#define MEMGETINFO _IOR('M', 1, struct mtd_info_user)
|
||||
#define MEMERASE _IOW('M', 2, struct erase_info_user)
|
||||
#define MEMWRITEOOB _IOWR('M', 3, struct mtd_oob_buf)
|
||||
#define MEMREADOOB _IOWR('M', 4, struct mtd_oob_buf)
|
||||
#define MEMLOCK _IOW('M', 5, struct erase_info_user)
|
||||
#define MEMUNLOCK _IOW('M', 6, struct erase_info_user)
|
||||
struct otp_info {
|
||||
uint32_t start;
|
||||
uint32_t length;
|
||||
uint32_t locked;
|
||||
};
|
||||
|
||||
#define MEMGETINFO _IOR('M', 1, struct mtd_info_user)
|
||||
#define MEMERASE _IOW('M', 2, struct erase_info_user)
|
||||
#define MEMWRITEOOB _IOWR('M', 3, struct mtd_oob_buf)
|
||||
#define MEMREADOOB _IOWR('M', 4, struct mtd_oob_buf)
|
||||
#define MEMLOCK _IOW('M', 5, struct erase_info_user)
|
||||
#define MEMUNLOCK _IOW('M', 6, struct erase_info_user)
|
||||
#define MEMGETREGIONCOUNT _IOR('M', 7, int)
|
||||
#define MEMGETREGIONINFO _IOWR('M', 8, struct region_info_user)
|
||||
#define MEMSETOOBSEL _IOW('M', 9, struct nand_oobinfo)
|
||||
#define MEMGETOOBSEL _IOR('M', 10, struct nand_oobinfo)
|
||||
#define MEMGETBADBLOCK _IOW('M', 11, loff_t)
|
||||
#define MEMSETBADBLOCK _IOW('M', 12, loff_t)
|
||||
#define OTPSELECT _IOR('M', 13, int)
|
||||
#define OTPGETREGIONCOUNT _IOW('M', 14, int)
|
||||
#define OTPGETREGIONINFO _IOW('M', 15, struct otp_info)
|
||||
#define OTPLOCK _IOR('M', 16, struct otp_info)
|
||||
#define ECCGETLAYOUT _IOR('M', 17, struct nand_ecclayout)
|
||||
#define ECCGETSTATS _IOR('M', 18, struct mtd_ecc_stats)
|
||||
#define MTDFILEMODE _IO('M', 19)
|
||||
|
||||
/*
|
||||
* Obsolete legacy interface. Keep it in order not to break userspace
|
||||
* interfaces
|
||||
*/
|
||||
struct nand_oobinfo {
|
||||
uint32_t useecc;
|
||||
uint32_t eccbytes;
|
||||
|
|
@ -96,4 +107,46 @@ struct nand_oobinfo {
|
|||
uint32_t eccpos[32];
|
||||
};
|
||||
|
||||
struct nand_oobfree {
|
||||
uint32_t offset;
|
||||
uint32_t length;
|
||||
};
|
||||
|
||||
#define MTD_MAX_OOBFREE_ENTRIES 8
|
||||
/*
|
||||
* ECC layout control structure. Exported to userspace for
|
||||
* diagnosis and to allow creation of raw images
|
||||
*/
|
||||
struct nand_ecclayout {
|
||||
uint32_t eccbytes;
|
||||
uint32_t eccpos[64];
|
||||
uint32_t oobavail;
|
||||
struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES];
|
||||
};
|
||||
|
||||
/**
|
||||
* struct mtd_ecc_stats - error correction stats
|
||||
*
|
||||
* @corrected: number of corrected bits
|
||||
* @failed: number of uncorrectable errors
|
||||
* @badblocks: number of bad blocks in this partition
|
||||
* @bbtblocks: number of blocks reserved for bad block tables
|
||||
*/
|
||||
struct mtd_ecc_stats {
|
||||
uint32_t corrected;
|
||||
uint32_t failed;
|
||||
uint32_t badblocks;
|
||||
uint32_t bbtblocks;
|
||||
};
|
||||
|
||||
/*
|
||||
* Read/write file modes for access to MTD
|
||||
*/
|
||||
enum mtd_file_modes {
|
||||
MTD_MODE_NORMAL = MTD_OTP_OFF,
|
||||
MTD_MODE_OTP_FACTORY = MTD_OTP_FACTORY,
|
||||
MTD_MODE_OTP_USER = MTD_OTP_USER,
|
||||
MTD_MODE_RAW,
|
||||
};
|
||||
|
||||
#endif /* __MTD_ABI_H__ */
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* $Id: mtd.h,v 1.56 2004/08/09 18:46:04 dmarlin Exp $
|
||||
* $Id: mtd.h,v 1.61 2005/11/07 11:14:54 gleixner Exp $
|
||||
*
|
||||
* Copyright (C) 1999-2003 David Woodhouse <dwmw2@infradead.org> et al.
|
||||
*
|
||||
|
|
@ -8,10 +8,14 @@
|
|||
|
||||
#ifndef __MTD_MTD_H__
|
||||
#define __MTD_MTD_H__
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <list.h>
|
||||
#include <linux/mtd/mtd-abi.h>
|
||||
|
||||
#define MAX_MTD_DEVICES 16
|
||||
#define MTD_CHAR_MAJOR 90
|
||||
#define MTD_BLOCK_MAJOR 31
|
||||
#define MAX_MTD_DEVICES 32
|
||||
|
||||
#define MTD_ERASE_PENDING 0x01
|
||||
#define MTD_ERASING 0x02
|
||||
|
|
@ -23,7 +27,7 @@
|
|||
fail_addr = 0xffffffff, the failure was not at the device level or was not
|
||||
specific to any particular block. */
|
||||
struct erase_info {
|
||||
struct nand_chip *nand;
|
||||
struct mtd_info *mtd;
|
||||
u_int32_t addr;
|
||||
u_int32_t len;
|
||||
u_int32_t fail_addr;
|
||||
|
|
@ -41,21 +45,184 @@ struct mtd_erase_region_info {
|
|||
u_int32_t offset; /* At which this region starts, from the beginning of the MTD */
|
||||
u_int32_t erasesize; /* For this region */
|
||||
u_int32_t numblocks; /* Number of blocks of erasesize in this region */
|
||||
unsigned long *lockmap; /* If keeping bitmap of locks */
|
||||
};
|
||||
|
||||
#define MTD_ERASE(mtd, args...) (*(mtd->erase))(mtd, args)
|
||||
#define MTD_POINT(mtd, a,b,c,d) (*(mtd->point))(mtd, a,b,c, (u_char **)(d))
|
||||
#define MTD_UNPOINT(mtd, arg) (*(mtd->unpoint))(mtd, (u_char *)arg)
|
||||
#define MTD_READ(mtd, args...) (*(mtd->read))(mtd, args)
|
||||
#define MTD_WRITE(mtd, args...) (*(mtd->write))(mtd, args)
|
||||
#define MTD_READV(mtd, args...) (*(mtd->readv))(mtd, args)
|
||||
#define MTD_WRITEV(mtd, args...) (*(mtd->writev))(mtd, args)
|
||||
#define MTD_READECC(mtd, args...) (*(mtd->read_ecc))(mtd, args)
|
||||
#define MTD_WRITEECC(mtd, args...) (*(mtd->write_ecc))(mtd, args)
|
||||
#define MTD_READOOB(mtd, args...) (*(mtd->read_oob))(mtd, args)
|
||||
#define MTD_WRITEOOB(mtd, args...) (*(mtd->write_oob))(mtd, args)
|
||||
#define MTD_SYNC(mtd) do { if (mtd->sync) (*(mtd->sync))(mtd); } while (0)
|
||||
/*
|
||||
* oob operation modes
|
||||
*
|
||||
* MTD_OOB_PLACE: oob data are placed at the given offset
|
||||
* MTD_OOB_AUTO: oob data are automatically placed at the free areas
|
||||
* which are defined by the ecclayout
|
||||
* MTD_OOB_RAW: mode to read raw data+oob in one chunk. The oob data
|
||||
* is inserted into the data. Thats a raw image of the
|
||||
* flash contents.
|
||||
*/
|
||||
typedef enum {
|
||||
MTD_OOB_PLACE,
|
||||
MTD_OOB_AUTO,
|
||||
MTD_OOB_RAW,
|
||||
} mtd_oob_mode_t;
|
||||
|
||||
/**
|
||||
* struct mtd_oob_ops - oob operation operands
|
||||
* @mode: operation mode
|
||||
*
|
||||
* @len: number of data bytes to write/read
|
||||
*
|
||||
* @retlen: number of data bytes written/read
|
||||
*
|
||||
* @ooblen: number of oob bytes to write/read
|
||||
* @oobretlen: number of oob bytes written/read
|
||||
* @ooboffs: offset of oob data in the oob area (only relevant when
|
||||
* mode = MTD_OOB_PLACE)
|
||||
* @datbuf: data buffer - if NULL only oob data are read/written
|
||||
* @oobbuf: oob data buffer
|
||||
*
|
||||
* Note, it is allowed to read more then one OOB area at one go, but not write.
|
||||
* The interface assumes that the OOB write requests program only one page's
|
||||
* OOB area.
|
||||
*/
|
||||
struct mtd_oob_ops {
|
||||
mtd_oob_mode_t mode;
|
||||
size_t len;
|
||||
size_t retlen;
|
||||
size_t ooblen;
|
||||
size_t oobretlen;
|
||||
uint32_t ooboffs;
|
||||
uint8_t *datbuf;
|
||||
uint8_t *oobbuf;
|
||||
};
|
||||
|
||||
struct mtd_info {
|
||||
u_char type;
|
||||
u_int32_t flags;
|
||||
u_int32_t size; // Total size of the MTD
|
||||
|
||||
/* "Major" erase size for the device. Naïve users may take this
|
||||
* to be the only erase size available, or may use the more detailed
|
||||
* information below if they desire
|
||||
*/
|
||||
u_int32_t erasesize;
|
||||
/* Minimal writable flash unit size. In case of NOR flash it is 1 (even
|
||||
* though individual bits can be cleared), in case of NAND flash it is
|
||||
* one NAND page (or half, or one-fourths of it), in case of ECC-ed NOR
|
||||
* it is of ECC block size, etc. It is illegal to have writesize = 0.
|
||||
* Any driver registering a struct mtd_info must ensure a writesize of
|
||||
* 1 or larger.
|
||||
*/
|
||||
u_int32_t writesize;
|
||||
|
||||
u_int32_t oobsize; // Amount of OOB data per block (e.g. 16)
|
||||
u_int32_t oobavail; // Available OOB bytes per block
|
||||
|
||||
// Kernel-only stuff starts here.
|
||||
char *name;
|
||||
int index;
|
||||
|
||||
/* ecc layout structure pointer - read only ! */
|
||||
struct nand_ecclayout *ecclayout;
|
||||
|
||||
/* Data for variable erase regions. If numeraseregions is zero,
|
||||
* it means that the whole device has erasesize as given above.
|
||||
*/
|
||||
int numeraseregions;
|
||||
struct mtd_erase_region_info *eraseregions;
|
||||
|
||||
/*
|
||||
* Erase is an asynchronous operation. Device drivers are supposed
|
||||
* to call instr->callback() whenever the operation completes, even
|
||||
* if it completes with a failure.
|
||||
* Callers are supposed to pass a callback function and wait for it
|
||||
* to be called before writing to the block.
|
||||
*/
|
||||
int (*erase) (struct mtd_info *mtd, struct erase_info *instr);
|
||||
|
||||
int (*read) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
|
||||
int (*write) (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf);
|
||||
|
||||
/* In blackbox flight recorder like scenarios we want to make successful
|
||||
writes in interrupt context. panic_write() is only intended to be
|
||||
called when its known the kernel is about to panic and we need the
|
||||
write to succeed. Since the kernel is not going to be running for much
|
||||
longer, this function can break locks and delay to ensure the write
|
||||
succeeds (but not sleep). */
|
||||
|
||||
int (*panic_write) (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf);
|
||||
|
||||
int (*read_oob) (struct mtd_info *mtd, loff_t from,
|
||||
struct mtd_oob_ops *ops);
|
||||
int (*write_oob) (struct mtd_info *mtd, loff_t to,
|
||||
struct mtd_oob_ops *ops);
|
||||
|
||||
/*
|
||||
* Methods to access the protection register area, present in some
|
||||
* flash devices. The user data is one time programmable but the
|
||||
* factory data is read only.
|
||||
*/
|
||||
int (*get_fact_prot_info) (struct mtd_info *mtd, struct otp_info *buf, size_t len);
|
||||
int (*read_fact_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
|
||||
int (*get_user_prot_info) (struct mtd_info *mtd, struct otp_info *buf, size_t len);
|
||||
int (*read_user_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
|
||||
int (*write_user_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
|
||||
int (*lock_user_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len);
|
||||
|
||||
/* Sync */
|
||||
void (*sync) (struct mtd_info *mtd);
|
||||
|
||||
/* Chip-supported device locking */
|
||||
int (*lock) (struct mtd_info *mtd, loff_t ofs, size_t len);
|
||||
int (*unlock) (struct mtd_info *mtd, loff_t ofs, size_t len);
|
||||
|
||||
/* Power Management functions */
|
||||
int (*suspend) (struct mtd_info *mtd);
|
||||
void (*resume) (struct mtd_info *mtd);
|
||||
|
||||
/* Bad block management functions */
|
||||
int (*block_isbad) (struct mtd_info *mtd, loff_t ofs);
|
||||
int (*block_markbad) (struct mtd_info *mtd, loff_t ofs);
|
||||
|
||||
/* ECC status information */
|
||||
struct mtd_ecc_stats ecc_stats;
|
||||
/* Subpage shift (NAND) */
|
||||
int subpage_sft;
|
||||
|
||||
void *priv;
|
||||
|
||||
struct module *owner;
|
||||
int usecount;
|
||||
|
||||
/* If the driver is something smart, like UBI, it may need to maintain
|
||||
* its own reference counting. The below functions are only for driver.
|
||||
* The driver may register its callbacks. These callbacks are not
|
||||
* supposed to be called by MTD users */
|
||||
int (*get_device) (struct mtd_info *mtd);
|
||||
void (*put_device) (struct mtd_info *mtd);
|
||||
|
||||
struct device_d *dev;
|
||||
};
|
||||
|
||||
|
||||
/* Kernel-side ioctl definitions */
|
||||
|
||||
extern int add_mtd_device(struct mtd_info *mtd);
|
||||
extern int del_mtd_device (struct mtd_info *mtd);
|
||||
|
||||
extern struct mtd_info *get_mtd_device(struct mtd_info *mtd, int num);
|
||||
extern struct mtd_info *get_mtd_device_nm(const char *name);
|
||||
|
||||
extern void put_mtd_device(struct mtd_info *mtd);
|
||||
|
||||
|
||||
struct mtd_notifier {
|
||||
void (*add)(struct mtd_info *mtd);
|
||||
void (*remove)(struct mtd_info *mtd);
|
||||
struct list_head list;
|
||||
};
|
||||
|
||||
|
||||
extern void register_mtd_user (struct mtd_notifier *new);
|
||||
extern int unregister_mtd_user (struct mtd_notifier *old);
|
||||
|
||||
#ifdef CONFIG_MTD_PARTITIONS
|
||||
void mtd_erase_callback(struct erase_info *instr);
|
||||
|
|
@ -77,7 +244,7 @@ static inline void mtd_erase_callback(struct erase_info *instr)
|
|||
|
||||
#ifdef CONFIG_MTD_DEBUG
|
||||
#define DEBUG(n, args...) \
|
||||
do { \
|
||||
do { \
|
||||
if (n <= CONFIG_MTD_DEBUG_VERBOSE) \
|
||||
printk(KERN_INFO args); \
|
||||
} while(0)
|
||||
|
|
|
|||
|
|
@ -1,116 +1,111 @@
|
|||
/*
|
||||
* linux/include/linux/mtd/nand.h
|
||||
*
|
||||
* Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com>
|
||||
* Steven J. Hill <sjhill@realitydiluted.com>
|
||||
* Copyright (c) 2000 David Woodhouse <dwmw2@infradead.org>
|
||||
* Steven J. Hill <sjhill@realitydiluted.com>
|
||||
* Thomas Gleixner <tglx@linutronix.de>
|
||||
*
|
||||
* $Id: nand.h,v 1.68 2004/11/12 10:40:37 gleixner Exp $
|
||||
* $Id: nand.h,v 1.74 2005/09/15 13:58:50 vwool Exp $
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* Info:
|
||||
* Contains standard defines and IDs for NAND flash devices
|
||||
* Info:
|
||||
* Contains standard defines and IDs for NAND flash devices
|
||||
*
|
||||
* Changelog:
|
||||
* 01-31-2000 DMW Created
|
||||
* 09-18-2000 SJH Moved structure out of the Disk-On-Chip drivers
|
||||
* so it can be used by other NAND flash device
|
||||
* drivers. I also changed the copyright since none
|
||||
* of the original contents of this file are specific
|
||||
* to DoC devices. David can whack me with a baseball
|
||||
* bat later if I did something naughty.
|
||||
* 10-11-2000 SJH Added private NAND flash structure for driver
|
||||
* 10-24-2000 SJH Added prototype for 'nand_scan' function
|
||||
* 10-29-2001 TG changed nand_chip structure to support
|
||||
* hardwarespecific function for accessing control lines
|
||||
* 02-21-2002 TG added support for different read/write adress and
|
||||
* ready/busy line access function
|
||||
* 02-26-2002 TG added chip_delay to nand_chip structure to optimize
|
||||
* command delay times for different chips
|
||||
* 04-28-2002 TG OOB config defines moved from nand.c to avoid duplicate
|
||||
* defines in jffs2/wbuf.c
|
||||
* 08-07-2002 TG forced bad block location to byte 5 of OOB, even if
|
||||
* CONFIG_MTD_NAND_ECC_JFFS2 is not set
|
||||
* 08-10-2002 TG extensions to nand_chip structure to support HW-ECC
|
||||
*
|
||||
* 08-29-2002 tglx nand_chip structure: data_poi for selecting
|
||||
* internal / fs-driver buffer
|
||||
* support for 6byte/512byte hardware ECC
|
||||
* read_ecc, write_ecc extended for different oob-layout
|
||||
* oob layout selections: NAND_NONE_OOB, NAND_JFFS2_OOB,
|
||||
* NAND_YAFFS_OOB
|
||||
* 11-25-2002 tglx Added Manufacturer code FUJITSU, NATIONAL
|
||||
* Split manufacturer and device ID structures
|
||||
*
|
||||
* 02-08-2004 tglx added option field to nand structure for chip anomalities
|
||||
* 05-25-2004 tglx added bad block table support, ST-MICRO manufacturer id
|
||||
* update of nand_chip structure description
|
||||
* Changelog:
|
||||
* See git changelog.
|
||||
*/
|
||||
#ifndef __LINUX_MTD_NAND_H
|
||||
#define __LINUX_MTD_NAND_H
|
||||
|
||||
#include <linux/mtd/compat.h>
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <driver.h>
|
||||
|
||||
struct nand_chip;
|
||||
struct mtd_info;
|
||||
/* Scan and identify a NAND device */
|
||||
extern int nand_scan (struct nand_chip *, int max_chips);
|
||||
extern int nand_scan (struct mtd_info *mtd, int max_chips);
|
||||
/* Separate phases of nand_scan(), allowing board driver to intervene
|
||||
* and override command or ECC setup according to flash type */
|
||||
extern int nand_scan_ident(struct mtd_info *mtd, int max_chips);
|
||||
extern int nand_scan_tail(struct mtd_info *mtd);
|
||||
|
||||
/* Free resources held by the NAND device */
|
||||
extern void nand_release (struct nand_chip *);
|
||||
extern void nand_release (struct mtd_info *mtd);
|
||||
|
||||
/* Read raw data from the device without ECC */
|
||||
extern int nand_read_raw (struct nand_chip *, uint8_t *buf, loff_t from, size_t len, size_t ooblen);
|
||||
/* Internal helper for board drivers which need to override command function */
|
||||
extern void nand_wait_ready(struct mtd_info *mtd);
|
||||
|
||||
/* The maximum number of NAND chips in an array */
|
||||
#define NAND_MAX_CHIPS 8
|
||||
|
||||
/* This constant declares the max. oobsize / page, which
|
||||
* is supported now. If you add a chip with bigger oobsize/page
|
||||
* adjust this accordingly.
|
||||
*/
|
||||
#define NAND_MAX_OOBSIZE 64
|
||||
#define NAND_MAX_PAGESIZE 2048
|
||||
|
||||
/*
|
||||
* Constants for hardware specific CLE/ALE/NCE function
|
||||
*/
|
||||
*
|
||||
* These are bits which can be or'ed to set/clear multiple
|
||||
* bits in one go.
|
||||
*/
|
||||
/* Select the chip by setting nCE to low */
|
||||
#define NAND_CTL_SETNCE 1
|
||||
/* Deselect the chip by setting nCE to high */
|
||||
#define NAND_CTL_CLRNCE 2
|
||||
#define NAND_NCE 0x01
|
||||
/* Select the command latch by setting CLE to high */
|
||||
#define NAND_CTL_SETCLE 3
|
||||
/* Deselect the command latch by setting CLE to low */
|
||||
#define NAND_CTL_CLRCLE 4
|
||||
#define NAND_CLE 0x02
|
||||
/* Select the address latch by setting ALE to high */
|
||||
#define NAND_CTL_SETALE 5
|
||||
/* Deselect the address latch by setting ALE to low */
|
||||
#define NAND_CTL_CLRALE 6
|
||||
/* Set write protection by setting WP to high. Not used! */
|
||||
#define NAND_CTL_SETWP 7
|
||||
/* Clear write protection by setting WP to low. Not used! */
|
||||
#define NAND_CTL_CLRWP 8
|
||||
#define NAND_ALE 0x04
|
||||
|
||||
#define NAND_CTRL_CLE (NAND_NCE | NAND_CLE)
|
||||
#define NAND_CTRL_ALE (NAND_NCE | NAND_ALE)
|
||||
#define NAND_CTRL_CHANGE 0x80
|
||||
|
||||
/*
|
||||
* Standard NAND flash commands
|
||||
*/
|
||||
#define NAND_CMD_READ0 0
|
||||
#define NAND_CMD_READ1 1
|
||||
#define NAND_CMD_RNDOUT 5
|
||||
#define NAND_CMD_PAGEPROG 0x10
|
||||
#define NAND_CMD_READOOB 0x50
|
||||
#define NAND_CMD_ERASE1 0x60
|
||||
#define NAND_CMD_STATUS 0x70
|
||||
#define NAND_CMD_STATUS_MULTI 0x71
|
||||
#define NAND_CMD_SEQIN 0x80
|
||||
#define NAND_CMD_RNDIN 0x85
|
||||
#define NAND_CMD_READID 0x90
|
||||
#define NAND_CMD_ERASE2 0xd0
|
||||
#define NAND_CMD_RESET 0xff
|
||||
|
||||
/* Extended commands for large page devices */
|
||||
#define NAND_CMD_READSTART 0x30
|
||||
#define NAND_CMD_RNDOUTSTART 0xE0
|
||||
#define NAND_CMD_CACHEDPROG 0x15
|
||||
|
||||
/* Extended commands for AG-AND device */
|
||||
/*
|
||||
* Note: the command for NAND_CMD_DEPLETE1 is really 0x00 but
|
||||
* there is no way to distinguish that from NAND_CMD_READ0
|
||||
* until the remaining sequence of commands has been completed
|
||||
* so add a high order bit and mask it off in the command.
|
||||
*/
|
||||
#define NAND_CMD_DEPLETE1 0x100
|
||||
#define NAND_CMD_DEPLETE2 0x38
|
||||
#define NAND_CMD_STATUS_MULTI 0x71
|
||||
#define NAND_CMD_STATUS_ERROR 0x72
|
||||
/* multi-bank error status (banks 0-3) */
|
||||
#define NAND_CMD_STATUS_ERROR0 0x73
|
||||
#define NAND_CMD_STATUS_ERROR1 0x74
|
||||
#define NAND_CMD_STATUS_ERROR2 0x75
|
||||
#define NAND_CMD_STATUS_ERROR3 0x76
|
||||
#define NAND_CMD_STATUS_RESET 0x7f
|
||||
#define NAND_CMD_STATUS_CLEAR 0xff
|
||||
|
||||
#define NAND_CMD_NONE -1
|
||||
|
||||
/* Status bits */
|
||||
#define NAND_STATUS_FAIL 0x01
|
||||
#define NAND_STATUS_FAIL_N1 0x02
|
||||
|
|
@ -121,25 +116,16 @@ extern int nand_read_raw (struct nand_chip *, uint8_t *buf, loff_t from, size_t
|
|||
/*
|
||||
* Constants for ECC_MODES
|
||||
*/
|
||||
|
||||
/* No ECC. Usage is not recommended ! */
|
||||
#define NAND_ECC_NONE 0
|
||||
/* Software ECC 3 byte ECC per 256 Byte data */
|
||||
#define NAND_ECC_SOFT 1
|
||||
/* Hardware ECC 3 byte ECC per 256 Byte data */
|
||||
#define NAND_ECC_HW3_256 2
|
||||
/* Hardware ECC 3 byte ECC per 512 Byte data */
|
||||
#define NAND_ECC_HW3_512 3
|
||||
/* Hardware ECC 3 byte ECC per 512 Byte data */
|
||||
#define NAND_ECC_HW6_512 4
|
||||
/* Hardware ECC 8 byte ECC per 512 Byte data */
|
||||
#define NAND_ECC_HW8_512 6
|
||||
/* Hardware ECC 12 byte ECC per 2048 Byte data */
|
||||
#define NAND_ECC_HW12_2048 7
|
||||
typedef enum {
|
||||
NAND_ECC_NONE,
|
||||
NAND_ECC_SOFT,
|
||||
NAND_ECC_HW,
|
||||
NAND_ECC_HW_SYNDROME,
|
||||
} nand_ecc_modes_t;
|
||||
|
||||
/*
|
||||
* Constants for Hardware ECC
|
||||
*/
|
||||
*/
|
||||
/* Reset Hardware ECC for read */
|
||||
#define NAND_ECC_READ 0
|
||||
/* Reset Hardware ECC for write */
|
||||
|
|
@ -147,6 +133,10 @@ extern int nand_read_raw (struct nand_chip *, uint8_t *buf, loff_t from, size_t
|
|||
/* Enable Hardware ECC before syndrom is read back from flash */
|
||||
#define NAND_ECC_READSYN 2
|
||||
|
||||
/* Bit mask for flags passed to do_nand_read_ecc */
|
||||
#define NAND_GET_DEVICE 0x80
|
||||
|
||||
|
||||
/* Option constants for bizarre disfunctionality and real
|
||||
* features
|
||||
*/
|
||||
|
|
@ -169,13 +159,14 @@ extern int nand_read_raw (struct nand_chip *, uint8_t *buf, loff_t from, size_t
|
|||
/* Chip requires that BBT is periodically rewritten to prevent
|
||||
* bits from adjacent blocks from 'leaking' in altering data.
|
||||
* This happens with the Renesas AG-AND chips, possibly others. */
|
||||
#define BBT_AUTO_REFRESH 0x00000080
|
||||
#define BBT_AUTO_REFRESH 0x00000080
|
||||
/* Chip does not require ready check on read. True
|
||||
* for all large page devices, as they do not support
|
||||
* autoincrement.*/
|
||||
#define NAND_NO_READRDY 0x00000100
|
||||
#define NAND_NO_READRDY 0x00000100
|
||||
/* Chip does not allow subpage writes */
|
||||
#define NAND_NO_SUBPAGE_WRITE 0x00000200
|
||||
#define NAND_NO_SUBPAGE_WRITE 0x00000200
|
||||
|
||||
|
||||
/* Options valid for Samsung large page devices */
|
||||
#define NAND_SAMSUNG_LP_OPTIONS \
|
||||
|
|
@ -194,18 +185,18 @@ extern int nand_read_raw (struct nand_chip *, uint8_t *buf, loff_t from, size_t
|
|||
/* Use a flash based bad block table. This option is passed to the
|
||||
* default bad block table function. */
|
||||
#define NAND_USE_FLASH_BBT 0x00010000
|
||||
/* The hw ecc generator provides a syndrome instead a ecc value on read
|
||||
* This can only work if we have the ecc bytes directly behind the
|
||||
* data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */
|
||||
#define NAND_HWECC_SYNDROME 0x00020000
|
||||
|
||||
|
||||
/* This option skips the bbt scan during initialization. */
|
||||
#define NAND_SKIP_BBTSCAN 0x00020000
|
||||
/* This option is defined if the board driver allocates its own buffers
|
||||
(e.g. because it needs them DMA-coherent */
|
||||
#define NAND_OWN_BUFFERS 0x00040000
|
||||
/* Options set by nand scan */
|
||||
/* Nand scan has allocated oob_buf */
|
||||
#define NAND_OOBBUF_ALLOC 0x40000000
|
||||
/* Nand scan has allocated data_buf */
|
||||
#define NAND_DATABUF_ALLOC 0x80000000
|
||||
/* Nand scan has allocated controller struct */
|
||||
#define NAND_CONTROLLER_ALLOC 0x80000000
|
||||
|
||||
/* Cell info constants */
|
||||
#define NAND_CI_CHIPNR_MSK 0x03
|
||||
#define NAND_CI_CELLTYPE_MSK 0x0C
|
||||
|
||||
/*
|
||||
* nand_state_t - chip states
|
||||
|
|
@ -218,169 +209,212 @@ typedef enum {
|
|||
FL_ERASING,
|
||||
FL_SYNCING,
|
||||
FL_CACHEDPRG,
|
||||
FL_PM_SUSPENDED,
|
||||
} nand_state_t;
|
||||
|
||||
/* Keep gcc happy */
|
||||
struct nand_chip;
|
||||
|
||||
/**
|
||||
* struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independent devices
|
||||
* @lock: protection lock
|
||||
* @active: the mtd device which holds the controller currently
|
||||
* @wq: wait queue to sleep on if a NAND operation is in progress
|
||||
* used instead of the per chip wait queue when a hw controller is available
|
||||
*/
|
||||
struct nand_hw_control {
|
||||
struct nand_chip *active;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct nand_ecc_ctrl - Control structure for ecc
|
||||
* @mode: ecc mode
|
||||
* @steps: number of ecc steps per page
|
||||
* @size: data bytes per ecc step
|
||||
* @bytes: ecc bytes per step
|
||||
* @total: total number of ecc bytes per page
|
||||
* @prepad: padding information for syndrome based ecc generators
|
||||
* @postpad: padding information for syndrome based ecc generators
|
||||
* @layout: ECC layout control struct pointer
|
||||
* @hwctl: function to control hardware ecc generator. Must only
|
||||
* be provided if an hardware ECC is available
|
||||
* @calculate: function for ecc calculation or readback from ecc hardware
|
||||
* @correct: function for ecc correction, matching to ecc generator (sw/hw)
|
||||
* @read_page_raw: function to read a raw page without ECC
|
||||
* @write_page_raw: function to write a raw page without ECC
|
||||
* @read_page: function to read a page according to the ecc generator requirements
|
||||
* @write_page: function to write a page according to the ecc generator requirements
|
||||
* @read_oob: function to read chip OOB data
|
||||
* @write_oob: function to write chip OOB data
|
||||
*/
|
||||
struct nand_ecc_ctrl {
|
||||
nand_ecc_modes_t mode;
|
||||
int steps;
|
||||
int size;
|
||||
int bytes;
|
||||
int total;
|
||||
int prepad;
|
||||
int postpad;
|
||||
struct nand_ecclayout *layout;
|
||||
void (*hwctl)(struct mtd_info *mtd, int mode);
|
||||
int (*calculate)(struct mtd_info *mtd,
|
||||
const uint8_t *dat,
|
||||
uint8_t *ecc_code);
|
||||
int (*correct)(struct mtd_info *mtd, uint8_t *dat,
|
||||
uint8_t *read_ecc,
|
||||
uint8_t *calc_ecc);
|
||||
int (*read_page_raw)(struct mtd_info *mtd,
|
||||
struct nand_chip *chip,
|
||||
uint8_t *buf);
|
||||
void (*write_page_raw)(struct mtd_info *mtd,
|
||||
struct nand_chip *chip,
|
||||
const uint8_t *buf);
|
||||
int (*read_page)(struct mtd_info *mtd,
|
||||
struct nand_chip *chip,
|
||||
uint8_t *buf);
|
||||
void (*write_page)(struct mtd_info *mtd,
|
||||
struct nand_chip *chip,
|
||||
const uint8_t *buf);
|
||||
int (*read_oob)(struct mtd_info *mtd,
|
||||
struct nand_chip *chip,
|
||||
int page,
|
||||
int sndcmd);
|
||||
int (*write_oob)(struct mtd_info *mtd,
|
||||
struct nand_chip *chip,
|
||||
int page);
|
||||
};
|
||||
|
||||
/**
|
||||
* struct nand_buffers - buffer structure for read/write
|
||||
* @ecccalc: buffer for calculated ecc
|
||||
* @ecccode: buffer for ecc read from flash
|
||||
* @databuf: buffer for data - dynamically sized
|
||||
*
|
||||
* Do not change the order of buffers. databuf and oobrbuf must be in
|
||||
* consecutive order.
|
||||
*/
|
||||
struct nand_buffers {
|
||||
uint8_t ecccalc[NAND_MAX_OOBSIZE];
|
||||
uint8_t ecccode[NAND_MAX_OOBSIZE];
|
||||
uint8_t databuf[NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE];
|
||||
};
|
||||
|
||||
/**
|
||||
* struct nand_chip - NAND Private Flash Chip Data
|
||||
* @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device
|
||||
* @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device
|
||||
* @read_byte: [REPLACEABLE] read one byte from the chip
|
||||
* @write_byte: [REPLACEABLE] write one byte to the chip
|
||||
* @read_word: [REPLACEABLE] read one word from the chip
|
||||
* @write_word: [REPLACEABLE] write one word to the chip
|
||||
* @write_buf: [REPLACEABLE] write data from the buffer to the chip
|
||||
* @read_buf: [REPLACEABLE] read data from the chip into the buffer
|
||||
* @verify_buf: [REPLACEABLE] verify buffer contents against the chip data
|
||||
* @select_chip: [REPLACEABLE] select chip nr
|
||||
* @block_bad: [REPLACEABLE] check, if the block is bad
|
||||
* @block_markbad: [REPLACEABLE] mark the block bad
|
||||
* @hwcontrol: [BOARDSPECIFIC] hardwarespecific function for accesing control-lines
|
||||
* @cmd_ctrl: [BOARDSPECIFIC] hardwarespecific funtion for controlling
|
||||
* ALE/CLE/nCE. Also used to write command and address
|
||||
* @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing device ready/busy line
|
||||
* If set to NULL no access to ready/busy is available and the ready/busy information
|
||||
* is read from the chip status register
|
||||
* @cmdfunc: [REPLACEABLE] hardwarespecific function for writing commands to the chip
|
||||
* @waitfunc: [REPLACEABLE] hardwarespecific function for wait on ready
|
||||
* @calculate_ecc: [REPLACEABLE] function for ecc calculation or readback from ecc hardware
|
||||
* @correct_data: [REPLACEABLE] function for ecc correction, matching to ecc generator (sw/hw)
|
||||
* @enable_hwecc: [BOARDSPECIFIC] function to enable (reset) hardware ecc generator. Must only
|
||||
* be provided if a hardware ECC is available
|
||||
* @ecc: [BOARDSPECIFIC] ecc control ctructure
|
||||
* @buffers: buffer structure for read/write
|
||||
* @hwcontrol: platform-specific hardware control structure
|
||||
* @ops: oob operation operands
|
||||
* @erase_cmd: [INTERN] erase command write function, selectable due to AND support
|
||||
* @scan_bbt: [REPLACEABLE] function to scan bad block table
|
||||
* @eccmode: [BOARDSPECIFIC] mode of ecc, see defines
|
||||
* @eccsize: [INTERN] databytes used per ecc-calculation
|
||||
* @eccbytes: [INTERN] number of ecc bytes per ecc-calculation step
|
||||
* @eccsteps: [INTERN] number of ecc calculation steps per page
|
||||
* @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR)
|
||||
* @chip_lock: [INTERN] spinlock used to protect access to this structure and the chip
|
||||
* @wq: [INTERN] wait queue to sleep on if a NAND operation is in progress
|
||||
* @state: [INTERN] the current state of the NAND device
|
||||
* @oob_poi: poison value buffer
|
||||
* @page_shift: [INTERN] number of address bits in a page (column address bits)
|
||||
* @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock
|
||||
* @bbt_erase_shift: [INTERN] number of address bits in a bbt entry
|
||||
* @chip_shift: [INTERN] number of address bits in one chip
|
||||
* @data_buf: [INTERN] internal buffer for one page + oob
|
||||
* @oob_buf: [INTERN] oob buffer for one eraseblock
|
||||
* @datbuf: [INTERN] internal buffer for one page + oob
|
||||
* @oobbuf: [INTERN] oob buffer for one eraseblock
|
||||
* @oobdirty: [INTERN] indicates that oob_buf must be reinitialized
|
||||
* @data_poi: [INTERN] pointer to a data buffer
|
||||
* @options: [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about
|
||||
* special functionality. See the defines for further explanation
|
||||
* @badblockpos: [INTERN] position of the bad block marker in the oob area
|
||||
* @cellinfo: [INTERN] MLC/multichip data from chip ident
|
||||
* @numchips: [INTERN] number of physical chips
|
||||
* @chipsize: [INTERN] the size of one chip for multichip arrays
|
||||
* @pagemask: [INTERN] page number mask = number of (pages / chip) - 1
|
||||
* @pagebuf: [INTERN] holds the pagenumber which is currently in data_buf
|
||||
* @autooob: [REPLACEABLE] the default (auto)placement scheme
|
||||
* @subpagesize: [INTERN] holds the subpagesize
|
||||
* @ecclayout: [REPLACEABLE] the default ecc placement scheme
|
||||
* @bbt: [INTERN] bad block table pointer
|
||||
* @bbt_td: [REPLACEABLE] bad block table descriptor for flash lookup
|
||||
* @bbt_md: [REPLACEABLE] bad block table mirror descriptor
|
||||
* @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial bad block scan
|
||||
* @controller: [OPTIONAL] a pointer to a hardware controller structure which is shared among multiple independend devices
|
||||
* @controller: [REPLACEABLE] a pointer to a hardware controller structure
|
||||
* which is shared among multiple independend devices
|
||||
* @priv: [OPTIONAL] pointer to private chip date
|
||||
* @errstat: [OPTIONAL] hardware specific function to perform additional error status checks
|
||||
* (determine if errors are correctable)
|
||||
* @write_page: [REPLACEABLE] High-level page write function
|
||||
*/
|
||||
|
||||
struct nand_chip {
|
||||
void __iomem *IO_ADDR_R;
|
||||
void __iomem *IO_ADDR_W;
|
||||
void *IO_ADDR_R;
|
||||
void *IO_ADDR_W;
|
||||
|
||||
u_char (*read_byte)(struct nand_chip *);
|
||||
void (*write_byte)(struct nand_chip *, u_char byte);
|
||||
u16 (*read_word)(struct nand_chip *);
|
||||
void (*write_word)(struct nand_chip *, u16 word);
|
||||
uint8_t (*read_byte)(struct mtd_info *mtd);
|
||||
u16 (*read_word)(struct mtd_info *mtd);
|
||||
void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
|
||||
void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len);
|
||||
int (*verify_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
|
||||
void (*select_chip)(struct mtd_info *mtd, int chip);
|
||||
int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip);
|
||||
int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
|
||||
void (*cmd_ctrl)(struct mtd_info *mtd, int dat,
|
||||
unsigned int ctrl);
|
||||
int (*dev_ready)(struct mtd_info *mtd);
|
||||
void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr);
|
||||
int (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this);
|
||||
void (*erase_cmd)(struct mtd_info *mtd, int page);
|
||||
int (*scan_bbt)(struct mtd_info *mtd);
|
||||
int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page);
|
||||
int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
|
||||
const uint8_t *buf, int page, int cached, int raw);
|
||||
|
||||
void (*write_buf)(struct nand_chip *, const u_char *buf, int len);
|
||||
void (*read_buf)(struct nand_chip *, u_char *buf, int len);
|
||||
int (*verify_buf)(struct nand_chip *, const u_char *buf, int len);
|
||||
void (*select_chip)(struct nand_chip *, int chip);
|
||||
int (*block_bad)(struct nand_chip *, loff_t ofs, int getchip);
|
||||
int (*block_markbad)(struct nand_chip *, loff_t ofs);
|
||||
void (*hwcontrol)(struct nand_chip *, int cmd);
|
||||
int (*dev_ready)(struct nand_chip *);
|
||||
void (*cmdfunc)(struct nand_chip *, unsigned command, int column, int page_addr);
|
||||
int (*waitfunc)(struct nand_chip *, int state);
|
||||
int (*calculate_ecc)(struct nand_chip *, const u_char *dat, u_char *ecc_code);
|
||||
int (*correct_data)(struct nand_chip *, u_char *dat, u_char *read_ecc, u_char *calc_ecc);
|
||||
void (*enable_hwecc)(struct nand_chip *, int mode);
|
||||
void (*erase_cmd)(struct nand_chip *, int page);
|
||||
int (*scan_bbt)(struct nand_chip *);
|
||||
int eccmode;
|
||||
int eccsize;
|
||||
int eccbytes;
|
||||
int eccsteps;
|
||||
int chip_delay;
|
||||
unsigned int options;
|
||||
|
||||
int page_shift;
|
||||
int phys_erase_shift;
|
||||
int bbt_erase_shift;
|
||||
int chip_shift;
|
||||
u_char *data_buf;
|
||||
u_char *oob_buf;
|
||||
int oobdirty;
|
||||
u_char *data_poi;
|
||||
unsigned int options;
|
||||
int badblockpos;
|
||||
int numchips;
|
||||
unsigned long chipsize;
|
||||
int pagemask;
|
||||
int pagebuf;
|
||||
struct nand_oobinfo *autooob;
|
||||
int subpagesize;
|
||||
uint8_t cellinfo;
|
||||
int badblockpos;
|
||||
|
||||
nand_state_t state;
|
||||
|
||||
uint8_t *oob_poi;
|
||||
struct nand_hw_control *controller;
|
||||
struct nand_ecclayout *ecclayout;
|
||||
|
||||
struct nand_ecc_ctrl ecc;
|
||||
struct nand_buffers *buffers;
|
||||
struct nand_hw_control hwcontrol;
|
||||
|
||||
struct mtd_oob_ops ops;
|
||||
|
||||
uint8_t *bbt;
|
||||
struct nand_bbt_descr *bbt_td;
|
||||
struct nand_bbt_descr *bbt_md;
|
||||
|
||||
struct nand_bbt_descr *badblock_pattern;
|
||||
struct nand_hw_control *controller;
|
||||
|
||||
void *priv;
|
||||
|
||||
|
||||
/* Members formerly from mtd_info */
|
||||
u_int32_t oobblock; /* Size of OOB blocks (e.g. 512) */
|
||||
u_int32_t oobsize; /* Amount of OOB data per block (e.g. 16) */
|
||||
u_int32_t oobavail; /* Number of bytes in OOB area available for fs */
|
||||
u_int32_t ecctype;
|
||||
|
||||
/* "Major" erase size for the device. Naïve users may take this
|
||||
* to be the only erase size available, or may use the more detailed
|
||||
* information below if they desire
|
||||
*/
|
||||
u_int32_t erasesize;
|
||||
|
||||
/* Kernel-only stuff starts here. */
|
||||
char *name;
|
||||
u_int32_t size; /* Total size of the MTD */
|
||||
|
||||
int (*read_ecc) (struct nand_chip *, loff_t from, size_t len, size_t *retlen, u_char *buf, u_char *eccbuf, struct nand_oobinfo *oobsel);
|
||||
int (*write_ecc) (struct nand_chip *, loff_t to, size_t len, size_t *retlen, const u_char *buf, u_char *eccbuf, struct nand_oobinfo *oobsel);
|
||||
|
||||
int (*read_oob) (struct nand_chip *, loff_t from, size_t len, size_t *retlen, u_char *buf);
|
||||
int (*write_oob) (struct nand_chip *, loff_t to, size_t len, size_t *retlen, const u_char *buf);
|
||||
|
||||
/* Sync */
|
||||
void (*sync) (struct nand_chip *);
|
||||
/* Bad block management functions */
|
||||
int (*block_isbad) (struct nand_chip *, loff_t ofs);
|
||||
|
||||
int (*read) (struct nand_chip *, loff_t from, size_t len, size_t *retlen, u_char *buf);
|
||||
int (*write) (struct nand_chip *, loff_t to, size_t len, size_t *retlen, const u_char *buf);
|
||||
|
||||
/* oobinfo is a nand_oobinfo structure, which can be set by iotcl (MEMSETOOBINFO) */
|
||||
struct nand_oobinfo oobinfo;
|
||||
|
||||
u_char type;
|
||||
u_int32_t flags;
|
||||
int (*erase) (struct nand_chip *, struct erase_info *instr);
|
||||
|
||||
/* Minimal writable flash unit size. In case of NOR flash it is 1 (even
|
||||
* though individual bits can be cleared), in case of NAND flash it is
|
||||
* one NAND page (or half, or one-fourths of it), in case of ECC-ed NOR
|
||||
* it is of ECC block size, etc. It is illegal to have writesize = 0.
|
||||
* Any driver registering a struct mtd_info must ensure a writesize of
|
||||
* 1 or larger.
|
||||
*/
|
||||
u_int32_t writesize;
|
||||
|
||||
struct device_d dev;
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -392,12 +426,12 @@ struct nand_chip {
|
|||
#define NAND_MFR_NATIONAL 0x8f
|
||||
#define NAND_MFR_RENESAS 0x07
|
||||
#define NAND_MFR_STMICRO 0x20
|
||||
#define NAND_MFR_HYNIX 0xad
|
||||
#define NAND_MFR_MICRON 0x2c
|
||||
#define NAND_MFR_HYNIX 0xad
|
||||
#define NAND_MFR_MICRON 0x2c
|
||||
#define NAND_MFR_AMD 0x01
|
||||
|
||||
/**
|
||||
* struct nand_flash_dev - NAND Flash Device ID Structure
|
||||
*
|
||||
* @name: Identify the device type
|
||||
* @id: device ID code
|
||||
* @pagesize: Pagesize in bytes. Either 256 or 512 or 0
|
||||
|
|
@ -444,7 +478,7 @@ extern struct nand_manufacturers nand_manuf_ids[];
|
|||
* blocks is reserved at the end of the device where the tables are
|
||||
* written.
|
||||
* @reserved_block_code: if non-0, this pattern denotes a reserved (rather than
|
||||
* bad) block in the stored bbt
|
||||
* bad) block in the stored bbt
|
||||
* @pattern: pattern to identify bad block table or factory marked good /
|
||||
* bad blocks, can be NULL, if len = 0
|
||||
*
|
||||
|
|
@ -455,14 +489,14 @@ extern struct nand_manufacturers nand_manuf_ids[];
|
|||
*/
|
||||
struct nand_bbt_descr {
|
||||
int options;
|
||||
int *pages;
|
||||
int pages[NAND_MAX_CHIPS];
|
||||
int offs;
|
||||
int veroffs;
|
||||
uint8_t *version;
|
||||
uint8_t version[NAND_MAX_CHIPS];
|
||||
int len;
|
||||
int maxblocks;
|
||||
int reserved_block_code;
|
||||
uint8_t *pattern;
|
||||
uint8_t *pattern;
|
||||
};
|
||||
|
||||
/* Options for the bad block table descriptors */
|
||||
|
|
@ -474,7 +508,7 @@ struct nand_bbt_descr {
|
|||
#define NAND_BBT_4BIT 0x00000004
|
||||
#define NAND_BBT_8BIT 0x00000008
|
||||
/* The bad block table is in the last good block of the device */
|
||||
#define NAND_BBT_LASTBLOCK 0x00000010
|
||||
#define NAND_BBT_LASTBLOCK 0x00000010
|
||||
/* The bbt is at the given page, else we must scan for the bbt */
|
||||
#define NAND_BBT_ABSPAGE 0x00000020
|
||||
/* The bbt is at the given page, else we must scan for the bbt */
|
||||
|
|
@ -497,13 +531,16 @@ struct nand_bbt_descr {
|
|||
#define NAND_BBT_SCAN2NDPAGE 0x00004000
|
||||
|
||||
/* The maximum number of blocks to scan for a bbt */
|
||||
#define NAND_BBT_SCAN_MAXBLOCKS 4
|
||||
#define NAND_BBT_SCAN_MAXBLOCKS 4
|
||||
|
||||
extern int nand_scan_bbt (struct nand_chip *, struct nand_bbt_descr *bd);
|
||||
extern int nand_update_bbt (struct nand_chip *, loff_t offs);
|
||||
extern int nand_default_bbt (struct nand_chip *);
|
||||
extern int nand_isbad_bbt (struct nand_chip *, loff_t offs, int allowbbt);
|
||||
extern int nand_erase_nand (struct nand_chip *, struct erase_info *instr, int allowbbt);
|
||||
extern int nand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd);
|
||||
extern int nand_update_bbt(struct mtd_info *mtd, loff_t offs);
|
||||
extern int nand_default_bbt(struct mtd_info *mtd);
|
||||
extern int nand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt);
|
||||
extern int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
|
||||
int allowbbt);
|
||||
extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len,
|
||||
size_t * retlen, uint8_t * buf);
|
||||
|
||||
/*
|
||||
* Constants for oob configuration
|
||||
|
|
@ -511,4 +548,67 @@ extern int nand_erase_nand (struct nand_chip *, struct erase_info *instr, int al
|
|||
#define NAND_SMALL_BADBLOCK_POS 5
|
||||
#define NAND_LARGE_BADBLOCK_POS 0
|
||||
|
||||
/**
|
||||
* struct platform_nand_chip - chip level device structure
|
||||
* @nr_chips: max. number of chips to scan for
|
||||
* @chip_offset: chip number offset
|
||||
* @nr_partitions: number of partitions pointed to by partitions (or zero)
|
||||
* @partitions: mtd partition list
|
||||
* @chip_delay: R/B delay value in us
|
||||
* @options: Option flags, e.g. 16bit buswidth
|
||||
* @ecclayout: ecc layout info structure
|
||||
* @part_probe_types: NULL-terminated array of probe types
|
||||
* @priv: hardware controller specific settings
|
||||
*/
|
||||
struct platform_nand_chip {
|
||||
int nr_chips;
|
||||
int chip_offset;
|
||||
int nr_partitions;
|
||||
struct mtd_partition *partitions;
|
||||
struct nand_ecclayout *ecclayout;
|
||||
int chip_delay;
|
||||
unsigned int options;
|
||||
const char **part_probe_types;
|
||||
void *priv;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct platform_nand_ctrl - controller level device structure
|
||||
* @hwcontrol: platform specific hardware control structure
|
||||
* @dev_ready: platform specific function to read ready/busy pin
|
||||
* @select_chip: platform specific chip select function
|
||||
* @cmd_ctrl: platform specific function for controlling
|
||||
* ALE/CLE/nCE. Also used to write command and address
|
||||
* @priv: private data to transport driver specific settings
|
||||
*
|
||||
* All fields are optional and depend on the hardware driver requirements
|
||||
*/
|
||||
struct platform_nand_ctrl {
|
||||
void (*hwcontrol)(struct mtd_info *mtd, int cmd);
|
||||
int (*dev_ready)(struct mtd_info *mtd);
|
||||
void (*select_chip)(struct mtd_info *mtd, int chip);
|
||||
void (*cmd_ctrl)(struct mtd_info *mtd, int dat,
|
||||
unsigned int ctrl);
|
||||
void *priv;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct platform_nand_data - container structure for platform-specific data
|
||||
* @chip: chip level chip structure
|
||||
* @ctrl: controller level device structure
|
||||
*/
|
||||
struct platform_nand_data {
|
||||
struct platform_nand_chip chip;
|
||||
struct platform_nand_ctrl ctrl;
|
||||
};
|
||||
|
||||
/* Some helpers to access the data structures */
|
||||
static inline
|
||||
struct platform_nand_chip *get_platform_nandchip(struct mtd_info *mtd)
|
||||
{
|
||||
struct nand_chip *chip = mtd->priv;
|
||||
|
||||
return chip->priv;
|
||||
}
|
||||
|
||||
#endif /* __LINUX_MTD_NAND_H */
|
||||
|
|
|
|||
|
|
@ -20,11 +20,11 @@ struct mtd_info;
|
|||
/*
|
||||
* Calculate 3 byte ECC code for 256 byte block
|
||||
*/
|
||||
int nand_calculate_ecc(struct nand_chip *, const u_char *dat, u_char *ecc_code);
|
||||
int nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code);
|
||||
|
||||
/*
|
||||
* Detect and correct a 1 bit error for 256 byte block
|
||||
*/
|
||||
int nand_correct_data(struct nand_chip *, u_char *dat, u_char *read_ecc, u_char *calc_ecc);
|
||||
int nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc);
|
||||
|
||||
#endif /* __MTD_NAND_ECC_H__ */
|
||||
|
|
|
|||
Loading…
Reference in New Issue