From dc2dacd2610ae541bd63124ef0fad5ea9a2148ba Mon Sep 17 00:00:00 2001 From: Matteo Fortini Date: Thu, 29 May 2014 14:44:39 +0200 Subject: [PATCH] sama5d3x: fix AT91_SMC_CS offset stride As stated in section 29.19.32 of SAMA5D3 Series datasheet, to move from CS(n) to CS(n+1) the stride is 0x14 and not 0x10 as in the other AT91 CPUs Signed-off-by: Matteo Fortini Signed-off-by: Sascha Hauer --- arch/arm/mach-at91/sam9_smc.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c index a137da426..c7bfdfda6 100644 --- a/arch/arm/mach-at91/sam9_smc.c +++ b/arch/arm/mach-at91/sam9_smc.c @@ -12,11 +12,13 @@ #include #include #include +#include #include #include -#define AT91_SMC_CS(id, n) (smc_base_addr[id] + ((n) * 0x10)) +#define AT91_SMC_CS_STRIDE ((at91_soc_initdata.type == AT91_SOC_SAMA5D3) ? 0x14 : 0x10) +#define AT91_SMC_CS(id, n) (smc_base_addr[id] + ((n) * AT91_SMC_CS_STRIDE)) static void __iomem *smc_base_addr[2];