ppc: update I/O accessors
The I/O accessors in_bexx, out_bexx, in_lexx and out_lexx are updated to the latest Linux version. The patch is tested on a MPC8544 based board and solved I/O access issues on I2C devices. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -135,73 +135,76 @@ static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
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/*
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* 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
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*/
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extern inline int in_8(volatile u8 *addr)
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extern inline u8 in_8(const volatile u8 __iomem *addr)
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{
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int ret;
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u8 ret;
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__asm__ __volatile__("lbz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
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__asm__ __volatile__("sync; lbz%U1%X1 %0,%1; twi 0,%0,0; isync"
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: "=r" (ret) : "m" (*addr));
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return ret;
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}
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extern inline void out_8(volatile u8 *addr, int val)
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extern inline void out_8(volatile u8 __iomem *addr, u8 val)
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{
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__asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
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__asm__ __volatile__("sync;stb%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
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}
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extern inline int in_le16(volatile u16 *addr)
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extern inline u16 in_le16(const volatile u16 __iomem *addr)
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{
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int ret;
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u16 ret;
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__asm__ __volatile__("lhbrx %0,0,%1; eieio" : "=r" (ret) :
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"r" (addr), "m" (*addr));
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__asm__ __volatile__("sync; lhbrx %0,0,%1; twi 0,%0,0; isync"
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: "=r" (ret) : "r" (addr), "m" (*addr));
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return ret;
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}
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extern inline int in_be16(volatile u16 *addr)
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extern inline u16 in_be16(const volatile u16 __iomem *addr)
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{
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int ret;
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u16 ret;
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__asm__ __volatile__("lhz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
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__asm__ __volatile__("sync; lhz%U1%X1 %0,%1; twi 0,%0,0; isync"
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: "=r" (ret) : "m" (*addr));
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return ret;
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}
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extern inline void out_le16(volatile u16 *addr, int val)
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extern inline void out_le16(volatile u16 __iomem *addr, u16 val)
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{
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__asm__ __volatile__("sthbrx %1,0,%2; eieio" : "=m" (*addr) :
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"r" (val), "r" (addr));
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__asm__ __volatile__("sync; sthbrx %1,0,%2"
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: "=m" (*addr) : "r" (val), "r" (addr));
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}
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extern inline void out_be16(volatile u16 *addr, int val)
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extern inline void out_be16(volatile u16 __iomem *addr, u16 val)
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{
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__asm__ __volatile__("sth%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
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__asm__ __volatile__("sync;sth%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
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}
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extern inline unsigned in_le32(volatile u32 *addr)
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extern inline u32 in_le32(const volatile u32 __iomem *addr)
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{
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unsigned ret;
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u32 ret;
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__asm__ __volatile__("lwbrx %0,0,%1; eieio" : "=r" (ret) :
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"r" (addr), "m" (*addr));
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__asm__ __volatile__("sync; lwbrx %0,0,%1; twi 0,%0,0; isync"
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: "=r" (ret) : "r" (addr), "m" (*addr));
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return ret;
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}
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extern inline unsigned in_be32(volatile u32 *addr)
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extern inline u32 in_be32(const volatile u32 __iomem *addr)
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{
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unsigned ret;
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u32 ret;
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__asm__ __volatile__("lwz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
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__asm__ __volatile__("sync; lwz%U1%X1 %0,%1; twi 0,%0,0; isync"
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: "=r" (ret) : "m" (*addr));
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return ret;
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}
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extern inline void out_le32(volatile unsigned *addr, int val)
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extern inline void out_le32(volatile u32 __iomem *addr, u32 val)
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{
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__asm__ __volatile__("stwbrx %1,0,%2; eieio" : "=m" (*addr) :
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"r" (val), "r" (addr));
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__asm__ __volatile__("sync; stwbrx %1,0,%2"
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: "=m" (*addr) : "r" (val), "r" (addr));
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}
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extern inline void out_be32(volatile unsigned *addr, int val)
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extern inline void out_be32(volatile u32 __iomem *addr, u32 val)
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{
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__asm__ __volatile__("stw%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
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__asm__ __volatile__("sync;stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
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}
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/*
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