sysmo-bts
/
barebox
9
0
Fork 0
Code Releases Activity

arm/cpu/lowlevel: Don't save the return address in another register 

The corresponding code doesn't use the lr register (neither explicitly
nor implicitly by the bl instruction), so there is no gain in using r2
here.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Uwe Kleine-König 2014-12-11 21:51:33 +01:00 committed by Sascha Hauer
parent 35f614ec60
commit e190bcf14d
1 changed files with 1 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/cpu/lowlevel.S
View File

@ -4,7 +4,6 @@
.section ".text_bare_init_","ax"
ENTRY(arm_cpu_lowlevel_init)
mov r2, lr
/* set the cpu to SVC32 mode, mask irq and fiq */
mrs r12, cpsr
bic r12, r12, #0x1f
@ -55,5 +54,5 @@ ENTRY(arm_cpu_lowlevel_init)
mcr p15, 0, r12, c1, c0, 0 /* SCTLR */
mov pc, r2
mov pc, lr
ENDPROC(arm_cpu_lowlevel_init)