ata: ahci: refactor init functions
Fold ahci_host_init and __ahci_host_init into ahci_add_host Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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14f83c8286
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@ -457,83 +457,6 @@ static struct ata_port_operations ahci_ops = {
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.write = ahci_write,
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};
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static int ahci_host_init(struct ahci_device *ahci)
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{
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u8 *mmio = (u8 *)ahci->mmio_base;
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u32 tmp, cap_save;
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int i, ret;
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ahci_debug(ahci, "ahci_host_init: start\n");
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cap_save = readl(mmio + HOST_CAP);
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cap_save &= ((1 << 28) | (1 << 17));
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cap_save |= (1 << 27); /* Staggered Spin-up. Not needed. */
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/* global controller reset */
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tmp = ahci_ioread(ahci, HOST_CTL);
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if ((tmp & HOST_RESET) == 0)
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ahci_iowrite_f(ahci, HOST_CTL, tmp | HOST_RESET);
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/*
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* reset must complete within 1 second, or
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* the hardware should be considered fried.
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*/
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ret = wait_on_timeout(SECOND, (readl(mmio + HOST_CTL) & HOST_RESET) == 0);
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if (ret) {
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ahci_debug(ahci,"controller reset failed (0x%x)\n", tmp);
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return -ENODEV;
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}
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ahci_iowrite_f(ahci, HOST_CTL, HOST_AHCI_EN);
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ahci_iowrite(ahci, HOST_CAP, cap_save);
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ahci_iowrite_f(ahci, HOST_PORTS_IMPL, 0xf);
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ahci->cap = ahci_ioread(ahci, HOST_CAP);
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ahci->port_map = ahci_ioread(ahci, HOST_PORTS_IMPL);
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ahci->n_ports = (ahci->cap & 0x1f) + 1;
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ahci_debug(ahci, "cap 0x%x port_map 0x%x n_ports %d\n",
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ahci->cap, ahci->port_map, ahci->n_ports);
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for (i = 0; i < ahci->n_ports; i++) {
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struct ahci_port *ahci_port = &ahci->ports[i];
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ahci_port->num = i;
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ahci_port->ahci = ahci;
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ahci_port->ata.dev = ahci->dev;
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ahci_port->port_mmio = ahci_port_base(mmio, i);
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ahci_port->ata.ops = &ahci_ops;
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ata_port_register(&ahci_port->ata);
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}
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tmp = ahci_ioread(ahci, HOST_CTL);
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ahci_iowrite(ahci, HOST_CTL, tmp | HOST_IRQ_EN);
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tmp = ahci_ioread(ahci, HOST_CTL);
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return 0;
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}
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static int __ahci_host_init(struct ahci_device *ahci)
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{
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int rc = 0;
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ahci->host_flags = ATA_FLAG_SATA
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| ATA_FLAG_NO_LEGACY
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| ATA_FLAG_MMIO
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| ATA_FLAG_PIO_DMA
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| ATA_FLAG_NO_ATAPI;
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ahci->pio_mask = 0x1f;
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ahci->udma_mask = 0x7f; /* FIXME: assume to support UDMA6 */
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/* initialize adapter */
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rc = ahci_host_init(ahci);
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if (rc)
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goto err_out;
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err_out:
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return rc;
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}
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#if 0
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/*
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* In the general case of generic rotating media it makes sense to have a
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@ -637,7 +560,64 @@ void ahci_info(struct device_d *dev)
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int ahci_add_host(struct ahci_device *ahci)
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{
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__ahci_host_init(ahci);
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u8 *mmio = (u8 *)ahci->mmio_base;
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u32 tmp, cap_save;
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int i, ret;
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ahci->host_flags = ATA_FLAG_SATA
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| ATA_FLAG_NO_LEGACY
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| ATA_FLAG_MMIO
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| ATA_FLAG_PIO_DMA
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| ATA_FLAG_NO_ATAPI;
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ahci->pio_mask = 0x1f;
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ahci->udma_mask = 0x7f; /* FIXME: assume to support UDMA6 */
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ahci_debug(ahci, "ahci_host_init: start\n");
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cap_save = readl(mmio + HOST_CAP);
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cap_save &= ((1 << 28) | (1 << 17));
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cap_save |= (1 << 27); /* Staggered Spin-up. Not needed. */
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/* global controller reset */
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tmp = ahci_ioread(ahci, HOST_CTL);
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if ((tmp & HOST_RESET) == 0)
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ahci_iowrite_f(ahci, HOST_CTL, tmp | HOST_RESET);
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/*
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* reset must complete within 1 second, or
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* the hardware should be considered fried.
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*/
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ret = wait_on_timeout(SECOND, (readl(mmio + HOST_CTL) & HOST_RESET) == 0);
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if (ret) {
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ahci_debug(ahci,"controller reset failed (0x%x)\n", tmp);
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return -ENODEV;
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}
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ahci_iowrite_f(ahci, HOST_CTL, HOST_AHCI_EN);
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ahci_iowrite(ahci, HOST_CAP, cap_save);
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ahci_iowrite_f(ahci, HOST_PORTS_IMPL, 0xf);
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ahci->cap = ahci_ioread(ahci, HOST_CAP);
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ahci->port_map = ahci_ioread(ahci, HOST_PORTS_IMPL);
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ahci->n_ports = (ahci->cap & 0x1f) + 1;
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ahci_debug(ahci, "cap 0x%x port_map 0x%x n_ports %d\n",
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ahci->cap, ahci->port_map, ahci->n_ports);
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for (i = 0; i < ahci->n_ports; i++) {
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struct ahci_port *ahci_port = &ahci->ports[i];
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ahci_port->num = i;
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ahci_port->ahci = ahci;
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ahci_port->ata.dev = ahci->dev;
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ahci_port->port_mmio = ahci_port_base(mmio, i);
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ahci_port->ata.ops = &ahci_ops;
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ata_port_register(&ahci_port->ata);
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}
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tmp = ahci_ioread(ahci, HOST_CTL);
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ahci_iowrite(ahci, HOST_CTL, tmp | HOST_IRQ_EN);
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tmp = ahci_ioread(ahci, HOST_CTL);
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return 0;
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}
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