Merge branch 'for-next/dts'
This commit is contained in:
commit
e3ff4dfa41
55 changed files with 253 additions and 126 deletions
|
@ -6,5 +6,15 @@ following property:
|
|||
|
||||
Required root node property:
|
||||
|
||||
- compatible: must contain either "marvell,armada380" or
|
||||
"marvell,armada385" depending on the variant of the SoC being used.
|
||||
- compatible: must contain "marvell,armada380"
|
||||
|
||||
In addition, boards using the Marvell Armada 385 SoC shall have the
|
||||
following property before the previous one:
|
||||
|
||||
Required root node property:
|
||||
|
||||
compatible: must contain "marvell,armada385"
|
||||
|
||||
Example:
|
||||
|
||||
compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380";
|
||||
|
|
|
@ -9,6 +9,18 @@ Required Properties:
|
|||
- reg: physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
|
||||
Optional Properties:
|
||||
- clocks: List of clock handles. The parent clocks of the input clocks to the
|
||||
devices in this power domain are set to oscclk before power gating
|
||||
and restored back after powering on a domain. This is required for
|
||||
all domains which are powered on and off and not required for unused
|
||||
domains.
|
||||
- clock-names: The following clocks can be specified:
|
||||
- oscclk: Oscillator clock.
|
||||
- pclkN, clkN: Pairs of parent of input clock and input clock to the
|
||||
devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
|
||||
are supported currently.
|
||||
|
||||
Node of a device using power domains must have a samsung,power-domain property
|
||||
defined with a phandle to respective power domain.
|
||||
|
||||
|
@ -19,6 +31,14 @@ Example:
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|||
reg = <0x10023C00 0x10>;
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||||
};
|
||||
|
||||
mfc_pd: power-domain@10044060 {
|
||||
compatible = "samsung,exynos4210-pd";
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||||
reg = <0x10044060 0x20>;
|
||||
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK333>,
|
||||
<&clock CLK_MOUT_USER_ACLK333>;
|
||||
clock-names = "oscclk", "pclk0", "clk0";
|
||||
};
|
||||
|
||||
Example of the node using power domain:
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||||
|
||||
node {
|
||||
|
|
|
@ -40,6 +40,9 @@ Optional properties:
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|||
- arm,filter-ranges : <start length> Starting address and length of window to
|
||||
filter. Addresses in the filter window are directed to the M1 port. Other
|
||||
addresses will go to the M0 port.
|
||||
- arm,io-coherent : indicates that the system is operating in an hardware
|
||||
I/O coherent mode. Valid only when the arm,pl310-cache compatible
|
||||
string is used.
|
||||
- interrupts : 1 combined interrupt.
|
||||
- cache-id-part: cache id part number to be used if it is not present
|
||||
on hardware
|
||||
|
|
|
@ -48,7 +48,7 @@ adc@12D10000 {
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|||
|
||||
/* NTC thermistor is a hwmon device */
|
||||
ncp15wb473@0 {
|
||||
compatible = "ntc,ncp15wb473";
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||||
compatible = "murata,ncp15wb473";
|
||||
pullup-uv = <1800000>;
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||||
pullup-ohm = <47000>;
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||||
pulldown-ohm = <0>;
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||||
|
|
|
@ -8,10 +8,12 @@ Both required and optional properties listed below must be defined
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|||
under node /cpus/cpu@0.
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||||
|
||||
Required properties:
|
||||
- operating-points: Refer to Documentation/devicetree/bindings/power/opp.txt
|
||||
for details
|
||||
- None
|
||||
|
||||
Optional properties:
|
||||
- operating-points: Refer to Documentation/devicetree/bindings/power/opp.txt for
|
||||
details. OPPs *must* be supplied either via DT, i.e. this property, or
|
||||
populated at runtime.
|
||||
- clock-latency: Specify the possible maximum transition latency for clock,
|
||||
in unit of nanoseconds.
|
||||
- voltage-tolerance: Specify the CPU voltage tolerance in percentage.
|
||||
|
|
|
@ -3,11 +3,19 @@ NTC Thermistor hwmon sensors
|
|||
|
||||
Requires node properties:
|
||||
- "compatible" value : one of
|
||||
"ntc,ncp15wb473"
|
||||
"ntc,ncp18wb473"
|
||||
"ntc,ncp21wb473"
|
||||
"ntc,ncp03wb473"
|
||||
"ntc,ncp15wl333"
|
||||
"murata,ncp15wb473"
|
||||
"murata,ncp18wb473"
|
||||
"murata,ncp21wb473"
|
||||
"murata,ncp03wb473"
|
||||
"murata,ncp15wl333"
|
||||
|
||||
/* Usage of vendor name "ntc" is deprecated */
|
||||
<DEPRECATED> "ntc,ncp15wb473"
|
||||
<DEPRECATED> "ntc,ncp18wb473"
|
||||
<DEPRECATED> "ntc,ncp21wb473"
|
||||
<DEPRECATED> "ntc,ncp03wb473"
|
||||
<DEPRECATED> "ntc,ncp15wl333"
|
||||
|
||||
- "pullup-uv" Pull up voltage in micro volts
|
||||
- "pullup-ohm" Pull up resistor value in ohms
|
||||
- "pulldown-ohm" Pull down resistor value in ohms
|
||||
|
@ -21,7 +29,7 @@ Read more about iio bindings at
|
|||
|
||||
Example:
|
||||
ncp15wb473@0 {
|
||||
compatible = "ntc,ncp15wb473";
|
||||
compatible = "murata,ncp15wb473";
|
||||
pullup-uv = <1800000>;
|
||||
pullup-ohm = <47000>;
|
||||
pulldown-ohm = <0>;
|
||||
|
|
|
@ -4,6 +4,13 @@ Required properties:
|
|||
|
||||
- compatible: Must contain one of the following:
|
||||
|
||||
- "renesas,scifa-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFA compatible UART.
|
||||
- "renesas,scifb-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFB compatible UART.
|
||||
- "renesas,scifa-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFA compatible UART.
|
||||
- "renesas,scifb-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFB compatible UART.
|
||||
- "renesas,scifa-r8a7740" for R8A7740 (R-Mobile A1) SCIFA compatible UART.
|
||||
- "renesas,scifb-r8a7740" for R8A7740 (R-Mobile A1) SCIFB compatible UART.
|
||||
- "renesas,scif-r8a7778" for R8A7778 (R-Car M1) SCIF compatible UART.
|
||||
- "renesas,scif-r8a7779" for R8A7779 (R-Car H1) SCIF compatible UART.
|
||||
- "renesas,scif-r8a7790" for R8A7790 (R-Car H2) SCIF compatible UART.
|
||||
- "renesas,scifa-r8a7790" for R8A7790 (R-Car H2) SCIFA compatible UART.
|
||||
|
|
|
@ -23,6 +23,12 @@ Optional properties:
|
|||
- spi-max-frequency: Specifies maximum SPI clock frequency,
|
||||
Units - Hz. Definition as per
|
||||
Documentation/devicetree/bindings/spi/spi-bus.txt
|
||||
- num-cs: total number of chipselects
|
||||
- cs-gpios: should specify GPIOs used for chipselects.
|
||||
The gpios will be referred to as reg = <index> in the SPI child
|
||||
nodes. If unspecified, a single SPI device without a chip
|
||||
select can be used.
|
||||
|
||||
|
||||
SPI slave nodes must be children of the SPI master node and can contain
|
||||
properties described in Documentation/devicetree/bindings/spi/spi-bus.txt
|
||||
|
|
|
@ -83,6 +83,7 @@ mosaixtech Mosaix Technologies, Inc.
|
|||
moxa Moxa
|
||||
mpl MPL AG
|
||||
mundoreader Mundo Reader S.L.
|
||||
murata Murata Manufacturing Co., Ltd.
|
||||
mxicy Macronix International Co., Ltd.
|
||||
national National Semiconductor
|
||||
neonode Neonode Inc.
|
||||
|
|
|
@ -63,7 +63,6 @@
|
|||
#define CLK_SCLK_MPHY_IXTAL24 161
|
||||
|
||||
/* gate clocks */
|
||||
#define CLK_ACLK66_PERIC 256
|
||||
#define CLK_UART0 257
|
||||
#define CLK_UART1 258
|
||||
#define CLK_UART2 259
|
||||
|
@ -203,6 +202,8 @@
|
|||
#define CLK_MOUT_G3D 641
|
||||
#define CLK_MOUT_VPLL 642
|
||||
#define CLK_MOUT_MAUDIO0 643
|
||||
#define CLK_MOUT_USER_ACLK333 644
|
||||
#define CLK_MOUT_SW_ACLK333 645
|
||||
|
||||
/* divider clocks */
|
||||
#define CLK_DOUT_PIXEL 768
|
||||
|
|
|
@ -145,6 +145,7 @@
|
|||
#define IMX6SL_CLK_USDHC4 132
|
||||
#define IMX6SL_CLK_PLL4_AUDIO_DIV 133
|
||||
#define IMX6SL_CLK_SPBA 134
|
||||
#define IMX6SL_CLK_END 135
|
||||
#define IMX6SL_CLK_ENET 135
|
||||
#define IMX6SL_CLK_END 136
|
||||
|
||||
#endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
#define CLK_ETH1_PHY 4
|
||||
|
||||
/* CLOCKGEN A1 */
|
||||
#define CLK_ICN_IF_2 0
|
||||
#define CLK_GMAC0_PHY 3
|
||||
|
||||
#endif
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
#define CLK_ETH1_PHY 4
|
||||
|
||||
/* CLOCKGEN A1 */
|
||||
#define CLK_ICN_IF_2 0
|
||||
#define CLK_GMAC0_PHY 3
|
||||
|
||||
#endif
|
||||
|
|
|
@ -30,7 +30,8 @@
|
|||
#define MUX_MODE14 0xe
|
||||
#define MUX_MODE15 0xf
|
||||
|
||||
#define PULL_ENA (1 << 16)
|
||||
#define PULL_ENA (0 << 16)
|
||||
#define PULL_DIS (1 << 16)
|
||||
#define PULL_UP (1 << 17)
|
||||
#define INPUT_EN (1 << 18)
|
||||
#define SLEWCONTROL (1 << 19)
|
||||
|
@ -38,10 +39,10 @@
|
|||
#define WAKEUP_EVENT (1 << 25)
|
||||
|
||||
/* Active pin states */
|
||||
#define PIN_OUTPUT 0
|
||||
#define PIN_OUTPUT (0 | PULL_DIS)
|
||||
#define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP)
|
||||
#define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA)
|
||||
#define PIN_INPUT INPUT_EN
|
||||
#define PIN_INPUT (INPUT_EN | PULL_DIS)
|
||||
#define PIN_INPUT_SLEW (INPUT_EN | SLEWCONTROL)
|
||||
#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP)
|
||||
#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN)
|
||||
|
|
|
@ -529,8 +529,8 @@
|
|||
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
|
||||
0 0 1 2
|
||||
>;
|
||||
tx-num-evt = <1>;
|
||||
rx-num-evt = <1>;
|
||||
tx-num-evt = <32>;
|
||||
rx-num-evt = <32>;
|
||||
};
|
||||
|
||||
&tps {
|
||||
|
|
|
@ -560,8 +560,8 @@
|
|||
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
|
||||
0 0 1 2
|
||||
>;
|
||||
tx-num-evt = <1>;
|
||||
rx-num-evt = <1>;
|
||||
tx-num-evt = <32>;
|
||||
rx-num-evt = <32>;
|
||||
};
|
||||
|
||||
&tscadc {
|
||||
|
|
|
@ -105,10 +105,16 @@
|
|||
|
||||
&cpsw_emac0 {
|
||||
phy_id = <&davinci_mdio>, <0>;
|
||||
phy-mode = "rmii";
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy_id = <&davinci_mdio>, <1>;
|
||||
phy-mode = "rmii";
|
||||
};
|
||||
|
||||
&phy_sel {
|
||||
rmii-clock-ext;
|
||||
};
|
||||
|
||||
&elm {
|
||||
|
|
|
@ -319,6 +319,10 @@
|
|||
phy-mode = "rmii";
|
||||
};
|
||||
|
||||
&phy_sel {
|
||||
rmii-clock-ext;
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
|
|
|
@ -16,7 +16,7 @@
|
|||
|
||||
/ {
|
||||
model = "Marvell Armada 380 family SoC";
|
||||
compatible = "marvell,armada380", "marvell,armada38x";
|
||||
compatible = "marvell,armada380";
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
|
|
|
@ -16,7 +16,7 @@
|
|||
|
||||
/ {
|
||||
model = "Marvell Armada 385 Development Board";
|
||||
compatible = "marvell,a385-db", "marvell,armada385", "marvell,armada38x";
|
||||
compatible = "marvell,a385-db", "marvell,armada385", "marvell,armada380";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlyprintk";
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
|
||||
/ {
|
||||
model = "Marvell Armada 385 Reference Design";
|
||||
compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada38x";
|
||||
compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlyprintk";
|
||||
|
|
|
@ -16,7 +16,7 @@
|
|||
|
||||
/ {
|
||||
model = "Marvell Armada 385 family SoC";
|
||||
compatible = "marvell,armada385", "marvell,armada38x";
|
||||
compatible = "marvell,armada385", "marvell,armada380";
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
|
|
|
@ -20,7 +20,7 @@
|
|||
|
||||
/ {
|
||||
model = "Marvell Armada 38x family SoC";
|
||||
compatible = "marvell,armada38x";
|
||||
compatible = "marvell,armada380";
|
||||
|
||||
aliases {
|
||||
gpio0 = &gpio0;
|
||||
|
|
|
@ -568,24 +568,17 @@
|
|||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
slow_rc_osc: slow_rc_osc {
|
||||
compatible = "fixed-clock";
|
||||
main_osc: main_osc {
|
||||
compatible = "atmel,at91rm9200-clk-main-osc";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <32768>;
|
||||
clock-accuracy = <50000000>;
|
||||
};
|
||||
|
||||
clk32k: slck {
|
||||
compatible = "atmel,at91sam9260-clk-slow";
|
||||
#clock-cells = <0>;
|
||||
clocks = <&slow_rc_osc &slow_xtal>;
|
||||
interrupts-extended = <&pmc AT91_PMC_MOSCS>;
|
||||
clocks = <&main_xtal>;
|
||||
};
|
||||
|
||||
main: mainck {
|
||||
compatible = "atmel,at91rm9200-clk-main";
|
||||
#clock-cells = <0>;
|
||||
interrupts-extended = <&pmc AT91_PMC_MOSCS>;
|
||||
clocks = <&main_xtal>;
|
||||
clocks = <&main_osc>;
|
||||
};
|
||||
|
||||
plla: pllack {
|
||||
|
@ -615,7 +608,7 @@
|
|||
compatible = "atmel,at91rm9200-clk-master";
|
||||
#clock-cells = <0>;
|
||||
interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
|
||||
clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
|
||||
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
|
||||
atmel,clk-output-range = <0 94000000>;
|
||||
atmel,clk-divisors = <1 2 4 0>;
|
||||
};
|
||||
|
@ -632,7 +625,7 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <&pmc>;
|
||||
clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
|
||||
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
|
||||
|
||||
prog0: prog0 {
|
||||
#clock-cells = <0>;
|
||||
|
|
|
@ -20,6 +20,10 @@
|
|||
reg = <0x20000000 0x4000000>;
|
||||
};
|
||||
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
main_xtal {
|
||||
clock-frequency = <18432000>;
|
||||
};
|
||||
|
|
|
@ -132,8 +132,8 @@
|
|||
<595000000 650000000 3 0>,
|
||||
<545000000 600000000 0 1>,
|
||||
<495000000 555000000 1 1>,
|
||||
<445000000 500000000 1 2>,
|
||||
<400000000 450000000 1 3>;
|
||||
<445000000 500000000 2 1>,
|
||||
<400000000 450000000 3 1>;
|
||||
};
|
||||
|
||||
plladiv: plladivck {
|
||||
|
@ -925,7 +925,7 @@
|
|||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00500000 0x00100000>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>,
|
||||
clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>,
|
||||
<&uhpck>;
|
||||
clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
|
||||
status = "disabled";
|
||||
|
|
|
@ -140,8 +140,8 @@
|
|||
595000000 650000000 3 0
|
||||
545000000 600000000 0 1
|
||||
495000000 555000000 1 1
|
||||
445000000 500000000 1 2
|
||||
400000000 450000000 1 3>;
|
||||
445000000 500000000 2 1
|
||||
400000000 450000000 3 1>;
|
||||
};
|
||||
|
||||
plladiv: plladivck {
|
||||
|
@ -1045,6 +1045,8 @@
|
|||
reg = <0x00500000 0x80000
|
||||
0xf803c000 0x400>;
|
||||
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
clocks = <&usb>, <&udphs_clk>;
|
||||
clock-names = "hclk", "pclk";
|
||||
status = "disabled";
|
||||
|
||||
ep0 {
|
||||
|
@ -1122,6 +1124,7 @@
|
|||
compatible = "atmel,at91sam9rl-pwm";
|
||||
reg = <0xf8034000 0x300>;
|
||||
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
|
||||
clocks = <&pwm_clk>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
@ -1153,8 +1156,7 @@
|
|||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00600000 0x100000>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>,
|
||||
<&uhpck>;
|
||||
clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
|
||||
clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
@ -240,6 +240,7 @@
|
|||
regulator-name = "ldo3";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
|
|
|
@ -773,7 +773,6 @@
|
|||
clocks = <&qspi_gfclk_div>;
|
||||
clock-names = "fck";
|
||||
num-cs = <4>;
|
||||
interrupts = <0 343 0x4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -984,6 +983,17 @@
|
|||
#size-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
atl: atl@4843c000 {
|
||||
compatible = "ti,dra7-atl";
|
||||
reg = <0x4843c000 0x3ff>;
|
||||
ti,hwmods = "atl";
|
||||
ti,provided-clocks = <&atl_clkin0_ck>, <&atl_clkin1_ck>,
|
||||
<&atl_clkin2_ck>, <&atl_clkin3_ck>;
|
||||
clocks = <&atl_gfclk_mux>;
|
||||
clock-names = "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -10,26 +10,26 @@
|
|||
&cm_core_aon_clocks {
|
||||
atl_clkin0_ck: atl_clkin0_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <0>;
|
||||
compatible = "ti,dra7-atl-clock";
|
||||
clocks = <&atl_gfclk_mux>;
|
||||
};
|
||||
|
||||
atl_clkin1_ck: atl_clkin1_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <0>;
|
||||
compatible = "ti,dra7-atl-clock";
|
||||
clocks = <&atl_gfclk_mux>;
|
||||
};
|
||||
|
||||
atl_clkin2_ck: atl_clkin2_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <0>;
|
||||
compatible = "ti,dra7-atl-clock";
|
||||
clocks = <&atl_gfclk_mux>;
|
||||
};
|
||||
|
||||
atl_clkin3_ck: atl_clkin3_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <0>;
|
||||
compatible = "ti,dra7-atl-clock";
|
||||
clocks = <&atl_gfclk_mux>;
|
||||
};
|
||||
|
||||
hdmi_clkin_ck: hdmi_clkin_ck {
|
||||
|
@ -673,10 +673,12 @@
|
|||
|
||||
l3_iclk_div: l3_iclk_div {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-factor-clock";
|
||||
compatible = "ti,divider-clock";
|
||||
ti,max-div = <2>;
|
||||
ti,bit-shift = <4>;
|
||||
reg = <0x0100>;
|
||||
clocks = <&dpll_core_h12x2_ck>;
|
||||
clock-mult = <1>;
|
||||
clock-div = <1>;
|
||||
ti,index-power-of-two;
|
||||
};
|
||||
|
||||
l4_root_clk_div: l4_root_clk_div {
|
||||
|
@ -684,7 +686,7 @@
|
|||
compatible = "fixed-factor-clock";
|
||||
clocks = <&l3_iclk_div>;
|
||||
clock-mult = <1>;
|
||||
clock-div = <1>;
|
||||
clock-div = <2>;
|
||||
};
|
||||
|
||||
video1_clk2_div: video1_clk2_div {
|
||||
|
|
|
@ -113,7 +113,7 @@
|
|||
compatible = "arm,cortex-a9-gic";
|
||||
#interrupt-cells = <3>;
|
||||
interrupt-controller;
|
||||
reg = <0x10490000 0x1000>, <0x10480000 0x100>;
|
||||
reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
|
||||
};
|
||||
|
||||
combiner: interrupt-controller@10440000 {
|
||||
|
@ -554,7 +554,7 @@
|
|||
interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
|
||||
clocks = <&clock CLK_PWM>;
|
||||
clock-names = "timers";
|
||||
#pwm-cells = <2>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -167,7 +167,7 @@
|
|||
compatible = "samsung,exynos5420-audss-clock";
|
||||
reg = <0x03810000 0x0C>;
|
||||
#clock-cells = <1>;
|
||||
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
|
||||
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>,
|
||||
<&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>;
|
||||
clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
|
||||
};
|
||||
|
@ -260,6 +260,9 @@
|
|||
mfc_pd: power-domain@10044060 {
|
||||
compatible = "samsung,exynos4210-pd";
|
||||
reg = <0x10044060 0x20>;
|
||||
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK333>,
|
||||
<&clock CLK_MOUT_USER_ACLK333>;
|
||||
clock-names = "oscclk", "pclk0", "clk0";
|
||||
};
|
||||
|
||||
disp_pd: power-domain@100440C0 {
|
||||
|
|
|
@ -73,7 +73,7 @@
|
|||
|
||||
L2: l2-cache {
|
||||
compatible = "arm,pl310-cache";
|
||||
reg = <0xfc10000 0x100000>;
|
||||
reg = <0x100000 0x100000>;
|
||||
interrupts = <0 15 4>;
|
||||
cache-unified;
|
||||
cache-level = <2>;
|
||||
|
|
|
@ -315,15 +315,15 @@
|
|||
&esdhc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_esdhc1>;
|
||||
fsl,cd-controller;
|
||||
fsl,wp-controller;
|
||||
cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&esdhc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_esdhc2>;
|
||||
cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
|
||||
cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -468,8 +468,8 @@
|
|||
MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
|
||||
MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
|
||||
MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
|
||||
MX51_PAD_GPIO1_0__SD1_CD 0x20d5
|
||||
MX51_PAD_GPIO1_1__SD1_WP 0x20d5
|
||||
MX51_PAD_GPIO1_0__GPIO1_0 0x100
|
||||
MX51_PAD_GPIO1_1__GPIO1_1 0x100
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
|
@ -107,7 +107,7 @@
|
|||
&esdhc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>;
|
||||
fsl,cd-controller;
|
||||
cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
@ -206,7 +206,7 @@
|
|||
|
||||
pinctrl_esdhc1_cd: esdhc1_cd {
|
||||
fsl,pins = <
|
||||
MX51_PAD_GPIO1_0__SD1_CD 0x20d5
|
||||
MX51_PAD_GPIO1_0__GPIO1_0 0xd5
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
|
@ -21,27 +21,25 @@
|
|||
<0xb0000000 0x20000000>;
|
||||
};
|
||||
|
||||
soc {
|
||||
display1: display@di1 {
|
||||
compatible = "fsl,imx-parallel-display";
|
||||
interface-pix-fmt = "bgr666";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ipu_disp1>;
|
||||
display1: display@di1 {
|
||||
compatible = "fsl,imx-parallel-display";
|
||||
interface-pix-fmt = "bgr666";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ipu_disp1>;
|
||||
|
||||
display-timings {
|
||||
800x480p60 {
|
||||
native-mode;
|
||||
clock-frequency = <31500000>;
|
||||
hactive = <800>;
|
||||
vactive = <480>;
|
||||
hfront-porch = <40>;
|
||||
hback-porch = <88>;
|
||||
hsync-len = <128>;
|
||||
vback-porch = <33>;
|
||||
vfront-porch = <9>;
|
||||
vsync-len = <3>;
|
||||
vsync-active = <1>;
|
||||
};
|
||||
display-timings {
|
||||
800x480p60 {
|
||||
native-mode;
|
||||
clock-frequency = <31500000>;
|
||||
hactive = <800>;
|
||||
vactive = <480>;
|
||||
hfront-porch = <40>;
|
||||
hback-porch = <88>;
|
||||
hsync-len = <128>;
|
||||
vback-porch = <33>;
|
||||
vfront-porch = <9>;
|
||||
vsync-len = <3>;
|
||||
vsync-active = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -143,6 +143,14 @@
|
|||
fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
|
||||
};
|
||||
|
||||
pinctrl_hummingboard_usbotg_id: hummingboard-usbotg-id {
|
||||
/*
|
||||
* Similar to pinctrl_usbotg_2, but we want it
|
||||
* pulled down for a fixed host connection.
|
||||
*/
|
||||
fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
|
||||
};
|
||||
|
||||
pinctrl_hummingboard_usbotg_vbus: hummingboard-usbotg-vbus {
|
||||
fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
|
||||
};
|
||||
|
@ -178,6 +186,8 @@
|
|||
};
|
||||
|
||||
&usbotg {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hummingboard_usbotg_id>;
|
||||
vbus-supply = <®_usbotg_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -11,7 +11,7 @@
|
|||
|
||||
/dts-v1/;
|
||||
#include "imx6q.dtsi"
|
||||
#include "imx6qdl-gw54xx.dtsi"
|
||||
#include "imx6qdl-gw51xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 Quad GW51XX";
|
||||
|
|
|
@ -12,6 +12,19 @@
|
|||
pinctrl-0 = <&pinctrl_cubox_i_ir>;
|
||||
};
|
||||
|
||||
pwmleds {
|
||||
compatible = "pwm-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_cubox_i_pwm1>;
|
||||
|
||||
front {
|
||||
active-low;
|
||||
label = "imx6:red:front";
|
||||
max-brightness = <248>;
|
||||
pwms = <&pwm1 0 50000>;
|
||||
};
|
||||
};
|
||||
|
||||
regulators {
|
||||
compatible = "simple-bus";
|
||||
|
||||
|
@ -109,6 +122,10 @@
|
|||
>;
|
||||
};
|
||||
|
||||
pinctrl_cubox_i_pwm1: cubox-i-pwm1-front-led {
|
||||
fsl,pins = <MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0>;
|
||||
};
|
||||
|
||||
pinctrl_cubox_i_spdif: cubox-i-spdif {
|
||||
fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>;
|
||||
};
|
||||
|
@ -117,6 +134,14 @@
|
|||
fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0>;
|
||||
};
|
||||
|
||||
pinctrl_cubox_i_usbotg_id: cubox-i-usbotg-id {
|
||||
/*
|
||||
* The Cubox-i pulls this low, but as it's pointless
|
||||
* leaving it as a pull-up, even if it is just 10uA.
|
||||
*/
|
||||
fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
|
||||
};
|
||||
|
||||
pinctrl_cubox_i_usbotg_vbus: cubox-i-usbotg-vbus {
|
||||
fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x4001b0b0>;
|
||||
};
|
||||
|
@ -153,6 +178,8 @@
|
|||
};
|
||||
|
||||
&usbotg {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_cubox_i_usbotg_id>;
|
||||
vbus-supply = <®_usbotg_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -161,7 +161,7 @@
|
|||
status = "okay";
|
||||
|
||||
pmic: ltc3676@3c {
|
||||
compatible = "ltc,ltc3676";
|
||||
compatible = "lltc,ltc3676";
|
||||
reg = <0x3c>;
|
||||
|
||||
regulators {
|
||||
|
|
|
@ -220,7 +220,7 @@
|
|||
};
|
||||
|
||||
pmic: ltc3676@3c {
|
||||
compatible = "ltc,ltc3676";
|
||||
compatible = "lltc,ltc3676";
|
||||
reg = <0x3c>;
|
||||
|
||||
regulators {
|
||||
|
@ -288,7 +288,7 @@
|
|||
codec: sgtl5000@0a {
|
||||
compatible = "fsl,sgtl5000";
|
||||
reg = <0x0a>;
|
||||
clocks = <&clks 169>;
|
||||
clocks = <&clks 201>;
|
||||
VDDA-supply = <®_1p8v>;
|
||||
VDDIO-supply = <®_3p3v>;
|
||||
};
|
||||
|
|
|
@ -234,7 +234,7 @@
|
|||
};
|
||||
|
||||
pmic: ltc3676@3c {
|
||||
compatible = "ltc,ltc3676";
|
||||
compatible = "lltc,ltc3676";
|
||||
reg = <0x3c>;
|
||||
|
||||
regulators {
|
||||
|
|
|
@ -10,14 +10,6 @@
|
|||
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_microsom_usbotg: microsom-usbotg {
|
||||
/*
|
||||
* Similar to pinctrl_usbotg_2, but we want it
|
||||
* pulled down for a fixed host connection.
|
||||
*/
|
||||
fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -26,8 +18,3 @@
|
|||
pinctrl-0 = <&pinctrl_microsom_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_microsom_usbotg>;
|
||||
};
|
||||
|
|
|
@ -686,7 +686,7 @@
|
|||
compatible = "fsl,imx6sl-fec", "fsl,imx25-fec";
|
||||
reg = <0x02188000 0x4000>;
|
||||
interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks IMX6SL_CLK_ENET_REF>,
|
||||
clocks = <&clks IMX6SL_CLK_ENET>,
|
||||
<&clks IMX6SL_CLK_ENET_REF>;
|
||||
clock-names = "ipg", "ahb";
|
||||
status = "disabled";
|
||||
|
|
|
@ -105,7 +105,6 @@
|
|||
compatible = "ethernet-phy-id0141.0cb0",
|
||||
"ethernet-phy-ieee802.3-c22";
|
||||
reg = <0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
ethphy1: ethernet-phy@1 {
|
||||
|
@ -113,7 +112,6 @@
|
|||
compatible = "ethernet-phy-id0141.0cb0",
|
||||
"ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -121,6 +119,7 @@
|
|||
status = "okay";
|
||||
ethernet0-port@0 {
|
||||
phy-handle = <ðphy0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -128,5 +127,6 @@
|
|||
status = "okay";
|
||||
ethernet1-port@0 {
|
||||
phy-handle = <ðphy1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
};
|
||||
|
|
|
@ -251,6 +251,11 @@
|
|||
codec {
|
||||
};
|
||||
};
|
||||
|
||||
twl_power: power {
|
||||
compatible = "ti,twl4030-power-beagleboard-xm", "ti,twl4030-power-idle-osc-off";
|
||||
ti,use_poweroff;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -301,6 +306,7 @@
|
|||
};
|
||||
|
||||
&uart3 {
|
||||
interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins>;
|
||||
};
|
||||
|
|
|
@ -50,6 +50,13 @@
|
|||
gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
&twl {
|
||||
twl_power: power {
|
||||
compatible = "ti,twl4030-power-omap3-evm", "ti,twl4030-power-idle";
|
||||
ti,use_poweroff;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
|
|
@ -351,6 +351,11 @@
|
|||
compatible = "ti,twl4030-audio";
|
||||
ti,enable-vibra = <1>;
|
||||
};
|
||||
|
||||
twl_power: power {
|
||||
compatible = "ti,twl4030-power-n900";
|
||||
ti,use_poweroff;
|
||||
};
|
||||
};
|
||||
|
||||
&twl_keypad {
|
||||
|
|
|
@ -45,7 +45,6 @@
|
|||
|
||||
operating-points = <
|
||||
/* kHz uV */
|
||||
500000 880000
|
||||
1000000 1060000
|
||||
1500000 1250000
|
||||
>;
|
||||
|
|
|
@ -540,9 +540,9 @@
|
|||
#clock-cells = <0>;
|
||||
clock-output-names = "sd1";
|
||||
};
|
||||
sd2_clk: sd3_clk@e615007c {
|
||||
sd2_clk: sd3_clk@e615026c {
|
||||
compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
|
||||
reg = <0 0xe615007c 0 4>;
|
||||
reg = <0 0xe615026c 0 4>;
|
||||
clocks = <&pll1_div2_clk>;
|
||||
#clock-cells = <0>;
|
||||
clock-output-names = "sd2";
|
||||
|
|
|
@ -4,7 +4,7 @@
|
|||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "ste-nomadik-stn8815.dtsi"
|
||||
#include "ste-nomadik-stn8815.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Calao Systems USB-S8815";
|
||||
|
|
|
@ -1,7 +1,9 @@
|
|||
/*
|
||||
* Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
|
||||
*/
|
||||
/include/ "skeleton.dtsi"
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
|
@ -842,8 +844,7 @@
|
|||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
cd-gpios = <&gpio3 15 0x1>;
|
||||
cd-inverted;
|
||||
cd-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
|
||||
vmmc-supply = <&vmmc_regulator>;
|
||||
|
|
|
@ -169,8 +169,8 @@
|
|||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_mii0>;
|
||||
clock-names = "stmmaceth";
|
||||
clocks = <&clk_s_a1_ls CLK_GMAC0_PHY>;
|
||||
clock-names = "stmmaceth", "sti-ethclk";
|
||||
clocks = <&clk_s_a1_ls CLK_ICN_IF_2>, <&clk_s_a1_ls CLK_GMAC0_PHY>;
|
||||
};
|
||||
|
||||
ethernet1: dwmac@fef08000 {
|
||||
|
@ -192,8 +192,8 @@
|
|||
reset-names = "stmmaceth";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_mii1>;
|
||||
clock-names = "stmmaceth";
|
||||
clocks = <&clk_s_a0_ls CLK_ETH1_PHY>;
|
||||
clock-names = "stmmaceth", "sti-ethclk";
|
||||
clocks = <&clk_s_a0_ls CLK_ICN_REG>, <&clk_s_a0_ls CLK_ETH1_PHY>;
|
||||
};
|
||||
|
||||
rc: rc@fe518000 {
|
||||
|
|
|
@ -175,8 +175,8 @@
|
|||
reset-names = "stmmaceth";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_mii0>;
|
||||
clock-names = "stmmaceth";
|
||||
clocks = <&clk_s_a1_ls CLK_GMAC0_PHY>;
|
||||
clock-names = "stmmaceth", "sti-ethclk";
|
||||
clocks = <&clk_s_a1_ls CLK_ICN_IF_2>, <&clk_s_a1_ls CLK_GMAC0_PHY>;
|
||||
};
|
||||
|
||||
ethernet1: dwmac@fef08000 {
|
||||
|
@ -197,8 +197,8 @@
|
|||
reset-names = "stmmaceth";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_mii1>;
|
||||
clock-names = "stmmaceth";
|
||||
clocks = <&clk_s_a0_ls CLK_ETH1_PHY>;
|
||||
clock-names = "stmmaceth", "sti-ethclk";
|
||||
clocks = <&clk_s_a0_ls CLK_ICN_REG>, <&clk_s_a0_ls CLK_ETH1_PHY>;
|
||||
};
|
||||
|
||||
rc: rc@fe518000 {
|
||||
|
|
Loading…
Reference in a new issue