Merge branch 'for-next/dts'
This commit is contained in:
Sascha Hauer
commit
e5ed4bea79
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@ -17,7 +17,8 @@ Required properties:
|
|||
- #clock-cells: from common clock binding; shall be set to 1.
|
||||
- clocks: from common clock binding; list of parent clock
|
||||
handles, shall be xtal reference clock or xtal and clkin for
|
||||
si5351c only.
|
||||
si5351c only. Corresponding clock input names are "xtal" and
|
||||
"clkin" respectively.
|
||||
- #address-cells: shall be set to 1.
|
||||
- #size-cells: shall be set to 0.
|
||||
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||||
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|
@ -71,6 +72,7 @@ i2c-master-node {
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|||
|
||||
/* connect xtal input to 25MHz reference */
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||||
clocks = <&ref25>;
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||||
clock-names = "xtal";
|
||||
|
||||
/* connect xtal input as source of pll0 and pll1 */
|
||||
silabs,pll-source = <0 0>, <1 0>;
|
||||
|
|
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|||
|
|
@ -32,8 +32,8 @@ Example:
|
|||
touchscreen-fuzz-x = <4>;
|
||||
touchscreen-fuzz-y = <7>;
|
||||
touchscreen-fuzz-pressure = <2>;
|
||||
touchscreen-max-x = <4096>;
|
||||
touchscreen-max-y = <4096>;
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||||
touchscreen-size-x = <4096>;
|
||||
touchscreen-size-y = <4096>;
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||||
touchscreen-max-pressure = <2048>;
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||||
|
||||
ti,x-plate-ohms = <280>;
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||||
|
|
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|||
|
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@ -8,8 +8,8 @@ Required properties:
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|||
is not Linux-only, but in case of Linux, see the "m25p_ids"
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||||
table in drivers/mtd/devices/m25p80.c for the list of supported
|
||||
chips.
|
||||
Must also include "nor-jedec" for any SPI NOR flash that can be
|
||||
identified by the JEDEC READ ID opcode (0x9F).
|
||||
Must also include "jedec,spi-nor" for any SPI NOR flash that can
|
||||
be identified by the JEDEC READ ID opcode (0x9F).
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||||
- reg : Chip-Select number
|
||||
- spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at
|
||||
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||||
|
|
@ -25,7 +25,7 @@ Example:
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|||
flash: m25p80@0 {
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||||
#address-cells = <1>;
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||||
#size-cells = <1>;
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||||
compatible = "spansion,m25p80", "nor-jedec";
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compatible = "spansion,m25p80", "jedec,spi-nor";
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||||
reg = <0>;
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||||
spi-max-frequency = <40000000>;
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||||
m25p,fast-read;
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||||
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|
@ -3,7 +3,8 @@
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|||
Required properties:
|
||||
- compatible: Should be "cdns,[<chip>-]{emac}"
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||||
Use "cdns,at91rm9200-emac" Atmel at91rm9200 SoC.
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||||
or the generic form: "cdns,emac".
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||||
Use "cdns,zynq-gem" Xilinx Zynq-7xxx SoC.
|
||||
Or the generic form: "cdns,emac".
|
||||
- reg: Address and length of the register set for the device
|
||||
- interrupts: Should contain macb interrupt
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||||
- phy-mode: see ethernet.txt file in the same directory.
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||||
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|
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|||
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@ -15,10 +15,8 @@ Optional properties:
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|||
- phys: phandle + phy specifier pair
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||||
- phy-names: must be "usb"
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||||
- dmas: Must contain a list of references to DMA specifiers.
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||||
- dma-names : Must contain a list of DMA names:
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||||
- tx0 ... tx<n>
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||||
- rx0 ... rx<n>
|
||||
- This <n> means DnFIFO in USBHS module.
|
||||
- dma-names : named "ch%d", where %d is the channel number ranging from zero
|
||||
to the number of channels (DnFIFOs) minus one.
|
||||
|
||||
Example:
|
||||
usbhs: usb@e6590000 {
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||||
|
|
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|||
|
|
@ -223,6 +223,25 @@
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|||
/include/ "tps65217.dtsi"
|
||||
|
||||
&tps {
|
||||
/*
|
||||
* Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
|
||||
* mode") at poweroff. Most BeagleBone versions do not support RTC-only
|
||||
* mode and risk hardware damage if this mode is entered.
|
||||
*
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||||
* For details, see linux-omap mailing list May 2015 thread
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||||
* [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
|
||||
* In particular, messages:
|
||||
* http://www.spinics.net/lists/linux-omap/msg118585.html
|
||||
* http://www.spinics.net/lists/linux-omap/msg118615.html
|
||||
*
|
||||
* You can override this later with
|
||||
* &tps { /delete-property/ ti,pmic-shutdown-controller; }
|
||||
* if you want to use RTC-only mode and made sure you are not affected
|
||||
* by the hardware problems. (Tip: double-check by performing a current
|
||||
* measurement after shutdown: it should be less than 1 mA.)
|
||||
*/
|
||||
ti,pmic-shutdown-controller;
|
||||
|
||||
regulators {
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||||
dcdc1_reg: regulator@0 {
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||||
regulator-name = "vdds_dpr";
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||||
|
|
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|
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@ -80,7 +80,3 @@
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|||
status = "okay";
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||||
};
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||||
};
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||||
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||||
&rtc {
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||||
system-power-controller;
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||||
};
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||||
|
|
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|||
|
|
@ -654,7 +654,7 @@
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|||
wlcore: wlcore@2 {
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||||
compatible = "ti,wl1271";
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||||
reg = <2>;
|
||||
interrupt-parent = <&gpio1>;
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||||
interrupt-parent = <&gpio0>;
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||||
interrupts = <31 IRQ_TYPE_LEVEL_HIGH>; /* gpio 31 */
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||||
ref-clock-frequency = <38400000>;
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||||
};
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||||
|
|
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@ -12,7 +12,7 @@
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|||
#clock-cells = <0>;
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||||
compatible = "ti,am35xx-gate-clock";
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clocks = <&ipss_ick>;
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reg = <0x059c>;
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reg = <0x032c>;
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ti,bit-shift = <1>;
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};
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||||
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||||
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@ -20,7 +20,7 @@
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#clock-cells = <0>;
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||||
compatible = "ti,gate-clock";
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||||
clocks = <&rmii_ck>;
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reg = <0x059c>;
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||||
reg = <0x032c>;
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||||
ti,bit-shift = <9>;
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||||
};
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||||
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@ -28,7 +28,7 @@
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|||
#clock-cells = <0>;
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||||
compatible = "ti,am35xx-gate-clock";
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||||
clocks = <&ipss_ick>;
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||||
reg = <0x059c>;
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reg = <0x032c>;
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ti,bit-shift = <2>;
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};
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||||
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@ -36,7 +36,7 @@
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|||
#clock-cells = <0>;
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||||
compatible = "ti,gate-clock";
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clocks = <&pclk_ck>;
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reg = <0x059c>;
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reg = <0x032c>;
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ti,bit-shift = <10>;
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||||
};
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||||
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||||
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@ -44,7 +44,7 @@
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|||
#clock-cells = <0>;
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||||
compatible = "ti,am35xx-gate-clock";
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||||
clocks = <&ipss_ick>;
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||||
reg = <0x059c>;
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||||
reg = <0x032c>;
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||||
ti,bit-shift = <0>;
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||||
};
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||||
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||||
|
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@ -52,7 +52,7 @@
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|||
#clock-cells = <0>;
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||||
compatible = "ti,gate-clock";
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clocks = <&sys_ck>;
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reg = <0x059c>;
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||||
reg = <0x032c>;
|
||||
ti,bit-shift = <8>;
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||||
};
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||||
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@ -60,7 +60,7 @@
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|||
#clock-cells = <0>;
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||||
compatible = "ti,am35xx-gate-clock";
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||||
clocks = <&sys_ck>;
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||||
reg = <0x059c>;
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||||
reg = <0x032c>;
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ti,bit-shift = <3>;
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||||
};
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||||
};
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||||
|
|
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@ -69,7 +69,7 @@
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|||
mainpll: mainpll {
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||||
compatible = "fixed-clock";
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||||
#clock-cells = <0>;
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||||
clock-frequency = <2000000000>;
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clock-frequency = <1000000000>;
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||||
};
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/* 25 MHz reference crystal */
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refclk: oscillator {
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||||
|
|
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|||
|
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@ -585,7 +585,7 @@
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|||
mainpll: mainpll {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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||||
clock-frequency = <2000000000>;
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||||
clock-frequency = <1000000000>;
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||||
};
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||||
/* 25 MHz reference crystal */
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||||
|
|
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@ -502,7 +502,7 @@
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|||
mainpll: mainpll {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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||||
clock-frequency = <2000000000>;
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||||
clock-frequency = <1000000000>;
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};
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||||
};
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};
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|
|
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@ -95,6 +95,11 @@
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|||
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||||
internal-regs {
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||||
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||||
rtc@10300 {
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/* No crystal connected to the internal RTC */
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status = "disabled";
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||||
};
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||||
/* J10: VCC, NC, RX, NC, TX, GND */
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serial@12000 {
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status = "okay";
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|
|
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@ -382,7 +382,7 @@
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|||
ti,hwmods = "usb_otg_hs";
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usb0: usb@47401000 {
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compatible = "ti,musb-am33xx";
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compatible = "ti,musb-dm816";
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reg = <0x47401400 0x400
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0x47401000 0x200>;
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reg-names = "mc", "control";
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@ -422,7 +422,7 @@
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|||
};
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||||
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||||
usb1: usb@47401800 {
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compatible = "ti,musb-am33xx";
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compatible = "ti,musb-dm816";
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||||
reg = <0x47401c00 0x400
|
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0x47401800 0x200>;
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reg-names = "mc", "control";
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|
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@ -87,6 +87,7 @@
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|||
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/* connect xtal input to 25MHz reference */
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clocks = <&ref25>;
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clock-names = "xtal";
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/* connect xtal input as source of pll0 and pll1 */
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silabs,pll-source = <0 0>, <1 0>;
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|
|
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|||
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|
@ -736,7 +736,7 @@
|
|||
|
||||
display-timings {
|
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timing-0 {
|
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clock-frequency = <0>;
|
||||
clock-frequency = <57153600>;
|
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hactive = <720>;
|
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vactive = <1280>;
|
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hfront-porch = <5>;
|
||||
|
|
|
|||
|
|
@ -711,6 +711,7 @@
|
|||
num-slots = <1>;
|
||||
broken-cd;
|
||||
cap-sdio-irq;
|
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keep-power-in-suspend;
|
||||
card-detect-delay = <200>;
|
||||
clock-frequency = <400000000>;
|
||||
samsung,dw-mshc-ciu-div = <1>;
|
||||
|
|
|
|||
|
|
@ -674,6 +674,7 @@
|
|||
num-slots = <1>;
|
||||
broken-cd;
|
||||
cap-sdio-irq;
|
||||
keep-power-in-suspend;
|
||||
card-detect-delay = <200>;
|
||||
clock-frequency = <400000000>;
|
||||
samsung,dw-mshc-ciu-div = <1>;
|
||||
|
|
|
|||
|
|
@ -533,7 +533,7 @@
|
|||
|
||||
fec: ethernet@1002b000 {
|
||||
compatible = "fsl,imx27-fec";
|
||||
reg = <0x1002b000 0x4000>;
|
||||
reg = <0x1002b000 0x1000>;
|
||||
interrupts = <50>;
|
||||
clocks = <&clks IMX27_CLK_FEC_IPG_GATE>,
|
||||
<&clks IMX27_CLK_FEC_AHB_GATE>;
|
||||
|
|
|
|||
|
|
@ -110,6 +110,8 @@
|
|||
nand@0,0 {
|
||||
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
|
||||
nand-bus-width = <16>;
|
||||
gpmc,device-width = <2>;
|
||||
ti,nand-ecc-opt = "sw";
|
||||
|
||||
gpmc,sync-clk-ps = <0>;
|
||||
gpmc,cs-on-ns = <0>;
|
||||
|
|
|
|||
|
|
@ -832,8 +832,8 @@
|
|||
touchscreen-fuzz-x = <4>;
|
||||
touchscreen-fuzz-y = <7>;
|
||||
touchscreen-fuzz-pressure = <2>;
|
||||
touchscreen-max-x = <4096>;
|
||||
touchscreen-max-y = <4096>;
|
||||
touchscreen-size-x = <4096>;
|
||||
touchscreen-size-y = <4096>;
|
||||
touchscreen-max-pressure = <2048>;
|
||||
|
||||
ti,x-plate-ohms = <280>;
|
||||
|
|
|
|||
|
|
@ -826,7 +826,7 @@
|
|||
<&tegra_car TEGRA124_CLK_PLL_U>,
|
||||
<&tegra_car TEGRA124_CLK_USBD>;
|
||||
clock-names = "reg", "pll_u", "utmi-pads";
|
||||
resets = <&tegra_car 59>, <&tegra_car 22>;
|
||||
resets = <&tegra_car 22>, <&tegra_car 22>;
|
||||
reset-names = "usb", "utmi-pads";
|
||||
nvidia,hssync-start-delay = <0>;
|
||||
nvidia,idle-wait-delay = <17>;
|
||||
|
|
@ -838,6 +838,7 @@
|
|||
nvidia,hssquelch-level = <2>;
|
||||
nvidia,hsdiscon-level = <5>;
|
||||
nvidia,xcvr-hsslew = <12>;
|
||||
nvidia,has-utmi-pad-registers;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -862,7 +863,7 @@
|
|||
<&tegra_car TEGRA124_CLK_PLL_U>,
|
||||
<&tegra_car TEGRA124_CLK_USBD>;
|
||||
clock-names = "reg", "pll_u", "utmi-pads";
|
||||
resets = <&tegra_car 22>, <&tegra_car 22>;
|
||||
resets = <&tegra_car 58>, <&tegra_car 22>;
|
||||
reset-names = "usb", "utmi-pads";
|
||||
nvidia,hssync-start-delay = <0>;
|
||||
nvidia,idle-wait-delay = <17>;
|
||||
|
|
@ -874,7 +875,6 @@
|
|||
nvidia,hssquelch-level = <2>;
|
||||
nvidia,hsdiscon-level = <5>;
|
||||
nvidia,xcvr-hsslew = <12>;
|
||||
nvidia,has-utmi-pad-registers;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -899,7 +899,7 @@
|
|||
<&tegra_car TEGRA124_CLK_PLL_U>,
|
||||
<&tegra_car TEGRA124_CLK_USBD>;
|
||||
clock-names = "reg", "pll_u", "utmi-pads";
|
||||
resets = <&tegra_car 58>, <&tegra_car 22>;
|
||||
resets = <&tegra_car 59>, <&tegra_car 22>;
|
||||
reset-names = "usb", "utmi-pads";
|
||||
nvidia,hssync-start-delay = <0>;
|
||||
nvidia,idle-wait-delay = <17>;
|
||||
|
|
|
|||
|
|
@ -191,6 +191,7 @@
|
|||
compatible = "arm,cortex-a15-pmu";
|
||||
interrupts = <0 68 4>,
|
||||
<0 69 4>;
|
||||
interrupt-affinity = <&cpu0>, <&cpu1>;
|
||||
};
|
||||
|
||||
oscclk6a: oscclk6a {
|
||||
|
|
|
|||
|
|
@ -33,28 +33,28 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
A9_0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
A9_1: cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <1>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
cpu@2 {
|
||||
A9_2: cpu@2 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <2>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
cpu@3 {
|
||||
A9_3: cpu@3 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <3>;
|
||||
|
|
@ -170,6 +170,7 @@
|
|||
compatible = "arm,pl310-cache";
|
||||
reg = <0x1e00a000 0x1000>;
|
||||
interrupts = <0 43 4>;
|
||||
cache-unified;
|
||||
cache-level = <2>;
|
||||
arm,data-latency = <1 1 1>;
|
||||
arm,tag-latency = <1 1 1>;
|
||||
|
|
@ -181,6 +182,8 @@
|
|||
<0 61 4>,
|
||||
<0 62 4>,
|
||||
<0 63 4>;
|
||||
interrupt-affinity = <&A9_0>, <&A9_1>, <&A9_2>, <&A9_3>;
|
||||
|
||||
};
|
||||
|
||||
dcc {
|
||||
|
|
|
|||
|
|
@ -193,7 +193,7 @@
|
|||
};
|
||||
|
||||
gem0: ethernet@e000b000 {
|
||||
compatible = "cdns,gem";
|
||||
compatible = "cdns,zynq-gem";
|
||||
reg = <0xe000b000 0x1000>;
|
||||
status = "disabled";
|
||||
interrupts = <0 22 4>;
|
||||
|
|
@ -204,7 +204,7 @@
|
|||
};
|
||||
|
||||
gem1: ethernet@e000c000 {
|
||||
compatible = "cdns,gem";
|
||||
compatible = "cdns,zynq-gem";
|
||||
reg = <0xe000c000 0x1000>;
|
||||
status = "disabled";
|
||||
interrupts = <0 45 4>;
|
||||
|
|
|
|||
|
|
@ -21,6 +21,20 @@
|
|||
clock-output-names = "juno_mb:clk25mhz";
|
||||
};
|
||||
|
||||
v2m_refclk1mhz: refclk1mhz {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <1000000>;
|
||||
clock-output-names = "juno_mb:refclk1mhz";
|
||||
};
|
||||
|
||||
v2m_refclk32khz: refclk32khz {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <32768>;
|
||||
clock-output-names = "juno_mb:refclk32khz";
|
||||
};
|
||||
|
||||
motherboard {
|
||||
compatible = "arm,vexpress,v2p-p1", "simple-bus";
|
||||
#address-cells = <2>; /* SMB chipselect number and offset */
|
||||
|
|
@ -66,6 +80,15 @@
|
|||
#size-cells = <1>;
|
||||
ranges = <0 3 0 0x200000>;
|
||||
|
||||
v2m_sysctl: sysctl@020000 {
|
||||
compatible = "arm,sp810", "arm,primecell";
|
||||
reg = <0x020000 0x1000>;
|
||||
clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&mb_clk24mhz>;
|
||||
clock-names = "refclk", "timclk", "apb_pclk";
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
|
||||
};
|
||||
|
||||
mmci@050000 {
|
||||
compatible = "arm,pl180", "arm,primecell";
|
||||
reg = <0x050000 0x1000>;
|
||||
|
|
@ -106,16 +129,16 @@
|
|||
compatible = "arm,sp804", "arm,primecell";
|
||||
reg = <0x110000 0x10000>;
|
||||
interrupts = <9>;
|
||||
clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
|
||||
clock-names = "timclken1", "apb_pclk";
|
||||
clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&mb_clk24mhz>;
|
||||
clock-names = "timclken1", "timclken2", "apb_pclk";
|
||||
};
|
||||
|
||||
v2m_timer23: timer@120000 {
|
||||
compatible = "arm,sp804", "arm,primecell";
|
||||
reg = <0x120000 0x10000>;
|
||||
interrupts = <9>;
|
||||
clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
|
||||
clock-names = "timclken1", "apb_pclk";
|
||||
clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&mb_clk24mhz>;
|
||||
clock-names = "timclken1", "timclken2", "apb_pclk";
|
||||
};
|
||||
|
||||
rtc@170000 {
|
||||
|
|
|
|||
|
|
@ -16,7 +16,8 @@
|
|||
#include "mt8173.dtsi"
|
||||
|
||||
/ {
|
||||
model = "mediatek,mt8173-evb";
|
||||
model = "MediaTek MT8173 evaluation board";
|
||||
compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
|
|
|
|||
Loading…
Reference in New Issue