PPC/PCM030: fix reference clock

In order to enable and use USB/OHCI on the MPC5200 the USB PLL register must be
set.

It's not easy to find a correct value for this register, it seems it depends on
the used external reference frequency and some other 'magic' things. There are
some values out in the wild for the 33,333333 MHz and 33,333000 MHz reference
frequency case, but they are not consistent over the boards.

The value used here in this change for the USB PLL register is from the first
days of support for this platform and works at least on the reference
baseboard.

Signed-off-by: Juergen Borleis <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Juergen Borleis 2015-07-31 11:03:48 +02:00 committed by Sascha Hauer
parent 2afe1f23ce
commit e841fd10b0
2 changed files with 8 additions and 1 deletions

View file

@ -25,7 +25,7 @@
#include <mach/mpc5xxx.h>
#define CFG_MPC5XXX_CLKIN 33333333 /* ... running at 33.333333MHz */
#define CFG_MPC5XXX_CLKIN 33333000 /* ... running at 33.333MHz */
#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
#define CFG_HID0_FINAL HID0_ICE

View file

@ -32,6 +32,7 @@
#include <memory.h>
#include <linux/sizes.h>
#include <linux/stat.h>
#include <asm/io.h>
#include <fs.h>
static struct fec_platform_data fec_info = {
@ -145,6 +146,12 @@ void initdram (int board_type)
*(vu_long *)MPC5XXX_CS_BURST = 0x00000000;
*(vu_long *)MPC5XXX_CS_DEADCYCLE = 0x33333333;
/*
* Make USB work due to the special base crystal frequency:
* 33,3330MHz * 16 = 533,328MHz main clock, but should be 528 MHz Clock
*/
out_be32((void *)MPC5XXX_CDM_48_FDC, 0x00015555);
mpc5200_setup_bus_clocks(1, 4);
if (get_pc() > SZ_128M) {