From e90c4f943574a5da664e0e6307c74ed5d49b1f26 Mon Sep 17 00:00:00 2001 From: Jan Luebbe Date: Tue, 21 Apr 2015 11:18:21 +0200 Subject: [PATCH] davinci_emac: add support for version 1 --- drivers/net/Kconfig | 2 +- drivers/net/davinci_emac.c | 29 +++++++++++++++++++---------- 2 files changed, 20 insertions(+), 11 deletions(-) diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index b723a127f..b4745cacd 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -60,7 +60,7 @@ config DRIVER_NET_CPSW config DRIVER_NET_DAVINCI_EMAC bool "TI Davinci/OMAP EMAC ethernet driver" - depends on ARCH_OMAP3 + depends on ARCH_OMAP3 || ARCH_DAVINCI select PHYLIB config DRIVER_NET_DESIGNWARE diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c index 056ffe28b..c452cc768 100644 --- a/drivers/net/davinci_emac.c +++ b/drivers/net/davinci_emac.c @@ -39,6 +39,8 @@ * */ +//#define DEBUG + #include #include #include @@ -48,7 +50,8 @@ #include #include #include -#include +#include +//#include #include #include "davinci_emac.h" @@ -74,6 +77,7 @@ struct davinci_emac_priv { unsigned char *emac_rx_buffers; /* [EMAC_MAX_RX_BUFFERS * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)] */ /* PHY-specific information */ + uint32_t mdio_clkdiv; phy_interface_t interface; uint8_t phy_addr; uint32_t phy_flags; @@ -105,13 +109,9 @@ static inline void __iomem *HW_TO_BD(uint32_t x) static void davinci_eth_mdio_enable(struct davinci_emac_priv *priv) { - uint32_t clkdiv; - - clkdiv = (EMAC_MDIO_BUS_FREQ / EMAC_MDIO_CLOCK_FREQ) - 1; - dev_dbg(priv->dev, "mdio_enable + 0x%08x\n", readl(priv->adap_mdio + EMAC_MDIO_CONTROL)); - writel((clkdiv & 0xff) | + writel((priv->mdio_clkdiv & 0xff) | MDIO_CONTROL_ENABLE | MDIO_CONTROL_FAULT | MDIO_CONTROL_FAULT_ENABLE, @@ -197,9 +197,10 @@ static int davinci_emac_init(struct eth_device *edev) static int davinci_emac_open(struct eth_device *edev) { struct davinci_emac_priv *priv = edev->priv; - uint32_t clkdiv, cnt; + uint32_t cnt; void __iomem *rx_desc; unsigned long mac_hi, mac_lo; + struct clk *clk; int ret; dev_dbg(priv->dev, "+ emac_open\n"); @@ -212,8 +213,12 @@ static int davinci_emac_open(struct eth_device *edev) /* Reset EMAC module and disable interrupts in wrapper */ writel(1, priv->adap_emac + EMAC_SOFTRESET); while (readl(priv->adap_emac + EMAC_SOFTRESET) != 0); + dev_dbg(priv->dev, "emac reset done\n"); + +#if 0 writel(1, priv->adap_ewrap + EMAC_EWRAP_SOFTRESET); while (readl(priv->adap_ewrap + EMAC_EWRAP_SOFTRESET) != 0); + dev_dbg(priv->dev, "emac wrap reset done\n"); writel(0, priv->adap_ewrap + EMAC_EWRAP_C0RXEN); writel(0, priv->adap_ewrap + EMAC_EWRAP_C1RXEN); @@ -224,6 +229,7 @@ static int davinci_emac_open(struct eth_device *edev) writel(0, priv->adap_ewrap + EMAC_EWRAP_C0MISCEN); writel(0, priv->adap_ewrap + EMAC_EWRAP_C1MISCEN); writel(0, priv->adap_ewrap + EMAC_EWRAP_C2MISCEN); +#endif rx_desc = priv->emac_rx_desc; @@ -300,8 +306,10 @@ static int davinci_emac_open(struct eth_device *edev) priv->adap_emac + EMAC_MACCONTROL); /* Init MDIO & get link state */ - clkdiv = (EMAC_MDIO_BUS_FREQ / EMAC_MDIO_CLOCK_FREQ) - 1; - writel((clkdiv & 0xff) | MDIO_CONTROL_ENABLE | MDIO_CONTROL_FAULT, + clk = clk_get(priv->dev, 0); + clk_enable(clk); + priv->mdio_clkdiv = (1000000 / clk_get_rate(clk)) - 1; + writel((priv->mdio_clkdiv & 0xff) | MDIO_CONTROL_ENABLE | MDIO_CONTROL_FAULT, priv->adap_mdio + EMAC_MDIO_CONTROL); /* Start receive process */ @@ -371,6 +379,7 @@ static void davinci_emac_halt(struct eth_device *edev) /* Reset EMAC module and disable interrupts in wrapper */ writel(1, priv->adap_emac + EMAC_SOFTRESET); +#if 0 writel(1, priv->adap_ewrap + EMAC_EWRAP_SOFTRESET); writel(0, priv->adap_ewrap + EMAC_EWRAP_C0RXEN); @@ -382,7 +391,7 @@ static void davinci_emac_halt(struct eth_device *edev) writel(0, priv->adap_ewrap + EMAC_EWRAP_C0MISCEN); writel(0, priv->adap_ewrap + EMAC_EWRAP_C1MISCEN); writel(0, priv->adap_ewrap + EMAC_EWRAP_C2MISCEN); - +#endif dev_dbg(priv->dev, "- emac_halt\n"); }