From ee3e2a83927dc4123e3acd970ccfcad2b6a4d059 Mon Sep 17 00:00:00 2001 From: Antony Pavlov Date: Sat, 26 Jan 2013 20:52:37 +0400 Subject: [PATCH] MIPS: introduce ram0 regions register function On MIPS there are two segments in CPU address space that can be used for untranslated memory access: KSEG0 and KSEG1. KSEG0 is used for cached access and KSEG1 is used for uncached one. The instroduced mips_add_ram0() function registers two address regions for memory access: one in KSEG0 and the other one in KSEG1. Signed-off-by: Antony Pavlov Signed-off-by: Sascha Hauer --- arch/mips/include/asm/memory.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 arch/mips/include/asm/memory.h diff --git a/arch/mips/include/asm/memory.h b/arch/mips/include/asm/memory.h new file mode 100644 index 000000000..2aa28b768 --- /dev/null +++ b/arch/mips/include/asm/memory.h @@ -0,0 +1,12 @@ +#ifndef __ASM_MIPS_MEMORY_H +#define __ASM_MIPS_MEMORY_H + +#include +#include + +static inline void mips_add_ram0(resource_size_t size) +{ + barebox_add_memory_bank("kseg0_ram0", KSEG0, size); + barebox_add_memory_bank("kseg1_ram0", KSEG1, size); +} +#endif /* __ASM_MIPS_MEMORY_H */