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ARM: AM33xx: Make mpu pll configurable by lowlevel board code 

Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Teresa Gámez 2013-07-09 11:23:19 +02:00 committed by Sascha Hauer
parent 692db70b61
commit f0c0d46f64
4 changed files with 5 additions and 5 deletions
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2
arch/arm/boards/beaglebone/lowlevel.c
View File

@ -197,7 +197,7 @@ void beaglebone_sram_init(void)
u32 regVal, uart_base;
/* Setup the PLLs and the clocks for the peripherals */
pll_init();
pll_init(MPUPLL_M_500);
beaglebone_config_ddr();

2
arch/arm/boards/pcm051/lowlevel.c
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@ -158,7 +158,7 @@ void pcm051_sram_init(void)
u32 regVal, uart_base;
/* Setup the PLLs and the clocks for the peripherals */
pll_init();
pll_init(MPUPLL_M_600);
pcm051_config_ddr();

4
arch/arm/mach-omap/am33xx_clock.c
View File

@ -294,9 +294,9 @@ void enable_ddr_clocks(void)
/*
* Configure the PLL/PRCM for necessary peripherals
*/
void pll_init()
void pll_init(int mpupll_M)
{
mpu_pll_config(MPUPLL_M_500);
mpu_pll_config(mpupll_M);
core_pll_config();
per_pll_config();
ddr_pll_config();

2
arch/arm/mach-omap/include/mach/am33xx-clock.h
View File

@ -187,7 +187,7 @@
#define CM_ALWON_GPMC_CLKCTRL CM_PER_GPMC_CLKCTRL
extern void pll_init(void);
extern void pll_init(int mpupll_M);
extern void enable_ddr_clocks(void);
#endif /* endif _AM33XX_CLOCKS_H_ */