ARM: i.MX: iim: make fuse blowing work on i.MX5
The i.MX5 iim has an additional bit in the CCM module which enables the supply. Add support for it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -28,6 +28,9 @@
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#include <io.h>
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#include <io.h>
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#include <mach/iim.h>
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#include <mach/iim.h>
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#include <mach/imx51-regs.h>
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#include <mach/imx53-regs.h>
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#include <mach/clock-imx51_53.h>
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#define DRIVERNAME "imx_iim"
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#define DRIVERNAME "imx_iim"
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#define IIM_NUM_BANKS 8
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#define IIM_NUM_BANKS 8
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@ -49,6 +52,11 @@ struct iim_priv {
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struct iim_bank *bank[IIM_NUM_BANKS];
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struct iim_bank *bank[IIM_NUM_BANKS];
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int write_enable;
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int write_enable;
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int sense_enable;
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int sense_enable;
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void (*supply)(int enable);
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};
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struct imx_iim_drvdata {
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void (*supply)(int enable);
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};
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};
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static struct iim_priv *imx_iim;
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static struct iim_priv *imx_iim;
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@ -192,10 +200,14 @@ static ssize_t imx_iim_cdev_write(struct cdev *cdev, const void *buf, size_t cou
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{
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{
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ulong size, i;
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ulong size, i;
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struct iim_bank *bank = container_of(cdev, struct iim_bank, cdev);
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struct iim_bank *bank = container_of(cdev, struct iim_bank, cdev);
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struct iim_priv *iim = bank->iim;
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size = min((loff_t)count, 32 - offset);
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size = min((loff_t)count, 32 - offset);
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if (IS_ENABLED(CONFIG_IMX_IIM_FUSE_BLOW) && bank->iim->write_enable) {
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if (IS_ENABLED(CONFIG_IMX_IIM_FUSE_BLOW) && bank->iim->write_enable) {
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if (iim->supply)
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iim->supply(1);
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for (i = 0; i < size; i++) {
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for (i = 0; i < size; i++) {
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int ret;
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int ret;
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@ -203,6 +215,10 @@ static ssize_t imx_iim_cdev_write(struct cdev *cdev, const void *buf, size_t cou
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if (ret < 0)
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if (ret < 0)
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return ret;
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return ret;
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}
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}
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if (iim->supply)
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iim->supply(0);
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} else {
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} else {
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for (i = 0; i < size; i++)
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for (i = 0; i < size; i++)
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((u8 *)bank->bankbase)[(offset+i)*4] = ((u8 *)buf)[i];
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((u8 *)bank->bankbase)[(offset+i)*4] = ((u8 *)buf)[i];
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@ -291,12 +307,18 @@ static int imx_iim_probe(struct device_d *dev)
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{
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{
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struct iim_priv *iim;
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struct iim_priv *iim;
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int i, ret;
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int i, ret;
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struct imx_iim_drvdata *drvdata = NULL;
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if (imx_iim)
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if (imx_iim)
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return -EBUSY;
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return -EBUSY;
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iim = xzalloc(sizeof(*iim));
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iim = xzalloc(sizeof(*iim));
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dev_get_drvdata(dev, (unsigned long *)&drvdata);
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if (drvdata && drvdata->supply)
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iim->supply = drvdata->supply;
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imx_iim = iim;
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imx_iim = iim;
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strcpy(iim->dev.name, "iim");
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strcpy(iim->dev.name, "iim");
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@ -328,9 +350,51 @@ static int imx_iim_probe(struct device_d *dev)
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return 0;
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return 0;
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}
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}
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static void imx5_iim_supply(void __iomem *ccm_base, int enable)
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{
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uint32_t val;
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val = readl(ccm_base + MX5_CCM_CGPR);
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if (enable)
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val |= 1 << 4;
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else
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val &= ~(1 << 4);
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writel(val, ccm_base + MX5_CCM_CGPR);
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}
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static void imx51_iim_supply(int enable)
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{
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imx5_iim_supply((void __iomem *)MX51_CCM_BASE_ADDR, enable);
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}
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static void imx53_iim_supply(int enable)
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{
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imx5_iim_supply((void __iomem *)MX53_CCM_BASE_ADDR, enable);
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}
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static struct imx_iim_drvdata imx27_drvdata = {
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};
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static struct imx_iim_drvdata imx51_drvdata = {
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.supply = imx51_iim_supply,
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};
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static struct imx_iim_drvdata imx53_drvdata = {
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.supply = imx53_iim_supply,
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};
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static __maybe_unused struct of_device_id imx_iim_dt_ids[] = {
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static __maybe_unused struct of_device_id imx_iim_dt_ids[] = {
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{
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{
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.compatible = "fsl,imx53-iim",
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.data = (unsigned long)&imx53_drvdata,
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}, {
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.compatible = "fsl,imx51-iim",
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.data = (unsigned long)&imx51_drvdata,
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}, {
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.compatible = "fsl,imx27-iim",
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.compatible = "fsl,imx27-iim",
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.data = (unsigned long)&imx27_drvdata,
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}, {
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}, {
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/* sentinel */
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/* sentinel */
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}
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}
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