clk: i.MX: Pass CLK_OPS_PARENT_ENABLE where necessary
CLK_OPS_PARENT_ENABLE was missing on some i.MX7 specific clocks. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -19,7 +19,7 @@ static inline struct clk *imx_clk_divider_np(const char *name, const char *paren
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static inline struct clk *imx_clk_divider2(const char *name, const char *parent,
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void __iomem *reg, u8 shift, u8 width)
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{
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return clk_divider(name, parent, reg, shift, width, 0);
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return clk_divider(name, parent, reg, shift, width, CLK_OPS_PARENT_ENABLE);
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}
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static inline struct clk *imx_clk_divider_table(const char *name,
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@ -53,7 +53,7 @@ static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
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static inline struct clk *imx_clk_mux2(const char *name, void __iomem *reg,
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u8 shift, u8 width, const char **parents, u8 num_parents)
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{
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return clk_mux(name, reg, shift, width, parents, num_parents, 0);
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return clk_mux(name, reg, shift, width, parents, num_parents, CLK_OPS_PARENT_ENABLE);
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}
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static inline struct clk *imx_clk_mux_p(const char *name, void __iomem *reg,
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@ -89,13 +89,13 @@ static inline struct clk *imx_clk_gate2_cgr(const char *name, const char *parent
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static inline struct clk *imx_clk_gate3(const char *name, const char *parent,
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void __iomem *reg, u8 shift)
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{
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return clk_gate(name, parent, reg, shift, CLK_SET_RATE_PARENT, 0);
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return clk_gate(name, parent, reg, shift, CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, 0);
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}
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static inline struct clk *imx_clk_gate4(const char *name, const char *parent,
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void __iomem *reg, u8 shift)
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{
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return clk_gate2(name, parent, reg, shift, 0x3, 0);
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return clk_gate2(name, parent, reg, shift, 0x3, CLK_OPS_PARENT_ENABLE);
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}
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struct clk *imx_clk_pllv1(const char *name, const char *parent,
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