arm: add highbank support
currently only tested under qemu qemu-system-arm -M highbank -nographic -m 4089 -kernel build/highbank/arch/arm/pbl/zbarebox -tftp "." -drive id=disk,if=ide,file=disk.img -device ide-drive,drive=disk,bus=ide.0 with: - timer (AMBA SP804) - uart (AMBA PL011) - gpio (AMBA PL061) - ahci - net (XGMAC) Cc: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
parent
59cfe5905b
commit
f6b23059c9
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@ -49,6 +49,16 @@ config ARCH_EP93XX
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select CPU_ARM920T
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select GENERIC_GPIO
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config ARCH_HIGHBANK
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bool "Calxeda Highbank"
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select HAS_DEBUG_LL
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select CPU_V7
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select ARM_AMBA
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select AMBA_SP804
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select CLKDEV_LOOKUP
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select COMMON_CLK
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select GPIOLIB
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config ARCH_IMX
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bool "Freescale iMX-based"
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select GENERIC_GPIO
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@ -117,6 +127,7 @@ source arch/arm/mach-at91/Kconfig
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source arch/arm/mach-bcm2835/Kconfig
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source arch/arm/mach-clps711x/Kconfig
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source arch/arm/mach-ep93xx/Kconfig
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source arch/arm/mach-highbank/Kconfig
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source arch/arm/mach-imx/Kconfig
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source arch/arm/mach-mxs/Kconfig
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source arch/arm/mach-netx/Kconfig
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@ -55,6 +55,7 @@ machine-$(CONFIG_ARCH_AT91) := at91
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machine-$(CONFIG_ARCH_BCM2835) := bcm2835
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machine-$(CONFIG_ARCH_CLPS711X) := clps711x
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machine-$(CONFIG_ARCH_EP93XX) := ep93xx
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machine-$(CONFIG_ARCH_HIGHBANK) := highbank
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machine-$(CONFIG_ARCH_IMX) := imx
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machine-$(CONFIG_ARCH_MXS) := mxs
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machine-$(CONFIG_ARCH_NOMADIK) := nomadik
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@ -98,6 +99,7 @@ board-$(CONFIG_MACH_EUKREA_CPUIMX51SD) := eukrea_cpuimx51
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board-$(CONFIG_MACH_FREESCALE_MX25_3STACK) := freescale-mx25-3-stack
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board-$(CONFIG_MACH_FREESCALE_MX35_3STACK) := freescale-mx35-3-stack
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board-$(CONFIG_MACH_GE863) := telit-evk-pro3
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board-$(CONFIG_MACH_HIGHBANK) := highbank
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board-$(CONFIG_MACH_IMX21ADS) := imx21ads
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board-$(CONFIG_MACH_IMX27ADS) := imx27ads
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board-$(CONFIG_MACH_IMX233_OLINUXINO) := imx233-olinuxino
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@ -0,0 +1,4 @@
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obj-y += init.o
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obj-y += lowlevel.o
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pbl-y += lowlevel.o
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@ -0,0 +1,5 @@
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#endif /* __CONFIG_H */
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@ -0,0 +1,33 @@
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#!/bin/sh
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# use 'dhcp' to do dhcp in barebox and in kernel
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# use 'none' if you want to skip kernel ip autoconfiguration
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ip=dhcp
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global.dhcp.vendor_id=barebox-highbank
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# or set your networking parameters here
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#eth0.ipaddr=a.b.c.d
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#eth0.netmask=a.b.c.d
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#eth0.gateway=a.b.c.d
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#eth0.serverip=a.b.c.d
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# can be either 'nfs', 'tftp' or 'nor'
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kernel_loc=tftp
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# can be either 'net', 'nor' or 'initrd'
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rootfs_loc=initrd
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# can be either 'jffs2' or 'ubifs'
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rootfs_type=ubifs
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rootfsimage=root.$rootfs_type
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kernelimage=zImage
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#kernelimage=uImage
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#kernelimage=Image
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#kernelimage=Image.lzo
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autoboot_timeout=3
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bootargs="console=ttyAMA0,115200n8 CONSOLE=/dev/ttyAMA0"
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# set a fancy prompt (if support is compiled in)
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PS1="\e[1;31m[barebox@\h]:\w\e[0m\n# "
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@ -0,0 +1,50 @@
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/*
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* Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnio@jcrosoft.com>
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*
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* GPLv2 only
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*/
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#include <common.h>
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#include <init.h>
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#include <asm/armlinux.h>
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#include <asm/system_info.h>
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#include <generated/mach-types.h>
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#include <mach/devices.h>
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#include <environment.h>
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#include <partition.h>
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#include <sizes.h>
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#include <io.h>
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static int highbank_mem_init(void)
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{
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highbank_add_ddram(4089 << 20);
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return 0;
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}
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mem_initcall(highbank_mem_init);
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static int highbank_devices_init(void)
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{
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highbank_register_gpio(0);
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highbank_register_gpio(1);
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highbank_register_gpio(2);
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highbank_register_gpio(3);
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highbank_register_ahci();
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highbank_register_xgmac(0);
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highbank_register_xgmac(1);
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armlinux_set_bootparams((void *)(0x00000100));
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devfs_add_partition("nvram", 0x00000, SZ_16K, DEVFS_PARTITION_FIXED, "env0");
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return 0;
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}
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device_initcall(highbank_devices_init);
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static int highbank_console_init(void)
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{
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highbank_register_uart();
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return 0;
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}
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console_initcall(highbank_console_init);
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@ -0,0 +1,17 @@
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/*
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* Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnio@jcrosoft.com>
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*
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* GPLv2 only
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*/
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#include <common.h>
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#include <sizes.h>
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#include <asm/barebox-arm-head.h>
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#include <asm/barebox-arm.h>
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#include <asm/system_info.h>
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void __naked barebox_arm_reset_vector(void)
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{
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arm_cpu_lowlevel_init();
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barebox_arm_entry(0x00000000, SZ_512M, 0);
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}
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@ -0,0 +1,60 @@
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CONFIG_ARCH_HIGHBANK=y
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CONFIG_AEABI=y
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CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
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CONFIG_PBL_IMAGE=y
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CONFIG_MMU=y
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CONFIG_MALLOC_SIZE=0xa00000
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CONFIG_MALLOC_TLSF=y
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CONFIG_PROMPT="vexpress: "
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CONFIG_LONGHELP=y
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CONFIG_GLOB=y
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CONFIG_HUSH_FANCY_PROMPT=y
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CONFIG_CMDLINE_EDITING=y
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CONFIG_AUTO_COMPLETE=y
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CONFIG_MENU=y
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CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
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CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/highbank/env"
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CONFIG_CMD_EDIT=y
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CONFIG_CMD_SLEEP=y
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CONFIG_CMD_SAVEENV=y
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CONFIG_CMD_EXPORT=y
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CONFIG_CMD_PRINTENV=y
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CONFIG_CMD_READLINE=y
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CONFIG_CMD_MENU=y
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CONFIG_CMD_MENU_MANAGEMENT=y
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CONFIG_CMD_PASSWD=y
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CONFIG_CMD_TFTP=y
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CONFIG_CMD_ECHO_E=y
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CONFIG_CMD_LOADB=y
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CONFIG_CMD_MEMINFO=y
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CONFIG_CMD_BOOTM_SHOW_TYPE=y
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CONFIG_CMD_BOOTM_VERBOSE=y
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CONFIG_CMD_BOOTM_INITRD=y
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CONFIG_CMD_BOOTM_OFTREE=y
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CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y
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CONFIG_CMD_UIMAGE=y
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# CONFIG_CMD_BOOTU is not set
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CONFIG_CMD_RESET=y
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CONFIG_CMD_GO=y
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CONFIG_CMD_OFTREE=y
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CONFIG_CMD_MTEST=y
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CONFIG_CMD_MTEST_ALTERNATIVE=y
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CONFIG_CMD_TIMEOUT=y
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CONFIG_CMD_PARTITION=y
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CONFIG_CMD_UNCOMPRESS=y
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CONFIG_CMD_CLK=y
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CONFIG_NET=y
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CONFIG_NET_DHCP=y
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CONFIG_NET_NFS=y
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CONFIG_NET_PING=y
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CONFIG_NET_NETCONSOLE=y
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CONFIG_NET_RESOLV=y
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CONFIG_SERIAL_AMBA_PL011=y
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CONFIG_DRIVER_NET_CALXEDA_XGMAC=y
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# CONFIG_SPI is not set
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CONFIG_DISK=y
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CONFIG_DISK_AHCI=y
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CONFIG_GPIO_PL061=y
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CONFIG_FS_TFTP=y
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CONFIG_SHA1=y
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CONFIG_SHA256=y
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@ -0,0 +1,18 @@
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if ARCH_HIGHBANK
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config ARCH_TEXT_BASE
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hex
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default 0x03f00000
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config BOARDINFO
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default "Calxeda Highbank" if MACH_HIGHBANK
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choice
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prompt "Calxeda Board type"
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config MACH_HIGHBANK
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bool "Calxeda Highbank"
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endchoice
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endif
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@ -0,0 +1,3 @@
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obj-y += core.o
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obj-y += devices.o
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obj-y += reset.o
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@ -0,0 +1,48 @@
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/*
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* Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnio@jcrosoft.com>
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*
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* GPLv2 only
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*/
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#include <common.h>
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#include <init.h>
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#include <io.h>
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/amba/bus.h>
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#include <asm/hardware/arm_timer.h>
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#include <mach/devices.h>
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#include "sysregs.h"
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void __iomem *sregs_base = IOMEM(0xfff3c00);
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static void highbank_clk_init(void)
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{
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struct clk *clk;
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clk = clk_fixed("dummy_apb_pclk", 0);
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clk_register_clkdev(clk, "apb_pclk", NULL);
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clk = clk_fixed("pclk", 150000000);
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clk_register_clkdev(clk, NULL, "sp804");
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clk_register_clkdev(clk, NULL, "uart-pl011");
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}
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static void highbank_sp804_init(void)
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{
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amba_apb_device_add(NULL, "sp804", DEVICE_ID_SINGLE, 0xfff34000, 4096, NULL, 0);
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}
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static int highbank_init(void)
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{
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highbank_clk_init();
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highbank_sp804_init();
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return 0;
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}
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postcore_initcall(highbank_init);
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@ -0,0 +1,74 @@
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/*
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* Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnio@jcrosoft.com>
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*
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* GPLv2 only
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*/
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#include <common.h>
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#include <sizes.h>
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#include <linux/amba/bus.h>
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#include <asm/memory.h>
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#include <mach/devices.h>
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void highbank_add_ddram(u32 size)
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{
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arm_add_mem_device("ram1", 0x00000000, size);
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add_mem_device("nvram", 0xfff88000, SZ_32K, IORESOURCE_MEM_WRITEABLE);
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}
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void highbank_register_uart(void)
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{
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amba_apb_device_add(NULL, "uart-pl011", DEVICE_ID_SINGLE, 0xfff36000, 4096, NULL, 0);
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}
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void highbank_register_ahci(void)
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{
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add_generic_device("ahci", DEVICE_ID_SINGLE, NULL, 0xffe08000,
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0x10000, IORESOURCE_MEM, NULL);
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}
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void highbank_register_xgmac(unsigned id)
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{
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resource_size_t start;
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switch (id) {
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case 0:
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start = 0xfff50000;
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break;
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case 1:
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start = 0xfff51000;
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break;
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default:
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return;
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}
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add_generic_device("hb-xgmac", id, NULL, start, 0x1000,
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IORESOURCE_MEM, NULL);
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}
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void highbank_register_gpio(unsigned id)
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{
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resource_size_t start;
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switch (id) {
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case 0:
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start = 0xfff30000;
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break;
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case 1:
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start = 0xfff31000;
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break;
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case 2:
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start = 0xfff32000;
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break;
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case 3:
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start = 0xfff33000;
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break;
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default:
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return;
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}
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amba_apb_device_add(NULL, "pl061_gpio", id, start, 0x1000, NULL, 0);
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}
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@ -0,0 +1,7 @@
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#ifndef __ASM_MACH_CLKDEV_H
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#define __ASM_MACH_CLKDEV_H
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#define __clk_get(clk) ({ 1; })
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#define __clk_put(clk) do { } while (0)
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#endif
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@ -0,0 +1,26 @@
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/*
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* Copyright 2013 Jean-Christophe PLAGNIOL-VILLARD <plagniol@jcrosoft.com>
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*
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* GPLv2 only
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*/
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#ifndef __MACH_DEBUG_LL_H__
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#define __MACH_DEBUG_LL_H__
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#include <linux/amba/serial.h>
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#include <io.h>
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#define UART_BASE 0xfff36000
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static inline void PUTC_LL(char c)
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{
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/* Wait until there is space in the FIFO */
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while (readl(UART_BASE + UART01x_FR) & UART01x_FR_TXFF);
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/* Send the character */
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writel(c, UART_BASE + UART01x_DR);
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/* Wait to make sure it hits the line, in case we die too soon. */
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while (readl(UART_BASE + UART01x_FR) & UART01x_FR_TXFF);
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}
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#endif
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@ -0,0 +1,17 @@
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/*
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* Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnio@jcrosoft.com>
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*
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* GPLv2 only
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*/
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#ifndef __ASM_ARCH_DEVICES_H__
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#define __ASM_ARCH_DEVICES_H__
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void highbank_add_ddram(u32 size);
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void highbank_register_uart(void);
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void highbank_register_ahci(void);
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void highbank_register_xgmac(unsigned id);
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void highbank_register_gpio(unsigned id);
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#endif /* __ASM_ARCH_DEVICES_H__ */
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@ -0,0 +1 @@
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#include <asm-generic/gpio.h>
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@ -0,0 +1,20 @@
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/*
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* Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnio@jcrosoft.com>
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*
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* GPLv2 only
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*/
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#include <common.h>
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#include <io.h>
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#include <mach/devices.h>
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#include "sysregs.h"
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void __noreturn reset_cpu(ulong addr)
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{
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hingbank_set_pwr_hard_reset();
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asm(" wfi");
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while(1);
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}
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@ -0,0 +1,52 @@
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/*
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* Copyright 2011 Calxeda, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _MACH_HIGHBANK__SYSREGS_H_
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#define _MACH_HIGHBANK__SYSREGS_H_
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#include <io.h>
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extern void __iomem *sregs_base;
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#define HB_SREG_A9_PWR_REQ 0xf00
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#define HB_SREG_A9_BOOT_STAT 0xf04
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#define HB_SREG_A9_BOOT_DATA 0xf08
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#define HB_PWR_SUSPEND 0
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#define HB_PWR_SOFT_RESET 1
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#define HB_PWR_HARD_RESET 2
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#define HB_PWR_SHUTDOWN 3
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static inline void hingbank_set_pwr_suspend(void)
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{
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writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ);
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}
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static inline void hingbank_set_pwr_shutdown(void)
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{
|
||||
writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ);
|
||||
}
|
||||
|
||||
static inline void hingbank_set_pwr_soft_reset(void)
|
||||
{
|
||||
writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
|
||||
}
|
||||
|
||||
static inline void hingbank_set_pwr_hard_reset(void)
|
||||
{
|
||||
writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
|
||||
}
|
||||
|
||||
#endif
|
Loading…
Reference in New Issue