ARM: i.MX6: add initial support for SolidRun Cubox-i Carrier-1
Tested to work: - MMC - USB - Ethernet Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
parent
c5ff2805a1
commit
f87af10fb1
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@ -78,6 +78,7 @@ obj-$(CONFIG_MACH_SAMA5D3XEK) += sama5d3xek/
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obj-$(CONFIG_MACH_SCB9328) += scb9328/
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obj-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += ebv-socrates/
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obj-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += terasic-sockit/
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obj-$(CONFIG_MACH_SOLIDRUN_CARRIER1) += solidrun-carrier-1/
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obj-$(CONFIG_MACH_TNY_A9260) += tny-a926x/
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obj-$(CONFIG_MACH_TNY_A9263) += tny-a926x/
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obj-$(CONFIG_MACH_TNY_A9G20) += tny-a926x/
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@ -0,0 +1,3 @@
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obj-y += board.o flash-header-solidrun-carrier-1.dcd.o
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extra-y += flash-header-solidrun-carrier-1.dcd.S flash-header-solidrun-carrier-1.dcd
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lwl-y += lowlevel.o
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@ -0,0 +1,89 @@
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/*
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* Copyright (C) 2013 Lucas Stach <l.stach@pengutronix.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <asm/armlinux.h>
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#include <asm/io.h>
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#include <bootsource.h>
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#include <common.h>
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#include <environment.h>
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#include <envfs.h>
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#include <gpio.h>
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#include <init.h>
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#include <mach/generic.h>
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#include <mach/imx6-regs.h>
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#include <mach/imx6.h>
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#include <mfd/imx6q-iomuxc-gpr.h>
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#include <sizes.h>
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#include <linux/phy.h>
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static int ar8035_phy_fixup(struct phy_device *dev)
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{
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u16 val;
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/* Ar803x phy SmartEEE feature cause link status generates glitch,
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* which cause ethernet link down/up issue, so disable SmartEEE
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*/
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phy_write(dev, 0xd, 0x3);
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phy_write(dev, 0xe, 0x805d);
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phy_write(dev, 0xd, 0x4003);
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val = phy_read(dev, 0xe);
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phy_write(dev, 0xe, val & ~(1 << 8));
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/* To enable AR8031 ouput a 125MHz clk from CLK_25M */
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phy_write(dev, 0xd, 0x7);
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phy_write(dev, 0xe, 0x8016);
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phy_write(dev, 0xd, 0x4007);
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val = phy_read(dev, 0xe);
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val &= 0xffe3;
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val |= 0x18;
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phy_write(dev, 0xe, val);
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/* introduce tx clock delay */
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phy_write(dev, 0x1d, 0x5);
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val = phy_read(dev, 0x1e);
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val |= 0x0100;
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phy_write(dev, 0x1e, val);
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return 0;
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}
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static int carrier1_device_init(void)
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{
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if (!of_machine_is_compatible("solidrun,cubox-i-carrier-1"))
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return 0;
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phy_register_fixup_for_uid(0x004dd072, 0xffffffef, ar8035_phy_fixup);
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/* enable USB VBUS */
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gpio_direction_output(IMX_GPIO_NR(3, 22), 1);
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gpio_direction_output(IMX_GPIO_NR(1, 0), 1);
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return 0;
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}
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device_initcall(carrier1_device_init);
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static int carrier1_lwl_init(void)
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{
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if (!of_machine_is_compatible("solidrun,cubox-i-carrier-1"))
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return 0;
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barebox_set_hostname("carrier-1");
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imx6_init_lowlevel();
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return 0;
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}
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postcore_initcall(carrier1_lwl_init);
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@ -0,0 +1,79 @@
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loadaddr 0x10000000
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soc imx6
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dcdofs 0x400
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wm 32 0x020e0774 0x000c0000
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wm 32 0x020e0754 0x00000000
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wm 32 0x020e04ac 0x00000030
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wm 32 0x020e04b0 0x00000030
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wm 32 0x020e0464 0x00000030
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wm 32 0x020e0490 0x00000030
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wm 32 0x020e074c 0x00000030
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wm 32 0x020e0494 0x00000030
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wm 32 0x020e04a4 0x00003000
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wm 32 0x020e04a8 0x00003000
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wm 32 0x020e04a0 0x00000000
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wm 32 0x020e04b4 0x00003030
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wm 32 0x020e04b8 0x00003030
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wm 32 0x020e076c 0x00000030
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wm 32 0x020e0750 0x00000000
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wm 32 0x020e04bc 0x00000030
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wm 32 0x020e04c0 0x00000030
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wm 32 0x020e04c4 0x00000030
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wm 32 0x020e04c8 0x00000030
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wm 32 0x020e04cc 0x00000000
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wm 32 0x020e04d0 0x00000000
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wm 32 0x020e04d4 0x00000000
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wm 32 0x020e04d8 0x00000000
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wm 32 0x020e0760 0x00000000
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wm 32 0x020e0764 0x00000030
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wm 32 0x020e0770 0x00000030
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wm 32 0x020e0778 0x00000030
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wm 32 0x020e077c 0x00000030
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wm 32 0x020e0780 0x00000000
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wm 32 0x020e0784 0x00000000
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wm 32 0x020e078c 0x00000000
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wm 32 0x020e0748 0x00000000
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wm 32 0x020e0470 0x00000030
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wm 32 0x020e0474 0x00000030
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wm 32 0x020e0478 0x00000030
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wm 32 0x020e047c 0x00000030
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wm 32 0x020e0480 0x00000000
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wm 32 0x020e0484 0x00000000
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wm 32 0x020e0488 0x00000000
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wm 32 0x020e048c 0x00000000
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wm 32 0x021b0800 0xa1390003
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wm 32 0x021b4800 0xa1390003
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wm 32 0x021b080c 0x000F0011
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wm 32 0x021b0810 0x000E000F
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wm 32 0x021b083c 0x42240229
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wm 32 0x021b0840 0x021a0219
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wm 32 0x021b0848 0x4e4f5150
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wm 32 0x021b0850 0x35363136
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wm 32 0x021b081c 0x33333333
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wm 32 0x021b0820 0x33333333
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wm 32 0x021b0824 0x33333333
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wm 32 0x021b0828 0x33333333
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wm 32 0x021b08b8 0x00000800
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wm 32 0x021b48b8 0x00000800
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wm 32 0x021b0004 0x0002002d
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wm 32 0x021b0008 0x00333030
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wm 32 0x021b000c 0x40445323
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wm 32 0x021b0010 0xb68e8c63
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wm 32 0x021b0014 0x01ff00db
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wm 32 0x021b0018 0x00001740
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wm 32 0x021b001c 0x00008000
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wm 32 0x021b002c 0x000026d2
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wm 32 0x021b0030 0x00440e21
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wm 32 0x021b0040 0x00000017
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wm 32 0x021b0400 0x11420000
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wm 32 0x021b0000 0x83190000
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wm 32 0x021b001c 0x04008032
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wm 32 0x021b001c 0x00008033
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wm 32 0x021b001c 0x00428031
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wm 32 0x021b001c 0x07208030
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wm 32 0x021b001c 0x04008040
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wm 32 0x021b0020 0x00005800
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wm 32 0x021b0818 0x00000007
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wm 32 0x021b0004 0x0002556d
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wm 32 0x021b0404 0x00011006
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wm 32 0x021b001c 0x00000000
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@ -0,0 +1,18 @@
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#include <common.h>
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#include <sizes.h>
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#include <asm/barebox-arm-head.h>
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#include <asm/barebox-arm.h>
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extern char __dtb_imx6dl_cubox_i_carrier_1_start[];
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ENTRY_FUNCTION(start_imx6dl_cubox_i_carrier_1)(void)
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{
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uint32_t fdt;
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__barebox_arm_head();
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arm_cpu_lowlevel_init();
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fdt = (uint32_t)__dtb_imx6dl_cubox_i_carrier_1_start - get_runtime_offset();
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barebox_arm_entry(0x10000000, SZ_512M, fdt);
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}
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@ -8,6 +8,7 @@ CONFIG_MACH_DFI_FS700_M60=y
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CONFIG_MACH_REALQ7=y
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CONFIG_MACH_GK802=y
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CONFIG_MACH_TQMA6X=y
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CONFIG_MACH_SOLIDRUN_CARRIER1=y
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CONFIG_IMX_IIM=y
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CONFIG_IMX_IIM_FUSE_BLOW=y
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CONFIG_IMX_OCOTP=y
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@ -87,6 +88,7 @@ CONFIG_NET_NETCONSOLE=y
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CONFIG_NET_RESOLV=y
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CONFIG_OFDEVICE=y
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CONFIG_OF_BAREBOX_DRIVERS=y
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CONFIG_AT803X_PHY=y
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CONFIG_DRIVER_NET_FEC_IMX=y
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CONFIG_NET_USB=y
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CONFIG_NET_USB_ASIX=y
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@ -10,7 +10,8 @@ dtb-$(CONFIG_ARCH_IMX6) += imx6q-gk802.dtb \
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imx6q-sabresd.dtb \
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imx6dl-mba6x.dtb \
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imx6q-mba6x.dtb \
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imx6q-phytec-pbab01.dtb
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imx6q-phytec-pbab01.dtb \
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imx6dl-cubox-i-carrier-1.dtb
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dtb-$(CONFIG_ARCH_MVEBU) += dove-cubox.dtb
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dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5_sockit.dtb \
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socfpga_cyclone5_socrates.dtb
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@ -35,6 +36,7 @@ pbl-$(CONFIG_MACH_TOSHIBA_AC100) += tegra20-paz00.dtb.o
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pbl-$(CONFIG_MACH_TQMA6X) += imx6dl-mba6x.dtb.o imx6q-mba6x.dtb.o
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pbl-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += socfpga_cyclone5_socrates.dtb.o
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pbl-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += socfpga_cyclone5_sockit.dtb.o
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pbl-$(CONFIG_MACH_SOLIDRUN_CARRIER1) += imx6dl-cubox-i-carrier-1.dtb.o
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pbl-$(CONFIG_MACH_SABRELITE) += imx6q-sabrelite.dtb.o
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.SECONDARY: $(obj)/$(BUILTIN_DTB).dtb.S
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@ -0,0 +1,116 @@
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/*
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* Copyright (C) 2013 Russell King
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*
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* The code contained herein is licensed under the GNU General Public
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* License version 2.
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*/
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/dts-v1/;
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#include "imx6dl.dtsi"
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#include "imx6qdl-microsom.dtsi"
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#include "imx6qdl-microsom-ar8035.dtsi"
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/ {
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model = "SolidRun Cubox-i DL/Solo Carrier-1 Board";
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compatible = "solidrun,cubox-i-carrier-1", "fsl,imx6dl";
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chosen {
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linux,stdout-path = &uart1;
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environment@0 {
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compatible = "barebox,environment";
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device-path = &usdhc2, "partname:barebox-environment";
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};
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};
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memory {
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reg = <0x10000000 0x20000000>;
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};
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ir_recv: ir-receiver {
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compatible = "gpio-ir-receiver";
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gpios = <&gpio1 2 1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_carrier1_gpio1_2>;
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};
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codec: spdif-transmitter {
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compatible = "linux,spdif-dit";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_carrier1_spdif>;
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};
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sound-spdif {
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compatible = "fsl,imx-audio-spdif";
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model = "imx-spdif";
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/* IMX6 doesn't implement this yet */
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spdif-controller = <&spdif>;
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spdif-out;
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};
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1_1>;
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/*
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* Not fitted on Carrier-1 board... yet
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status = "okay";
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rtc: pcf8523@68 {
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compatible = "nxp,pcf8523";
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reg = <0x68>;
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};
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*/
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};
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&iomuxc {
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carrier1 {
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pinctrl_carrier1_gpio1_2: carrier1-gpio1_2 {
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fsl,pins = <
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MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
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>;
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};
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pinctrl_carrier1_spdif: carrier1-spdif {
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fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0>;
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};
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pinctrl_carrier1_usdhc2: carrier1-usdhc2 {
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fsl,pins = <
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MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
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MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
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MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
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MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
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MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
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MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
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MX6QDL_PAD_GPIO_4__SD2_CD_B 0x1f071
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>;
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};
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};
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};
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&spdif {
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_carrier1_usdhc2>;
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vmmc-supply = <®_3p3v>;
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fsl,cd-controller;
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status = "okay";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "barebox";
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reg = <0x0 0x80000>;
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};
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partition@1 {
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label = "barebox-environment";
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reg = <0x80000 0x80000>;
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};
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};
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@ -0,0 +1,58 @@
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/*
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* Copyright 2013 Russell King
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*
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* The code contained herein is licensed under the GNU General Public
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* License version 2.
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*
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* This describes the hookup for an AR8035 to the IMX6 on the Cubox-i
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* MicroSOM.
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*
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* FIXME: we need to configure PLL_ENET to produce 25MHz, but there
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* doesn't seem to be a way to do that yet from DT. (Writing 0x2000
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* to 0x020c80e0 phys will do this.)
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*/
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
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phy-mode = "rgmii";
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phy-reset-duration = <2>;
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phy-reset-gpios = <&gpio4 15 0>;
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status = "okay";
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};
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&iomuxc {
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enet {
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pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
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/* AR8035 reset */
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MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0
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/* AR8035 interrupt */
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MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x80000000
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/* GPIO16 -> AR8035 25MHz */
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MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
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/* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1
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/* AR8035 pin strapping: IO voltage: pull up */
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
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/* AR8035 pin strapping: PHYADDR#0: pull down */
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0
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/* AR8035 pin strapping: PHYADDR#1: pull down */
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x130b0
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/* AR8035 pin strapping: MODE#1: pull up */
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
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/* AR8035 pin strapping: MODE#3: pull up */
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
|
||||
/* AR8035 pin strapping: MODE#0: pull down */
|
||||
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
|
@ -0,0 +1,84 @@
|
|||
/*
|
||||
* Copyright 2013 Russell King
|
||||
*
|
||||
* The code contained herein is licensed under the GNU General Public
|
||||
* License version 2.
|
||||
*/
|
||||
/ {
|
||||
regulators {
|
||||
compatible = "simple-bus";
|
||||
|
||||
reg_3p3v: 3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usb_h1_vbus: usb_h1_vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_h1_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&gpio1 0 0>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
reg_usb_otg_vbus: usb_otg_vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_otg_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&gpio3 22 0>;
|
||||
enable-active-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&can1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_microsom_flexcan1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
microsom {
|
||||
pinctrl_microsom_flexcan1: microsom-flexcan1 {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x80000000
|
||||
MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x80000000
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_microsom_usbotg: microsom-usbotg {
|
||||
/*
|
||||
* Similar to pinctrl_usbotg_2, but we want it
|
||||
* pulled down for a fixed host connection.
|
||||
*/
|
||||
fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1_1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
phy_type = "utmi";
|
||||
dr_mode = "host";
|
||||
vbus-supply = <®_usb_otg_vbus>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_microsom_usbotg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbh1 {
|
||||
phy_type = "utmi";
|
||||
dr_mode = "host";
|
||||
vbus-supply = <®_usb_h1_vbus>;
|
||||
status = "okay";
|
||||
};
|
|
@ -233,6 +233,10 @@ config MACH_SABRELITE
|
|||
select HAVE_DEFAULT_ENVIRONMENT_NEW
|
||||
select HAVE_PBL_MULTI_IMAGES
|
||||
|
||||
config MACH_SOLIDRUN_CARRIER1
|
||||
bool "SolidRun CuBox-i Carrier-1"
|
||||
select ARCH_IMX6
|
||||
|
||||
endif
|
||||
|
||||
# ----------------------------------------------------------
|
||||
|
|
|
@ -76,3 +76,8 @@ pblx-$(CONFIG_MACH_SABRELITE) += start_imx6_sabrelite
|
|||
CFG_start_imx6_sabrelite.pblx.imximg = $(board)/freescale-mx6-sabrelite/flash-header-mx6-sabrelite.imxcfg
|
||||
FILE_barebox-freescale-imx6q-sabrelite.img = start_imx6_sabrelite.pblx.imximg
|
||||
image-$(CONFIG_MACH_SABRELITE) += barebox-freescale-imx6q-sabrelite.img
|
||||
|
||||
pblx-$(CONFIG_MACH_SOLIDRUN_CARRIER1) += start_imx6dl_cubox_i_carrier_1
|
||||
CFG_start_imx6dl_cubox_i_carrier_1.pblx.imximg = $(board)/solidrun-carrier-1/flash-header-solidrun-carrier-1.imxcfg
|
||||
FILE_barebox-cubox-i-carrier-1.img = start_imx6dl_cubox_i_carrier_1.pblx.imximg
|
||||
image-$(CONFIG_MACH_SOLIDRUN_CARRIER1) += barebox-cubox-i-carrier-1.img
|
||||
|
|
Loading…
Reference in New Issue