Merge branch 'for-next/arm'
This commit is contained in:
commit
fd6fe68e95
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@ -216,7 +216,7 @@ config AEABI
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config THUMB2_BAREBOX
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select ARM_ASM_UNIFIED
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select AEABI
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depends on CPU_V7
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depends on CPU_V7 && !CPU_32v4T && !CPU_32v5 && !CPU_32v6
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bool "Compile barebox in thumb-2 mode (read help)"
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help
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This enables compilation of barebox in thumb-2 mode which generates
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@ -17,7 +17,9 @@ obj-$(CONFIG_CPU_32v5) += cache-armv5.o
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pbl-$(CONFIG_CPU_32v5) += cache-armv5.o
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obj-$(CONFIG_CPU_32v6) += cache-armv6.o
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pbl-$(CONFIG_CPU_32v6) += cache-armv6.o
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AFLAGS_cache-armv7.o :=-Wa,-march=armv7-a
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obj-$(CONFIG_CPU_32v7) += cache-armv7.o
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AFLAGS_pbl-cache-armv7.o :=-Wa,-march=armv7-a
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pbl-$(CONFIG_CPU_32v7) += cache-armv7.o
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obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
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@ -102,7 +102,7 @@ int arm_set_cache_functions(void)
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break;
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#endif
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default:
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BUG();
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while(1);
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}
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return 0;
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@ -18,6 +18,7 @@
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#include <common.h>
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#include <init.h>
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#include <sizes.h>
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#include <asm/system_info.h>
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#include <asm/barebox-arm.h>
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#include <asm/barebox-arm-head.h>
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#include <asm-generic/memory_layout.h>
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@ -64,3 +65,16 @@ void relocate_to_current_adr(void)
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arm_early_mmu_cache_flush();
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flush_icache();
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}
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#ifdef ARM_MULTIARCH
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int __cpu_architecture;
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int __pure cpu_architecture(void)
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{
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if(__cpu_architecture == CPU_ARCH_UNKNOWN)
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__cpu_architecture = arm_early_get_cpu_architecture();
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return __cpu_architecture;
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}
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#endif
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@ -29,7 +29,6 @@
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#include <asm/system.h>
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#include <asm/memory.h>
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#include <asm-generic/memory_layout.h>
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#include <asm/system_info.h>
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#include <asm/cputype.h>
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#include <asm/cache.h>
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#include <asm/ptrace.h>
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@ -146,16 +145,3 @@ static int execute_init(void)
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}
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postcore_initcall(execute_init);
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#endif
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#ifdef ARM_MULTIARCH
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int __cpu_architecture;
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int __pure cpu_architecture(void)
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{
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if(__cpu_architecture == CPU_ARCH_UNKNOWN)
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__cpu_architecture = arm_early_get_cpu_architecture();
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return __cpu_architecture;
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}
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#endif
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