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ppc: GIANFAR base address definition

In view of the introduction of the GIANFAR Ethernet driver,
the mdio and gianfar base address are defined.

Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Renaud Barbier 2012-08-07 15:30:55 +01:00 committed by Sascha Hauer
parent 58713d3274
commit fdf4a8c672
1 changed files with 7 additions and 0 deletions

View File

@ -39,6 +39,11 @@
#define MPC85xx_GPIO_OFFSET 0xf000
#define MPC85xx_L2_OFFSET 0x20000
#ifdef CONFIG_TSECV2
#define TSEC1_OFFSET 0xB0000
#else
#define TSEC1_OFFSET 0x24000
#endif
#define MPC85xx_PIC_OFFSET 0x40000
#define MPC85xx_GUTS_OFFSET 0xe0000
@ -129,4 +134,6 @@
#define MPC85xx_DEVDISR_TB1 0x00001000
#define MPC85xx_GUTS_RSTCR_OFFSET 0xb0
#define GFAR_BASE_ADDR (CFG_IMMR + TSEC1_OFFSET)
#define MDIO_BASE_ADDR (CFG_IMMR + 0x24000)
#endif /*__IMMAP_85xx__*/