ppc: GIANFAR base address definition
In view of the introduction of the GIANFAR Ethernet driver, the mdio and gianfar base address are defined. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -39,6 +39,11 @@
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#define MPC85xx_GPIO_OFFSET 0xf000
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#define MPC85xx_L2_OFFSET 0x20000
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#ifdef CONFIG_TSECV2
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#define TSEC1_OFFSET 0xB0000
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#else
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#define TSEC1_OFFSET 0x24000
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#endif
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#define MPC85xx_PIC_OFFSET 0x40000
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#define MPC85xx_GUTS_OFFSET 0xe0000
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@ -129,4 +134,6 @@
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#define MPC85xx_DEVDISR_TB1 0x00001000
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#define MPC85xx_GUTS_RSTCR_OFFSET 0xb0
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#define GFAR_BASE_ADDR (CFG_IMMR + TSEC1_OFFSET)
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#define MDIO_BASE_ADDR (CFG_IMMR + 0x24000)
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#endif /*__IMMAP_85xx__*/
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