/*
 * Copyright (C) 2015 Wadim Egorov <w.egorovphytec.de> PHYTEC Messtechnik GmbH
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "am33xx.dtsi"
#include "am335x-phytec-phycore-som.dtsi"

/ {
	model = "sysmocom ODU";
	compatible = "sysmocom,odu", "phytec,phycore-am335x-som", "phytec,am335x-som", "ti,am33xx";

	state: state {
		compatible = "barebox,state";
		magic = <0x6c15c8df>;
		backend-type = "raw";
		backend = &eeprom_baseboard, "partname:state";

		bootstate {
			system0 {
				#address-cells = <1>;
				#size-cells = <1>;

				remaining_attempts {
					reg = <0x0 0x1>;
					type = "uint8";
				};
				priority {
					reg = <0x1 0x1>;
					type = "uint8";
				};
				ok {
					reg = <0x2 0x1>;
					type = "uint8";
				};
			};

			system1 {
				#address-cells = <1>;
				#size-cells = <1>;

				remaining_attempts {
					reg = <0x3 0x1>;
					type = "uint8";
				};
				priority {
					reg = <0x4 0x1>;
					type = "uint8";
				};
				ok {
					reg = <0x5 0x1>;
					type = "uint8";
				};
			};

			rescue {
				#address-cells = <1>;
				#size-cells = <1>;

				remaining_attempts {
					reg = <0x6 0x1>;
					type = "uint8";
				};
				priority {
					reg = <0x7 0x1>;
					type = "uint8";
				};
				ok {
					reg = <0x8 0x1>;
					type = "uint8";
				};
			};
		};
	};

	bootstate: bootstate {
		compatible = "barebox,bootstate";
		backend-type = "state";
		backend = <&state>;

		system0 {
			default_attempts = <3>;
		};

		system1 {
			default_attempts = <3>;
		};

		rescue {
			default_attempts = <3>;
		};
	};
};

&nand {
	partition@5 {
		label = "bareboxenv";
		reg = <0x100000 0x20000>;
	};

	partition@6 {
		label = "root";
		reg = <0x120000 0x0>;
	};
};

&i2c0 {
	eeprom_baseboard: 24c02@50 {
		status = "okay";
		compatible = "atmel,24c02";
		pagesize = <8>;
		reg = <0x50>;

		#address-cells = <1>;
		#size-cells = <1>;

		partition@0 {
			label = "state";
			reg = <0xc0 0x40>; /* last 0x40 bytes for eeprom */
		};
	};
};