48 lines
1.3 KiB
C
48 lines
1.3 KiB
C
/*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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/**
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* @file
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* @brief Basic clock, sdram and timer handling for S3C24xx CPUs
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*/
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#include <config.h>
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#include <common.h>
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#include <init.h>
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#include <io.h>
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#include <mach/s3c-iomap.h>
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#include <mach/s3c-generic.h>
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#define S3C_WTCON (S3C_WATCHDOG_BASE)
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#define S3C_WTDAT (S3C_WATCHDOG_BASE + 0x04)
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#define S3C_WTCNT (S3C_WATCHDOG_BASE + 0x08)
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void __noreturn reset_cpu(unsigned long addr)
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{
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/* Disable watchdog */
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writew(0x0000, S3C_WTCON);
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/* Initialize watchdog timer count register */
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writew(0x0001, S3C_WTCNT);
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/* Enable watchdog timer; assert reset at timer timeout */
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writew(0x0021, S3C_WTCON);
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/* loop forever and wait for reset to happen */
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while(1)
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;
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}
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EXPORT_SYMBOL(reset_cpu);
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