56 lines
1.6 KiB
C
56 lines
1.6 KiB
C
/*
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* Copyright 2009-2011 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
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* GNU General Public License for more details.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#ifndef __ASSEMBLY__
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extern unsigned long ics307_clk_freq(unsigned int reg);
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#endif
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#define CFG_SYS_CLK_FREQ ics307_clk_freq(25)
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#define CFG_DDR_CLK_FREQ ics307_clk_freq(28)
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#define CFG_CHIP_SELECTS_PER_CTRL 2
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/*
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* Memory map
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*
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* 0x0000_0000 0x7fff_ffff DDR 2G cacheable
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*
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* Localbus non-cacheable
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* 0xe800_0000 0xefff_ffff FLASH 128M non-cacheable
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* 0xffdf_0000 0xffdf_0fff PIXIS 4K Cacheable
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* 0xffd0_0000 0xffd0_3fff L1 for stack 16K Cacheable TLB0
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*/
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#define CFG_SDRAM_BASE 0x00000000
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#define CFG_CCSRBAR_DEFAULT 0xff700000
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#define CFG_CCSRBAR 0xffe00000
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#define CFG_CCSRBAR_PHYS CFG_CCSRBAR
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#define CFG_IMMR CFG_CCSRBAR
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#define CFG_INIT_RAM_ADDR 0xffd00000
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#define CFG_INIT_RAM_SIZE 0x00004000
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#define CFG_INIT_BI_SIZE 0x00000100
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#define CFG_INIT_SP_OFFSET (CFG_INIT_RAM_SIZE - CFG_INIT_BI_SIZE)
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#define CFG_BOOT_BLOCK 0xe0000000
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#define CFG_BOOT_BLOCK_PHYS CFG_BOOT_BLOCK
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#define CFG_FLASH_BASE 0xe8000000
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#define CFG_FLASH_BASE_PHYS CFG_FLASH_BASE
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#define CFG_PIXIS_BASE 0xffdf0000
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#define CFG_PIXIS_BASE_PHYS CFG_PIXIS_BASE
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#endif /* __CONFIG_H */
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