99 lines
2.2 KiB
C
99 lines
2.2 KiB
C
/**
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* @file
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* @brief Support DMTimer counter
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*
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* FileName: arch/arm/mach-omap/dmtimer.c
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*/
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/*
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* This File is based on arch/arm/mach-omap/s32k_clksource.c
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* (C) Copyright 2008
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* Texas Instruments, <www.ti.com>
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* Nishanth Menon <x0nishan@ti.com>
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*
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* (C) Copyright 2012 Phytec Messtechnik GmbH
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* Author: Teresa Gámez <t.gamez@phytec.de>
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* (C) Copyright 2015 Phytec Messtechnik GmbH
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* Author: Daniel Schultz <d.schultz@phytec.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <clock.h>
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#include <init.h>
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#include <io.h>
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#include <mach/am33xx-silicon.h>
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#include <mach/am33xx-clock.h>
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#include <stdio.h>
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#define CLK_RC32K 32768
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#define TIDR 0x0
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#define TIOCP_CFG 0x10
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#define IRQ_EOI 0x20
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#define IRQSTATUS_RAW 0x24
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#define IRQSTATUS 0x28
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#define IRQSTATUS_SET 0x2c
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#define IRQSTATUS_CLR 0x30
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#define IRQWAKEEN 0x34
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#define TCLR 0x38
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#define TCRR 0x3C
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#define TLDR 0x40
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#define TTGR 0x44
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#define TWPS 0x48
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#define TMAR 0x4C
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#define TCAR1 0x50
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#define TSICR 0x54
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#define TCAR2 0x58
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static void *base = (void *)AM33XX_DMTIMER2_BASE;
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/**
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* @brief Provide a simple counter read
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*
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* @return DMTimer counter
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*/
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static uint64_t dmtimer_read(void)
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{
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return readl(base + TCRR);
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}
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static struct clocksource dmtimer_cs = {
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.read = dmtimer_read,
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.mask = CLOCKSOURCE_MASK(32),
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.shift = 10,
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};
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/**
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* @brief Initialize the Clock
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*
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* Enable dmtimer.
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*
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* @return result of @ref init_clock
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*/
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static int dmtimer_init(void)
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{
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u64 clk_speed;
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clk_speed = am33xx_get_osc_clock();
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clk_speed *= 1000;
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dmtimer_cs.mult = clocksource_hz2mult(clk_speed, dmtimer_cs.shift);
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/* Enable counter */
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writel(0x3, base + TCLR);
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return init_clock(&dmtimer_cs);
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}
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/* Run me at boot time */
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core_initcall(dmtimer_init);
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