290 lines
9.2 KiB
C
290 lines
9.2 KiB
C
/*
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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*
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* Based on:
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*
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* ----------------------------------------------------------------------------
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*
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* dm644x_emac.h
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*
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* TI DaVinci (DM644X) EMAC peripheral driver header for DV-EVM
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*
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* Copyright (C) 2005 Texas Instruments.
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*
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* ----------------------------------------------------------------------------
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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* ----------------------------------------------------------------------------
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*/
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#ifndef _DAVINCI_EMAC_H_
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#define _DAVINCI_EMAC_H_
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/* PHY mask - set only those phy number bits where phy is/can be connected */
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#define EMAC_MDIO_PHY_NUM 1
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#define EMAC_MDIO_PHY_MASK (1 << EMAC_MDIO_PHY_NUM)
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/* Ethernet Min/Max packet size */
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#define EMAC_MIN_ETHERNET_PKT_SIZE 60
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#define EMAC_MAX_ETHERNET_PKT_SIZE 1518
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#define EMAC_PKT_ALIGN 18 /* 1518 + 18 = 1536 (packet aligned on 32 byte boundry) */
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/* Number of RX packet buffers
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* NOTE: Only 1 buffer supported as of now
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*/
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#define EMAC_MAX_RX_BUFFERS 10
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/***********************************************
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******** Internally used macros ***************
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***********************************************/
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#define EMAC_CH_TX 1
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#define EMAC_CH_RX 0
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/* Each descriptor occupies 4 words, lets start RX desc's at 0 and
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* reserve space for 64 descriptors max
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*/
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#define EMAC_RX_DESC_BASE 0x0
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#define EMAC_TX_DESC_BASE 0x1000
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/* EMAC Teardown value */
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#define EMAC_TEARDOWN_VALUE 0xfffffffc
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/* MII Status Register */
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#define MII_STATUS_REG 1
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/* Number of statistics registers */
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#define EMAC_NUM_STATS 36
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/* EMAC Descriptor Offsets */
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#define EMAC_DESC_NEXT 0x0 /* Pointer to next descriptor in chain */
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#define EMAC_DESC_BUFFER 0x4 /* Pointer to data buffer */
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#define EMAC_DESC_BUFF_OFF_LEN 0x8 /* Buffer Offset(MSW) and Length(LSW) */
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#define EMAC_DESC_PKT_FLAG_LEN 0xc /* Packet Flags(MSW) and Length(LSW) */
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#define EMAC_DESC_SIZE 0x10
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/* CPPI bit positions */
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#define EMAC_CPPI_SOP_BIT (0x80000000)
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#define EMAC_CPPI_EOP_BIT (0x40000000)
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#define EMAC_CPPI_OWNERSHIP_BIT (0x20000000)
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#define EMAC_CPPI_EOQ_BIT (0x10000000)
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#define EMAC_CPPI_TEARDOWN_COMPLETE_BIT (0x08000000)
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#define EMAC_CPPI_PASS_CRC_BIT (0x04000000)
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#define EMAC_CPPI_RX_ERROR_FRAME (0x03fc0000)
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#define EMAC_MACCONTROL_MIIEN_ENABLE (0x20)
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#define EMAC_MACCONTROL_FULLDUPLEX_ENABLE (0x1)
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#define EMAC_MACCONTROL_GIGABIT_ENABLE (1 << 7)
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#define EMAC_MACCONTROL_GIGFORCE (1 << 17)
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#define EMAC_MACCONTROL_RMIISPEED_100 (1 << 15)
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#define EMAC_MAC_ADDR_MATCH (1 << 19)
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#define EMAC_MAC_ADDR_IS_VALID (1 << 20)
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#define EMAC_RXMBPENABLE_RXCAFEN_ENABLE (0x200000)
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#define EMAC_RXMBPENABLE_RXBROADEN (0x2000)
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#define MDIO_CONTROL_IDLE (0x80000000)
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#define MDIO_CONTROL_ENABLE (0x40000000)
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#define MDIO_CONTROL_FAULT_ENABLE (0x40000)
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#define MDIO_CONTROL_FAULT (0x80000)
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#define MDIO_USERACCESS0_GO (0x80000000)
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#define MDIO_USERACCESS0_WRITE_READ (0x0)
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#define MDIO_USERACCESS0_WRITE_WRITE (0x40000000)
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#define MDIO_USERACCESS0_ACK (0x20000000)
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/* Ethernet MAC Registers */
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#define EMAC_TXIDVER 0x000
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#define EMAC_TXCONTROL 0x004
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#define EMAC_TXTEARDOWN 0x008
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#define EMAC_RXIDVER 0x010
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#define EMAC_RXCONTROL 0x014
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#define EMAC_RXTEARDOWN 0x018
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#define EMAC_TXINTSTATRAW 0x080
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#define EMAC_TXINTSTATMASKED 0x084
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#define EMAC_TXINTMASKSET 0x088
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#define EMAC_TXINTMASKCLEAR 0x08c
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#define EMAC_MACINVECTOR 0x090
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#define EMAC_MACEOIVECTOR 0x094
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#define EMAC_RXINTSTATRAW 0x0a0
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#define EMAC_RXINTSTATMASKED 0x0a4
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#define EMAC_RXINTMASKSET 0x0a8
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#define EMAC_RXINTMASKCLEAR 0x0ac
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#define EMAC_MACINTSTATRAW 0x0b0
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#define EMAC_MACINTSTATMASKED 0x0b4
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#define EMAC_MACINTMASKSET 0x0b8
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#define EMAC_MACINTMASKCLEAR 0x0bc
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#define EMAC_RXMBPENABLE 0x100
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#define EMAC_RXUNICASTSET 0x104
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#define EMAC_RXUNICASTCLEAR 0x108
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#define EMAC_RXMAXLEN 0x10c
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#define EMAC_RXBUFFEROFFSET 0x110
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#define EMAC_RXFILTERLOWTHRESH 0x114
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#define EMAC_RX0FLOWTHRESH 0x120
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#define EMAC_RX1FLOWTHRESH 0x124
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#define EMAC_RX2FLOWTHRESH 0x128
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#define EMAC_RX3FLOWTHRESH 0x12c
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#define EMAC_RX4FLOWTHRESH 0x130
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#define EMAC_RX5FLOWTHRESH 0x134
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#define EMAC_RX6FLOWTHRESH 0x138
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#define EMAC_RX7FLOWTHRESH 0x13c
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#define EMAC_RX0FREEBUFFER 0x140
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#define EMAC_RX1FREEBUFFER 0x144
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#define EMAC_RX2FREEBUFFER 0x148
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#define EMAC_RX3FREEBUFFER 0x14c
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#define EMAC_RX4FREEBUFFER 0x150
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#define EMAC_RX5FREEBUFFER 0x154
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#define EMAC_RX6FREEBUFFER 0x158
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#define EMAC_RX7FREEBUFFER 0x15c
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#define EMAC_MACCONTROL 0x160
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#define EMAC_MACSTATUS 0x164
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#define EMAC_EMCONTROL 0x168
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#define EMAC_FIFOCONTROL 0x16c
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#define EMAC_MACCONFIG 0x170
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#define EMAC_SOFTRESET 0x174
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#define EMAC_MACSRCADDRLO 0x1d0
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#define EMAC_MACSRCADDRHI 0x1d4
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#define EMAC_MACHASH1 0x1d8
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#define EMAC_MACHASH2 0x1dc
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#define EMAC_BOFFTEST 0x1e0
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#define EMAC_TPACETEST 0x1e4
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#define EMAC_RXPAUSE 0x1e8
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#define EMAC_TXPAUSE 0x1ec
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#define EMAC_RXGOODFRAMES 0x200
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#define EMAC_RXBCASTFRAMES 0x204
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#define EMAC_RXMCASTFRAMES 0x208
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#define EMAC_RXPAUSEFRAMES 0x20c
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#define EMAC_RXCRCERRORS 0x210
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#define EMAC_RXALIGNCODEERRORS 0x214
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#define EMAC_RXOVERSIZED 0x218
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#define EMAC_RXJABBER 0x21c
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#define EMAC_RXUNDERSIZED 0x220
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#define EMAC_RXFRAGMENTS 0x224
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#define EMAC_RXFILTERED 0x228
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#define EMAC_RXQOSFILTERED 0x22c
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#define EMAC_RXOCTETS 0x230
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#define EMAC_TXGOODFRAMES 0x234
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#define EMAC_TXBCASTFRAMES 0x238
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#define EMAC_TXMCASTFRAMES 0x23c
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#define EMAC_TXPAUSEFRAMES 0x240
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#define EMAC_TXDEFERRED 0x244
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#define EMAC_TXCOLLISION 0x248
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#define EMAC_TXSINGLECOLL 0x24c
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#define EMAC_TXMULTICOLL 0x250
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#define EMAC_TXEXCESSIVECOLL 0x254
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#define EMAC_TXLATECOLL 0x258
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#define EMAC_TXUNDERRUN 0x25c
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#define EMAC_TXCARRIERSENSE 0x260
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#define EMAC_TXOCTETS 0x264
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#define EMAC_FRAME64 0x268
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#define EMAC_FRAME65T127 0x26c
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#define EMAC_FRAME128T255 0x270
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#define EMAC_FRAME256T511 0x274
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#define EMAC_FRAME512T1023 0x278
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#define EMAC_FRAME1024TUP 0x27c
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#define EMAC_NETOCTETS 0x280
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#define EMAC_RXSOFOVERRUNS 0x284
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#define EMAC_RXMOFOVERRUNS 0x288
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#define EMAC_RXDMAOVERRUNS 0x28c
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#define EMAC_MACADDRLO 0x500
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#define EMAC_MACADDRHI 0x504
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#define EMAC_MACINDEX 0x508
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#define EMAC_TX0HDP 0x600
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#define EMAC_TX1HDP 0x604
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#define EMAC_TX2HDP 0x608
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#define EMAC_TX3HDP 0x60c
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#define EMAC_TX4HDP 0x610
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#define EMAC_TX5HDP 0x614
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#define EMAC_TX6HDP 0x618
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#define EMAC_TX7HDP 0x61c
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#define EMAC_RX0HDP 0x620
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#define EMAC_RX1HDP 0x624
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#define EMAC_RX2HDP 0x628
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#define EMAC_RX3HDP 0x62c
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#define EMAC_RX4HDP 0x630
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#define EMAC_RX5HDP 0x634
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#define EMAC_RX6HDP 0x638
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#define EMAC_RX7HDP 0x63c
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#define EMAC_TX0CP 0x640
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#define EMAC_TX1CP 0x644
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#define EMAC_TX2CP 0x648
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#define EMAC_TX3CP 0x64c
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#define EMAC_TX4CP 0x650
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#define EMAC_TX5CP 0x654
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#define EMAC_TX6CP 0x658
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#define EMAC_TX7CP 0x65c
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#define EMAC_RX0CP 0x660
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#define EMAC_RX1CP 0x664
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#define EMAC_RX2CP 0x668
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#define EMAC_RX3CP 0x66c
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#define EMAC_RX4CP 0x670
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#define EMAC_RX5CP 0x674
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#define EMAC_RX6CP 0x678
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#define EMAC_RX7CP 0x67c
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/* EMAC Wrapper Registers */
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#define EMAC_EWRAP_IDVER 0x00
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#define EMAC_EWRAP_SOFTRESET 0x04
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#define EMAC_EWRAP_INTCTRL 0x0c
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#define EMAC_EWRAP_C0RXTHRESHEN 0x10
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#define EMAC_EWRAP_C0RXEN 0x14
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#define EMAC_EWRAP_C0TXEN 0x18
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#define EMAC_EWRAP_C0MISCEN 0x1c
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#define EMAC_EWRAP_C1RXTHRESHEN 0x20
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#define EMAC_EWRAP_C1RXEN 0x24
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#define EMAC_EWRAP_C1TXEN 0x28
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#define EMAC_EWRAP_C1MISCEN 0x2c
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#define EMAC_EWRAP_C2RXTHRESHEN 0x30
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#define EMAC_EWRAP_C2RXEN 0x34
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#define EMAC_EWRAP_C2TXEN 0x38
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#define EMAC_EWRAP_C2MISCEN 0x3c
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#define EMAC_EWRAP_C0RXTHRESHSTAT 0x40
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#define EMAC_EWRAP_C0RXSTAT 0x44
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#define EMAC_EWRAP_C0TXSTAT 0x48
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#define EMAC_EWRAP_C0MISCSTAT 0x4c
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#define EMAC_EWRAP_C1RXTHRESHSTAT 0x50
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#define EMAC_EWRAP_C1RXSTAT 0x54
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#define EMAC_EWRAP_C1TXSTAT 0x58
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#define EMAC_EWRAP_C1MISCSTAT 0x5c
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#define EMAC_EWRAP_C2RXTHRESHSTAT 0x60
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#define EMAC_EWRAP_C2RXSTAT 0x64
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#define EMAC_EWRAP_C2TXSTAT 0x68
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#define EMAC_EWRAP_C2MISCSTAT 0x6c
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#define EMAC_EWRAP_C0RXIMAX 0x70
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#define EMAC_EWRAP_C0TXIMAX 0x74
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#define EMAC_EWRAP_C1RXIMAX 0x78
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#define EMAC_EWRAP_C1TXIMAX 0x7c
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#define EMAC_EWRAP_C2RXIMAX 0x80
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#define EMAC_EWRAP_C2TXIMAX 0x84
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/* EMAC MDIO Registers */
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#define EMAC_MDIO_VERSION 0x00
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#define EMAC_MDIO_CONTROL 0x04
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#define EMAC_MDIO_ALIVE 0x08
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#define EMAC_MDIO_LINK 0x0c
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#define EMAC_MDIO_LINKINTRAW 0x10
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#define EMAC_MDIO_LINKINTMASKED 0x14
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#define EMAC_MDIO_USERINTRAW 0x20
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#define EMAC_MDIO_USERINTMASKED 0x24
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#define EMAC_MDIO_USERINTMASKSET 0x28
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#define EMAC_MDIO_USERINTMASKCLEAR 0x2c
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#define EMAC_MDIO_USERACCESS0 0x80
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#define EMAC_MDIO_USERPHYSEL0 0x84
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#define EMAC_MDIO_USERACCESS1 0x88
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#define EMAC_MDIO_USERPHYSEL1 0x8c
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#endif /* _DAVINCI_EMAC_H_ */
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