166 lines
3.8 KiB
C
166 lines
3.8 KiB
C
/*
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* JZ4740 SoC RTC driver
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*
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* This code was ported from linux-3.15 kernel by Antony Pavlov.
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*
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* Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
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* Copyright (C) 2010, Paul Cercueil <paul@crapouillou.net>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include <common.h>
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#include <init.h>
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#include <driver.h>
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#include <xfuncs.h>
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#include <errno.h>
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#include <io.h>
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#include <rtc.h>
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#include <linux/rtc.h>
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#define JZ_REG_RTC_CTRL 0x00
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#define JZ_REG_RTC_SEC 0x04
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#define JZ_REG_RTC_SEC_ALARM 0x08
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#define JZ_REG_RTC_REGULATOR 0x0C
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#define JZ_REG_RTC_HIBERNATE 0x20
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#define JZ_REG_RTC_SCRATCHPAD 0x34
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#define JZ_RTC_CTRL_WRDY BIT(7)
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struct jz4740_rtc {
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struct rtc_device rtc;
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void __iomem *base;
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};
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static inline uint32_t jz4740_rtc_reg_read(struct jz4740_rtc *rtc, size_t reg)
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{
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return readl(rtc->base + reg);
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}
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static int jz4740_rtc_wait_write_ready(struct jz4740_rtc *rtc)
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{
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uint32_t ctrl;
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int timeout = 1000;
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do {
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ctrl = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CTRL);
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} while (!(ctrl & JZ_RTC_CTRL_WRDY) && --timeout);
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return timeout ? 0 : -EIO;
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}
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static inline int jz4740_rtc_reg_write(struct jz4740_rtc *rtc, size_t reg,
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uint32_t val)
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{
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int ret;
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ret = jz4740_rtc_wait_write_ready(rtc);
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if (ret == 0)
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writel(val, rtc->base + reg);
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return ret;
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}
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static inline struct jz4740_rtc *to_jz4740_rtc_priv(struct rtc_device *rtcdev)
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{
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return container_of(rtcdev, struct jz4740_rtc, rtc);
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}
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static int jz4740_rtc_read_time(struct rtc_device *rtcdev, struct rtc_time *time)
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{
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struct jz4740_rtc *rtc = to_jz4740_rtc_priv(rtcdev);
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uint32_t secs, secs2;
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int timeout = 5;
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/* If the seconds register is read while it is updated, it can contain a
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* bogus value. This can be avoided by making sure that two consecutive
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* reads have the same value.
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*/
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secs = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_SEC);
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secs2 = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_SEC);
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while (secs != secs2 && --timeout) {
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secs = secs2;
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secs2 = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_SEC);
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}
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if (timeout == 0)
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return -EIO;
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rtc_time_to_tm(secs, time);
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return rtc_valid_tm(time);
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}
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static int jz4740_rtc_set_time(struct rtc_device *rtcdev, struct rtc_time *t)
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{
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struct jz4740_rtc *rtc = to_jz4740_rtc_priv(rtcdev);
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unsigned long secs;
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rtc_tm_to_time(t, &secs);
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return jz4740_rtc_reg_write(rtc, JZ_REG_RTC_SEC, secs);
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}
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static struct rtc_class_ops jz4740_rtc_ops = {
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.read_time = jz4740_rtc_read_time,
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.set_time = jz4740_rtc_set_time,
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};
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static int jz4740_rtc_probe(struct device_d *dev)
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{
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int ret;
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struct jz4740_rtc *rtc;
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uint32_t scratchpad;
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void __iomem *base;
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base = dev_request_mem_region(dev, 0);
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if (!base) {
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dev_err(dev, "could not get memory region\n");
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return -ENODEV;
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}
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rtc = xzalloc(sizeof(*rtc));
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rtc->base = base;
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rtc->rtc.ops = &jz4740_rtc_ops;
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rtc->rtc.dev = dev;
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ret = rtc_register(&rtc->rtc);
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if (ret) {
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dev_err(dev, "Failed to register rtc device: %d\n", ret);
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return ret;
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}
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scratchpad = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_SCRATCHPAD);
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if (scratchpad != 0x12345678) {
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ret = jz4740_rtc_reg_write(rtc, JZ_REG_RTC_SCRATCHPAD, 0x12345678);
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ret = jz4740_rtc_reg_write(rtc, JZ_REG_RTC_SEC, 0);
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if (ret) {
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dev_err(dev, "Could not write write to RTC registers\n");
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return ret;
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}
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}
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return 0;
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}
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static __maybe_unused struct of_device_id jz4740_rtc_dt_ids[] = {
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{
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.compatible = "ingenic,jz4740-rtc",
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}, {
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/* sentinel */
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}
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};
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static struct driver_d jz4740_rtc_driver = {
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.name = "jz4740-rtc",
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.probe = jz4740_rtc_probe,
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.of_compatible = DRV_OF_COMPAT(jz4740_rtc_dt_ids),
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};
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device_platform_driver(jz4740_rtc_driver);
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