barebox/arch/arm/mach-pxa/common.c
Marc Kleine-Budde 36c47ce426 arm/mach-pxa: Initial Intel/Marvell PXA support
The core support was brought by Marc and Sascha.
The cache choice was fixed by Luotao Fu.
Some gpio and devices addons were provided by Robert.

Signed-off-by: Luotao Fu <l.fu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-12-05 09:30:27 +01:00

38 lines
1.1 KiB
C

/*
* (C) Copyright 2009 Sascha Hauer <s.hauer@pengutronix.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <common.h>
#include <asm/io.h>
#define OSMR3 0x40A0000C
#define OSCR 0x40A00010
#define OSSR 0x40A00014
#define OWER 0x40A00018
#define OWER_WME (1 << 0) /* Watch-dog Match Enable */
#define OSSR_M3 (1 << 3) /* Match status channel 3 */
void reset_cpu(ulong addr)
{
/* Initialize the watchdog and let it fire */
writel(OWER_WME, OWER);
writel(OSSR_M3, OSSR);
writel(readl(OSCR) + 368640, OSMR3); /* ... in 100 ms */
while (1);
}