428 lines
14 KiB
C
428 lines
14 KiB
C
/*
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* Copyright (C) 2011 Alexander Aring <a.aring@phytec.de>
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*
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* This file is released under the GPLv2
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*
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*/
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#ifndef __MFD_TWL6030_H__
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#define __MFD_TWL6030_H__
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#include <mfd/twl-core.h>
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/* VMMC_CFG_VOLTAGE */
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#define TWL6030_VMMC_VSEL_0 (1 << 0)
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#define TWL6030_VMMC_VSEL_1 (1 << 1)
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#define TWL6030_VMMC_VSEL_2 (1 << 2)
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#define TWL6030_VMMC_VSEL_3 (1 << 3)
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#define TWL6030_VMMC_VSEL_4 (1 << 4)
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#define TWL6030_VMMC_WR_S (1 << 7)
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/* VMMC_CFG_STATE (W) */
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#define TWL6030_VMMC_STATE0 (1 << 0)
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#define TWL6030_VMMC_STATE1 (1 << 1)
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#define TWL6030_VMMC_GRP_APP (1 << 5)
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#define TWL6030_VMMC_GRP_CON (1 << 6)
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#define TWL6030_VMMC_GRP_MOD (1 << 7)
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enum twl6030_reg {
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/* RTC */
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TWL6030_RTC_SECONDS = 0x0000,
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TWL6030_RTC_MINUTES = 0x0001,
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TWL6030_RTC_HOURS = 0x0002,
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TWL6030_RTC_DAYS = 0x0003,
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TWL6030_RTC_MONTHS = 0x0004,
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TWL6030_RTC_YEARS = 0x0005,
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TWL6030_RTC_WEEKS = 0x0006,
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TWL6030_RTC_ALARM_SECONDS = 0x0008,
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TWL6030_RTC_ALARM_MINUTES = 0x0009,
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TWL6030_RTC_ALARM_HOURS = 0x000A,
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TWL6030_RTC_ALARM_DAYS = 0x000B,
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TWL6030_RTC_ALARM_MONTHS = 0x000C,
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TWL6030_RTC_ALARM_YEARS = 0x000D,
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TWL6030_RTC_CTRL = 0x0010,
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TWL6030_RTC_STATUS = 0x0011,
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TWL6030_RTC_INTERRUPTS = 0x0012,
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TWL6030_RTC_COMP_LSB = 0x0013,
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TWL6030_RTC_COMP_MSB = 0x0014,
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TWL6030_RTC_RESET_STATUS = 0x0016,
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/* MEM */
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TWL6030_MEM_VALIDITY0 = 0x0017,
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TWL6030_MEM_VALIDITY1 = 0x0018,
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TWL6030_MEM_VALIDITY2 = 0x0019,
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TWL6030_MEM_VALIDITY3 = 0x001A,
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TWL6030_MEM_VALIDITY4 = 0x001B,
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TWL6030_MEM_VALIDITY5 = 0x001C,
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TWL6030_MEM_VALIDITY6 = 0x001D,
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TWL6030_MEM_VALIDITY7 = 0x001E,
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/* PMC Master */
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TWL6030_PMCM_START = 0x001F,
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TWL6030_PMCM_MSK = 0x0020,
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TWL6030_PMCM_HW = 0x0021,
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TWL6030_PMCM_TURNOFF = 0x0022,
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TWL6030_PMCM_VBAT_THRESHOLD_LO = 0x0023,
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TWL6030_PMCM_VBAT_THRESHOLD_HI = 0x0024,
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TWL6030_PMCM_DEV_ON = 0x0025,
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TWL6030_PMCM_PWR_GRP_STATE = 0x0027,
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TWL6030_PMCM_CFG_VBATLOWV = 0x0028,
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TWL6030_PMCM_STS_BOOT = 0x0029,
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TWL6030_PMCM_SENS_TRANSITION = 0x002A,
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TWL6030_PMCM_SEQ_CFG = 0x002B,
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TWL6030_PMCM_PRIMARY_WATCHDOG_CFG = 0x002C,
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TWL6030_PMCM_KEY_PRESS_DURATION_CFG = 0x002D,
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/* PMC Slave MISC */
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TWL6030_PMCS_ADDRESS_ALL = 0x0031,
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TWL6030_PMCS_ADDRESS_REF = 0x0032,
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TWL6030_PMCS_ADDRESS_PROV = 0x0033,
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TWL6030_PMCS_ADDRESS_CLK_RST = 0x0034,
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/* PMC Slave SMPS */
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TWL6030_PMCS_V1V29_CFG_GRP = 0x0040,
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TWL6030_PMCS_V1V29_CFG_TRANS = 0x0041,
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TWL6030_PMCS_V1V29_CFG_STATE = 0x0042,
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TWL6030_PMCS_V1V29_CFG_VOLTAGE = 0x0044,
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TWL6030_PMCS_V1V8_CFG_GRP = 0x0046,
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TWL6030_PMCS_V1V8_CFG_TRANS = 0x0047,
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TWL6030_PMCS_V1V8_CFG_STATE = 0x0048,
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TWL6030_PMCS_V1V8_CFG_VOLTAGE = 0x004A,
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TWL6030_PMCS_V2V1_CFG_GRP = 0x004C,
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TWL6030_PMCS_V2V1_CFG_TRANS = 0x004D,
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TWL6030_PMCS_V2V1_CFG_STATE = 0x004E,
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TWL6030_PMCS_V2V1_CFG_VOLTAGE = 0x0050,
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TWL6030_PMCS_VCORE1_CFG_GRP = 0x0052,
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TWL6030_PMCS_VCORE1_CFG_TRANS = 0x0053,
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TWL6030_PMCS_VCORE1_CFG_STATE = 0x0054,
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TWL6030_PMCS_VCORE1_CFG_STEP = 0x0057,
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TWL6030_PMCS_VCORE2_CFG_GRP = 0x0058,
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TWL6030_PMCS_VCORE2_CFG_TRANS = 0x0059,
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TWL6030_PMCS_VCORE2_CFG_STATE = 0x005A,
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TWL6030_PMCS_VCORE2_CFG_STEP = 0x005D,
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TWL6030_PMCS_VCORE3_CFG_GRP = 0x005E,
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TWL6030_PMCS_VCORE3_CFG_TRANS = 0x005F,
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TWL6030_PMCS_VCORE3_CFG_STATE = 0x0060,
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TWL6030_PMCS_VCORE3_CFG_STEP = 0x0063,
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TWL6030_PMCS_VMEM_CFG_GRP = 0x0064,
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TWL6030_PMCS_VMEM_CFG_TRANS = 0x0065,
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TWL6030_PMCS_VMEM_CFG_STATE = 0x0066,
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TWL6030_PMCS_VMEM_CFG_VOLTAGE = 0x0068,
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/* PMC Slave LDO */
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TWL6030_PMCS_VANA_CFG_GRP = 0x0080,
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TWL6030_PMCS_VANA_CFG_TRANS = 0x0081,
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TWL6030_PMCS_VANA_CFG_STATE = 0x0082,
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TWL6030_PMCS_VANA_CFG_VOLTAGE = 0x0083,
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TWL6030_PMCS_VAUX1_CFG_GRP = 0x0084,
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TWL6030_PMCS_VAUX1_CFG_TRANS = 0x0085,
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TWL6030_PMCS_VAUX1_CFG_STATE = 0x0086,
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TWL6030_PMCS_VAUX1_CFG_VOLTAGE = 0x0087,
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TWL6030_PMCS_VAUX2_CFG_GRP = 0x0088,
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TWL6030_PMCS_VAUX2_CFG_TRANS = 0x0089,
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TWL6030_PMCS_VAUX2_CFG_STATE = 0x008A,
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TWL6030_PMCS_VAUX2_CFG_VOLTAGE = 0x008B,
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TWL6030_PMCS_VAUX3_CFG_GRP = 0x008C,
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TWL6030_PMCS_VAUX3_CFG_TRANS = 0x008D,
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TWL6030_PMCS_VAUX3_CFG_STATE = 0x008E,
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TWL6030_PMCS_VAUX3_CFG_VOLTAGE = 0x008F,
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TWL6030_PMCS_VCXIO_CFG_GRP = 0x0090,
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TWL6030_PMCS_VCXIO_CFG_TRANS = 0x0091,
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TWL6030_PMCS_VCXIO_CFG_STATE = 0x0092,
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TWL6030_PMCS_VCXIO_CFG_VOLTAGE = 0x0093,
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TWL6030_PMCS_VDAC_CFG_GRP = 0x0094,
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TWL6030_PMCS_VDAC_CFG_TRANS = 0x0095,
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TWL6030_PMCS_VDAC_CFG_STATE = 0x0096,
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TWL6030_PMCS_VDAC_CFG_VOLTAGE = 0x0097,
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TWL6030_PMCS_VMMC_CFG_GRP = 0x0098,
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TWL6030_PMCS_VMMC_CFG_TRANS = 0x0099,
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TWL6030_PMCS_VMMC_CFG_STATE = 0x009A,
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TWL6030_PMCS_VMMC_CFG_VOLTAGE = 0x009B,
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TWL6030_PMCS_VPP_CFG_GRP = 0x009C,
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TWL6030_PMCS_VPP_CFG_TRANS = 0x009D,
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TWL6030_PMCS_VPP_CFG_STATE = 0x009E,
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TWL6030_PMCS_VPP_CFG_VOLTAGE = 0x009F,
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TWL6030_PMCS_VUSB_CFG_GRP = 0x00A0,
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TWL6030_PMCS_VUSB_CFG_TRANS = 0x00A1,
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TWL6030_PMCS_VUSB_CFG_STATE = 0x00A2,
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TWL6030_PMCS_VUSB_CFG_VOLTAGE = 0x00A3,
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TWL6030_PMCS_VUSIM_CFG_GRP = 0x00A4,
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TWL6030_PMCS_VUSIM_CFG_TRANS = 0x00A5,
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TWL6030_PMCS_VUSIM_CFG_STATE = 0x00A6,
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TWL6030_PMCS_VUSIM_CFG_VOLTAGE = 0x00A7,
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/* Resource Register Map */
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TWL6030_PMCS_REGEN1_CFG_GRP = 0x00AD,
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TWL6030_PMCS_REGEN1_CFG_TRANS = 0x00AE,
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TWL6030_PMCS_REGEN1_CFG_STATE = 0x00AF,
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TWL6030_PMCS_REGEN2_CFG_GRP = 0x00B0,
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TWL6030_PMCS_REGEN2_CFG_TRANS = 0x00B1,
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TWL6030_PMCS_REGEN2_CFG_STATE = 0x00B2,
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TWL6030_PMCS_SYSEN_CFG_GRP = 0x00B3,
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TWL6030_PMCS_SYSEN_CFG_TRANS = 0x00B4,
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TWL6030_PMCS_SYSEN_CFG_STATE = 0x00B5,
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TWL6030_PMCS_NRESPWRON_CFG_GRP = 0x00B6,
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TWL6030_PMCS_NRESPWRON_CFG_TRANS = 0x00B7,
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TWL6030_PMCS_NRESPWRON_CFG_STATE = 0x00B8,
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TWL6030_PMCS_CLK32KAO_CFG_GRP = 0x00B9,
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TWL6030_PMCS_CLK32KAO_CFG_TRANS = 0x00BA,
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TWL6030_PMCS_CLK32KAO_CFG_STATE = 0x00BB,
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TWL6030_PMCS_CLK32KG_CFG_GRP = 0x00BC,
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TWL6030_PMCS_CLK32KG_CFG_TRANS = 0x00BD,
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TWL6030_PMCS_CLK32KG_CFG_STATE = 0x00BE,
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TWL6030_PMCS_CLK32KAUDIO_CFG_GRP = 0x00BF,
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TWL6030_PMCS_CLK32KAUDIO_CFG_TRANS = 0x00C0,
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TWL6030_PMCS_CLK32KAUDIO_CFG_STATE = 0x00C1,
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TWL6030_PMCS_VRTC_CFG_GRP = 0x00C2,
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TWL6030_PMCS_VRTC_CFG_TRANS = 0x00C3,
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TWL6030_PMCS_VRTC_CFG_STATE = 0x00C4,
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TWL6030_PMCS_BIAS_CFG_GRP = 0x00C5,
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TWL6030_PMCS_BIAS_CFG_TRANS = 0x00C6,
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TWL6030_PMCS_BIAS_CFG_STATE = 0x00C7,
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TWL6030_PMCS_VBATMIN_CFG_GRP = 0x00C8,
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TWL6030_PMCS_VBATMIN_CFG_TRANS = 0x00C9,
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TWL6030_PMCS_VBATMIN_CFG_STATE = 0x00CA,
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TWL6030_PMCS_RC6MHZ_CFG_GRP = 0x00CB,
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TWL6030_PMCS_RC6MHZ_CFG_TRANS = 0x00CC,
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TWL6030_PMCS_RC6MHZ_CFG_STATE = 0x00CD,
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TWL6030_PMCS_TMP_CFG_GRP = 0x00CE,
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TWL6030_PMCS_TMP_CFG_TRANS = 0x00CF,
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TWL6030_PMCS_TMP_CFG_STATE = 0x00D0,
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/* Misc Register */
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TWL6030_PMC_SMPS_OFFSET = 0x00E0,
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TWL6030_PMC_SMPS_MULT = 0x00E3,
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TWL6030_PMC_SMPS_MISC1 = 0x00E4,
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TWL6030_PMC_SMPS_MISC2 = 0x00E5,
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TWL6030_PMC_SMPS_BBSPOR_CFG = 0x00E6,
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TWL6030_PMC_SMPS_TMP_CFG = 0x00E7,
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TWL6030_PMC_SMPS_FORCE_SMPS_CLK = 0x00E8,
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TWL6030_PMC_SMPS_SIMDEBOUNCING = 0x00EB,
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TWL6030_PMC_SMPS_SIMCTRL = 0x00EC,
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TWL6030_PMC_SMPS_MMCDEBOUNCING = 0x00ED,
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TWL6030_PMC_SMPS_MMCCTRL = 0x00EE,
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TWL6030_PMC_SMPS_BATDEBOUNCING = 0x00EF,
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/* Pull-up | Pull-down | High-Z */
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TWL6030_PMC_CFG_INPUT_PUPD1 = 0x00F0,
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TWL6030_PMC_CFG_INPUT_PUPD2 = 0x00F1,
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TWL6030_PMC_CFG_INPUT_PUPD3 = 0x00F2,
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TWL6030_PMC_CFG_INPUT_PUPD4 = 0x00F3,
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TWL6030_PMC_CFG_LDO_PD1 = 0x00F4,
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TWL6030_PMC_CFG_LDO_PD2 = 0x00F5,
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TWL6030_PMC_CFG_SMPS_PD = 0x00F6,
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/* OTG Backup */
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TWL6030_OTG_BACKUP_REG = 0x00FA,
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/* USB OTG */
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TWL6030_OTG_USB_VENDORID_LO = 0x0100,
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TWL6030_OTG_USB_VENDORID_HI = 0x0101,
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TWL6030_OTG_USB_PRODUCTID_LO = 0x0102,
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TWL6030_OTG_USB_PRODUCTID_HI = 0x0103,
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TWL6030_OTG_USB_VBUS_CTRL_SET = 0x0104,
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TWL6030_OTG_USB_VBUS_CTRL_CLR = 0x0105,
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TWL6030_OTG_USB_ID_CTRL_SET = 0x0106,
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TWL6030_OTG_USB_ID_CTRL_CLR = 0x0107,
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TWL6030_OTG_USB_VBUS_INT_SRC = 0x0108,
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TWL6030_OTG_USB_VBUS_INT_LATCH_SET = 0x0109,
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TWL6030_OTG_USB_VBUS_INT_LATCH_CLR = 0x010A,
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TWL6030_OTG_USB_VBUS_INT_EN_LO_SET = 0x010B,
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TWL6030_OTG_USB_VBUS_INT_EN_LO_CLR = 0x010C,
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TWL6030_OTG_USB_VBUS_INT_EN_HI_SET = 0x010D,
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TWL6030_OTG_USB_VBUS_INT_EN_HI_CLR = 0x010E,
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TWL6030_OTG_USB_ID_INT_SRC = 0x010F,
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TWL6030_OTG_USB_ID_INT_LATCH_SET = 0x0110,
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TWL6030_OTG_USB_ID_INT_LATCH_CLR = 0x0111,
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TWL6030_OTG_USB_ID_INT_EN_LO_SET = 0x0112,
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TWL6030_OTG_USB_ID_INT_EN_LO_CLR = 0x0113,
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TWL6030_OTG_USB_ID_INT_EN_HI_SET = 0x0114,
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TWL6030_OTG_USB_ID_INT_EN_HI_CLR = 0x0115,
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TWL6030_OTG_USB_ADP_CTRL = 0x0116,
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TWL6030_OTG_USB_ADP_HIGH = 0x0117,
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TWL6030_OTG_USB_ADP_LOW = 0x0118,
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TWL6030_OTG_USB_ADP_RISE = 0x0119,
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/* GPADC Control */
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TWL6030_GPADC_CTRL = 0x012E,
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TWL6030_GPADC_RTSELECT_LSB = 0x0130,
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TWL6030_GPADC_RTSELECT_ISB = 0x0131,
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TWL6030_GPADC_RTSELECT_MSB = 0x0132,
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TWL6030_GPADC_CTRL_P1 = 0x0133,
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TWL6030_GPADC_CTRL_P2 = 0x0134,
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/* GPADC Real Time */
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TWL6030_GPADC_RTCH0_LO = 0x0135,
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TWL6030_GPADC_RTCH0_HI = 0x0136,
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TWL6030_GPADC_RTCH1_LO = 0x0137,
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TWL6030_GPADC_RTCH1_HI = 0x0138,
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TWL6030_GPADC_RTCH2_LO = 0x0139,
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TWL6030_GPADC_RTCH2_HI = 0x013A,
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TWL6030_GPADC_RTCH3_LO = 0x013B,
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TWL6030_GPADC_RTCH3_HI = 0x013C,
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TWL6030_GPADC_RTCH4_LO = 0x013D,
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TWL6030_GPADC_RTCH4_HI = 0x013E,
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TWL6030_GPADC_RTCH5_LO = 0x013F,
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TWL6030_GPADC_RTCH5_HI = 0x0140,
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TWL6030_GPADC_RTCH6_LO = 0x0141,
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TWL6030_GPADC_RTCH6_HI = 0x0142,
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TWL6030_GPADC_RTCH7_LO = 0x0143,
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TWL6030_GPADC_RTCH7_HI = 0x0144,
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TWL6030_GPADC_RTCH8_LO = 0x0145,
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TWL6030_GPADC_RTCH8_HI = 0x0146,
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TWL6030_GPADC_RTCH9_LO = 0x0147,
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TWL6030_GPADC_RTCH9_HI = 0x0148,
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TWL6030_GPADC_RTCH10_LO = 0x0149,
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TWL6030_GPADC_RTCH10_HI = 0x014A,
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TWL6030_GPADC_RTCH11_LO = 0x014B,
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TWL6030_GPADC_RTCH11_HI = 0x014C,
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TWL6030_GPADC_RTCH12_LO = 0x014D,
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TWL6030_GPADC_RTCH12_HI = 0x014E,
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TWL6030_GPADC_RTCH13_LO = 0x014F,
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TWL6030_GPADC_RTCH13_HI = 0x0150,
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TWL6030_GPADC_RTCH14_LO = 0x0151,
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TWL6030_GPADC_RTCH14_HI = 0x0152,
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TWL6030_GPADC_RTCH15_LO = 0x0153,
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TWL6030_GPADC_RTCH15_HI = 0x0154,
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TWL6030_GPADC_RTCH16_LO = 0x0155,
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TWL6030_GPADC_RTCH16_HI = 0x0156,
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/* GPADC General Purpose */
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TWL6030_GPADC_GPCH0_LO = 0x0157,
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TWL6030_GPADC_GPCH0_HI = 0x0158,
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TWL6030_GPADC_GPCH1_LO = 0x0159,
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TWL6030_GPADC_GPCH1_HI = 0x015A,
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TWL6030_GPADC_GPCH2_LO = 0x015B,
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TWL6030_GPADC_GPCH2_HI = 0x015C,
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TWL6030_GPADC_GPCH3_LO = 0x015D,
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TWL6030_GPADC_GPCH3_HI = 0x015E,
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TWL6030_GPADC_GPCH4_LO = 0x015F,
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TWL6030_GPADC_GPCH4_HI = 0x0160,
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TWL6030_GPADC_GPCH5_LO = 0x0161,
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TWL6030_GPADC_GPCH5_HI = 0x0162,
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TWL6030_GPADC_GPCH6_LO = 0x0163,
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TWL6030_GPADC_GPCH6_HI = 0x0164,
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TWL6030_GPADC_GPCH7_LO = 0x0165,
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TWL6030_GPADC_GPCH7_HI = 0x0166,
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TWL6030_GPADC_GPCH8_LO = 0x0167,
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TWL6030_GPADC_GPCH8_HI = 0x0168,
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TWL6030_GPADC_GPCH9_LO = 0x0169,
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TWL6030_GPADC_GPCH9_HI = 0x016A,
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TWL6030_GPADC_GPCH10_LO = 0x016B,
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TWL6030_GPADC_GPCH10_HI = 0x016C,
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TWL6030_GPADC_GPCH11_LO = 0x016D,
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TWL6030_GPADC_GPCH11_HI = 0x016E,
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TWL6030_GPADC_GPCH12_LO = 0x016F,
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TWL6030_GPADC_GPCH12_HI = 0x0170,
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TWL6030_GPADC_GPCH13_LO = 0x0171,
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TWL6030_GPADC_GPCH13_HI = 0x0172,
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TWL6030_GPADC_GPCH14_LO = 0x0173,
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TWL6030_GPADC_GPCH14_HI = 0x0174,
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TWL6030_GPADC_GPCH15_LO = 0x0175,
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TWL6030_GPADC_GPCH15_HI = 0x0176,
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TWL6030_GPADC_GPCH16_LO = 0x0177,
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TWL6030_GPADC_GPCH16_HI = 0x0178,
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/* Auxiliaries Register */
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TWL6030_AUX_TOGGLE1 = 0x0190,
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TWL6030_AUX_TOGGLE2 = 0x0191,
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TWL6030_AUX_TOGGLE3 = 0x0192,
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TWL6030_AUX_PWDNSTATUS1 = 0x0193,
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TWL6030_AUX_PWDNSTATUS2 = 0x0194,
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TWL6030_AUX_VIBCTRL = 0x019B,
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TWL6030_AUX_VIBMODE = 0x019C,
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/* PWM Register */
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TWL6030_PWM_PWM1ON = 0x019C,
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TWL6030_PWM_PWM1OFF = 0x019C,
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TWL6030_PWM_PWM2ON = 0x019C,
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TWL6030_PWM_PWM2OFF = 0x019C,
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/* Gas Gauge Register */
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TWL6030_FG_REG_00 = 0x01C0,
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TWL6030_FG_REG_01 = 0x01C1,
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TWL6030_FG_REG_02 = 0x01C2,
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TWL6030_FG_REG_03 = 0x01C3,
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TWL6030_FG_REG_04 = 0x01C4,
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TWL6030_FG_REG_05 = 0x01C5,
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TWL6030_FG_REG_06 = 0x01C6,
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TWL6030_FG_REG_07 = 0x01C7,
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TWL6030_FG_REG_08 = 0x01C8,
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TWL6030_FG_REG_09 = 0x01C9,
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TWL6030_FG_REG_10 = 0x01CA,
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TWL6030_FG_REG_11 = 0x01CB,
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/* Interfaces Interrupts */
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TWL6030_INT_STS_A = 0x01D0,
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TWL6030_INT_STS_B = 0x01D1,
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TWL6030_INT_STS_C = 0x01D2,
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TWL6030_INT_MSK_LINE_A = 0x01D3,
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TWL6030_INT_MSK_LINE_B = 0x01D4,
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TWL6030_INT_MSK_LINE_C = 0x01D5,
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TWL6030_INT_MSK_STS_A = 0x01D6,
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TWL6030_INT_MSK_STS_B = 0x01D7,
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TWL6030_INT_MSK_STS_C = 0x01D8,
|
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/* Charger Regisers */
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TWL6030_CHR_CONTROLLER_INT_MASK = 0x01E0,
|
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TWL6030_CHR_CONTROLLER_CTRL1 = 0x01E1,
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TWL6030_CHR_CONTROLLER_WDG = 0x01E2,
|
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TWL6030_CHR_CONTROLLER_STAT1 = 0x01E3,
|
|
TWL6030_CHR_CHARGERUSB_INT_STATUS = 0x01E4,
|
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TWL6030_CHR_CHARGERUSB_INT_MASK = 0x01E5,
|
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TWL6030_CHR_CHARGERUSB_STATUS_INT1 = 0x01E6,
|
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TWL6030_CHR_CHARGERUSB_STATUS_INT2 = 0x01E7,
|
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TWL6030_CHR_CHARGERUSB_CTRL1 = 0x01E8,
|
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TWL6030_CHR_CHARGERUSB_CTRL2 = 0x01E9,
|
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TWL6030_CHR_CHARGERUSB_CTRL3 = 0x01EA,
|
|
TWL6030_CHR_CHARGERUSB_STAT1 = 0x01EB,
|
|
TWL6030_CHR_CHARGERUSB_VOREG = 0x01EC,
|
|
TWL6030_CHR_CHARGERUSB_VICHRG = 0x01ED,
|
|
TWL6030_CHR_CHARGERUSB_CINLIMIT = 0x01EE,
|
|
TWL6030_CHR_CHARGERUSB_CTRLLIMIT1 = 0x01EF,
|
|
TWL6030_CHR_CHARGERUSB_CTRLLIMIT2 = 0x01F0,
|
|
TWL6030_CHR_ANTICOLLAPSE_CTRL1 = 0x01F1,
|
|
TWL6030_CHR_ANTICOLLAPSE_CTRL2 = 0x01F2,
|
|
TWL6030_CHR_ANTICOLLAPSE_STAT1 = 0x01F3,
|
|
TWL6030_CHR_LED_PWM_CTRL1 = 0x01F4,
|
|
TWL6030_CHR_LED_PWM_CTRL2 = 0x01F5,
|
|
/* JTAG */
|
|
TWL6030_JTAG_JTAGVERNUM = 0x0287,
|
|
TWL6030_JTAG_EPROM_REV = 0x02DF,
|
|
TWL6030_DIEID_0 = 0x02C0,
|
|
TWL6030_DIEID_1 = 0x02C1,
|
|
TWL6030_DIEID_2 = 0x02C2,
|
|
TWL6030_DIEID_3 = 0x02C3,
|
|
TWL6030_DIEID_4 = 0x02C4,
|
|
TWL6030_DIEID_5 = 0x02C5,
|
|
TWL6030_DIEID_6 = 0x02C6,
|
|
TWL6030_DIEID_7 = 0x02C7,
|
|
/* GPADC Trimming */
|
|
TWL6030_GPADC_TRIM1 = 0x02CD,
|
|
TWL6030_GPADC_TRIM2 = 0x02CE,
|
|
TWL6030_GPADC_TRIM3 = 0x02CF,
|
|
TWL6030_GPADC_TRIM4 = 0x02D0,
|
|
TWL6030_GPADC_TRIM5 = 0x02D1,
|
|
TWL6030_GPADC_TRIM6 = 0x02D2,
|
|
TWL6030_GPADC_TRIM7 = 0x02D3,
|
|
TWL6030_GPADC_TRIM8 = 0x02D4,
|
|
TWL6030_GPADC_TRIM9 = 0x02D5,
|
|
TWL6030_GPADC_TRIM10 = 0x02D6,
|
|
TWL6030_GPADC_TRIM11 = 0x02D7,
|
|
TWL6030_GPADC_TRIM12 = 0x02D8,
|
|
TWL6030_GPADC_TRIM13 = 0x02D9,
|
|
TWL6030_GPADC_TRIM14 = 0x02DA,
|
|
TWL6030_GPADC_TRIM15 = 0x02DB,
|
|
TWL6030_GPADC_TRIM16 = 0x02DC,
|
|
TWL6030_GPADC_TRIM17 = 0x02DD,
|
|
TWL6030_GPADC_TRIM18 = 0x02DE,
|
|
};
|
|
|
|
struct twl6030 {
|
|
struct twlcore core;
|
|
};
|
|
|
|
extern struct twl6030 *twl6030_get(void);
|
|
|
|
static inline int twl6030_reg_read(struct twl6030 *twl6030,
|
|
enum twl6030_reg reg, u8 *val)
|
|
{
|
|
return twlcore_reg_read(&twl6030->core, reg, val);
|
|
}
|
|
|
|
static inline int twl6030_reg_write(struct twl6030 *twl6030,
|
|
enum twl6030_reg reg, u8 val)
|
|
{
|
|
return twlcore_reg_write(&twl6030->core, reg, val);
|
|
}
|
|
|
|
static inline int twl6030_set_bits(struct twl6030 *twl6030,
|
|
enum twl6030_reg reg, u8 mask, u8 val)
|
|
{
|
|
return twlcore_set_bits(&twl6030->core, reg, mask, val);
|
|
}
|
|
|
|
#endif /* __MFD_TWL6030_H__ */
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