141 lines
3.5 KiB
C
141 lines
3.5 KiB
C
#include <common.h>
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#include <init.h>
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#include <linux/sizes.h>
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#include <io.h>
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#include <linux/string.h>
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#include <debug_ll.h>
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#include <asm/barebox-arm-head.h>
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#include <asm/barebox-arm.h>
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#include <mach/am33xx-silicon.h>
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#include <mach/am33xx-clock.h>
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#include <mach/generic.h>
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#include <mach/sdrc.h>
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#include <mach/sys_info.h>
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#include <mach/syslib.h>
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#include <mach/am33xx-mux.h>
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#include <mach/am33xx-generic.h>
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#include <mach/wdt.h>
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static const struct am33xx_ddr_data ddr3_data = {
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.rd_slave_ratio0 = 0x38,
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.wr_dqs_slave_ratio0 = 0x44,
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.fifo_we_slave_ratio0 = 0x94,
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.wr_slave_ratio0 = 0x7D,
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.use_rank0_delay = 0x01,
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.dll_lock_diff0 = 0x0,
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};
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static const struct am33xx_cmd_control ddr3_cmd_ctrl = {
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.slave_ratio0 = 0x80,
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.dll_lock_diff0 = 0x1,
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.invert_clkout0 = 0x0,
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.slave_ratio1 = 0x80,
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.dll_lock_diff1 = 0x1,
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.invert_clkout1 = 0x0,
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.slave_ratio2 = 0x80,
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.dll_lock_diff2 = 0x1,
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.invert_clkout2 = 0x0,
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};
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static const struct am33xx_emif_regs ddr3_regs = {
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.emif_read_latency = 0x100007,
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.emif_tim1 = 0x0AAAD4DB,
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.emif_tim2 = 0x266B7FDA,
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.emif_tim3 = 0x501F867F,
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.zq_config = 0x50074BE4,
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.sdram_config = 0x61C05332,
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.sdram_config2 = 0x0,
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.sdram_ref_ctrl = 0xC30,
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};
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static const struct am33xx_ddr_data ddr3_data_256mb = {
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.rd_slave_ratio0 = 0x36,
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.wr_dqs_slave_ratio0 = 0x38,
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.fifo_we_slave_ratio0 = 0x99,
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.wr_slave_ratio0 = 0x73,
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};
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static const struct am33xx_emif_regs ddr3_regs_256mb = {
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.emif_read_latency = 0x7,
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.emif_tim1 = 0x0AAAD4DB,
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.emif_tim2 = 0x26437FDA,
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.emif_tim3 = 0x501F83FF,
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.sdram_config = 0x61C052B2,
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.zq_config = 0x50074BE4,
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.sdram_ref_ctrl = 0x00000C30,
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};
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extern char __dtb_am335x_baltos_minimal_start[];
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/**
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* @brief The basic entry point for board initialization.
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*
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* This is called as part of machine init (after arch init).
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* This is again called with stack in SRAM, so not too many
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* constructs possible here.
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*
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* @return void
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*/
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static noinline void baltos_sram_init(void)
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{
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uint32_t sdram_size;
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void *fdt;
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fdt = __dtb_am335x_baltos_minimal_start;
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/* WDT1 is already running when the bootloader gets control
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* Disable it to avoid "random" resets
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*/
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__raw_writel(WDT_DISABLE_CODE1, AM33XX_WDT_REG(WSPR));
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while (__raw_readl(AM33XX_WDT_REG(WWPS)) != 0x0);
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__raw_writel(WDT_DISABLE_CODE2, AM33XX_WDT_REG(WSPR));
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while (__raw_readl(AM33XX_WDT_REG(WWPS)) != 0x0);
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/* Setup the PLLs and the clocks for the peripherals */
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am33xx_pll_init(MPUPLL_M_600, DDRPLL_M_400);
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am335x_sdram_init(0x18B, &ddr3_cmd_ctrl, &ddr3_regs, &ddr3_data);
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sdram_size = get_ram_size((void *)0x80000000, (1024 << 20));
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if (sdram_size == SZ_256M)
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am335x_sdram_init(0x18B, &ddr3_cmd_ctrl, &ddr3_regs_256mb,
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&ddr3_data_256mb);
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am33xx_uart_soft_reset((void *)AM33XX_UART0_BASE);
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am33xx_enable_uart0_pin_mux();
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omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE);
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putc_ll('>');
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am335x_barebox_entry(fdt);
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}
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ENTRY_FUNCTION(start_am33xx_baltos_sram, bootinfo, r1, r2)
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{
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am33xx_save_bootinfo((void *)bootinfo);
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/*
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* Setup C environment, the board init code uses global variables.
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* Stackpointer has already been initialized by the ROM code.
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*/
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relocate_to_current_adr();
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setup_c();
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baltos_sram_init();
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}
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ENTRY_FUNCTION(start_am33xx_baltos_sdram, r0, r1, r2)
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{
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void *fdt;
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/*
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* Prolong global reset duration to the max. value (0xff)
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* and leave power domain reset to its default value (0x10).
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*/
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__raw_writel(0x000010ff, AM33XX_PRM_RSTTIME);
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fdt = __dtb_am335x_baltos_minimal_start;
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fdt -= get_runtime_offset();
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am335x_barebox_entry(fdt);
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}
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