110 lines
5.4 KiB
C
110 lines
5.4 KiB
C
/*
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* Copyright (C) 2011 Marc Kleine-Budde <mkl@pengutronix.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <common.h>
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#include <asm/byteorder.h>
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#include <mach/imx-flash-header.h>
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void __naked __flash_header_start go(void)
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{
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__asm__ __volatile__("b exception_vectors\n");
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}
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struct imx_dcd_v2_entry __dcd_entry_section dcd_entry[] = {
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/* IOMUX */
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{ .addr = cpu_to_be32(0x53fa8554), .val = cpu_to_be32(0x00300000), },
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{ .addr = cpu_to_be32(0x53fa8558), .val = cpu_to_be32(0x00300040), },
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{ .addr = cpu_to_be32(0x53fa8560), .val = cpu_to_be32(0x00300000), },
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{ .addr = cpu_to_be32(0x53fa8564), .val = cpu_to_be32(0x00300040), },
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{ .addr = cpu_to_be32(0x53fa8568), .val = cpu_to_be32(0x00300040), },
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{ .addr = cpu_to_be32(0x53fa8570), .val = cpu_to_be32(0x00300000), },
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{ .addr = cpu_to_be32(0x53fa8574), .val = cpu_to_be32(0x00300000), },
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{ .addr = cpu_to_be32(0x53fa8578), .val = cpu_to_be32(0x00300000), },
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{ .addr = cpu_to_be32(0x53fa857c), .val = cpu_to_be32(0x00300040), },
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{ .addr = cpu_to_be32(0x53fa8580), .val = cpu_to_be32(0x00300040), },
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{ .addr = cpu_to_be32(0x53fa8584), .val = cpu_to_be32(0x00300000), },
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{ .addr = cpu_to_be32(0x53fa8588), .val = cpu_to_be32(0x00300000), },
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{ .addr = cpu_to_be32(0x53fa8590), .val = cpu_to_be32(0x00300040), },
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{ .addr = cpu_to_be32(0x53fa8594), .val = cpu_to_be32(0x00300000), },
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{ .addr = cpu_to_be32(0x53fa86f0), .val = cpu_to_be32(0x00300000), },
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{ .addr = cpu_to_be32(0x53fa86f4), .val = cpu_to_be32(0x00000000), },
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{ .addr = cpu_to_be32(0x53fa86fc), .val = cpu_to_be32(0x00000000), },
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{ .addr = cpu_to_be32(0x53fa8714), .val = cpu_to_be32(0x00000000), },
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{ .addr = cpu_to_be32(0x53fa8718), .val = cpu_to_be32(0x00300000), },
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{ .addr = cpu_to_be32(0x53fa871c), .val = cpu_to_be32(0x00300000), },
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{ .addr = cpu_to_be32(0x53fa8720), .val = cpu_to_be32(0x00300000), },
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{ .addr = cpu_to_be32(0x53fa8724), .val = cpu_to_be32(0x04000000), },
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{ .addr = cpu_to_be32(0x53fa8728), .val = cpu_to_be32(0x00300000), },
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{ .addr = cpu_to_be32(0x53fa872c), .val = cpu_to_be32(0x00300000), },
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/* ESDCTL */
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{ .addr = cpu_to_be32(0x63fd9088), .val = cpu_to_be32(0x35343535), },
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{ .addr = cpu_to_be32(0x63fd9090), .val = cpu_to_be32(0x4d444c44), },
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{ .addr = cpu_to_be32(0x63fd907c), .val = cpu_to_be32(0x01370138), },
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{ .addr = cpu_to_be32(0x63fd9080), .val = cpu_to_be32(0x013b013c), },
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{ .addr = cpu_to_be32(0x63fd90f8), .val = cpu_to_be32(0x00000800), },
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#ifdef CONFIG_MACH_TQMA53_1GB_RAM
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{ .addr = cpu_to_be32(0x63fd9018), .val = cpu_to_be32(0x00001740), },
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{ .addr = cpu_to_be32(0x63fd9000), .val = cpu_to_be32(0xc3190000), },
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#else
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{ .addr = cpu_to_be32(0x63fd9018), .val = cpu_to_be32(0x00101740), },
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{ .addr = cpu_to_be32(0x63fd9000), .val = cpu_to_be32(0x83190000), },
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#endif
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{ .addr = cpu_to_be32(0x63fd900c), .val = cpu_to_be32(0x9f5152e3), },
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{ .addr = cpu_to_be32(0x63fd9010), .val = cpu_to_be32(0xb68e8a63), },
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{ .addr = cpu_to_be32(0x63fd9014), .val = cpu_to_be32(0x01ff00db), },
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{ .addr = cpu_to_be32(0x63fd902c), .val = cpu_to_be32(0x000026d2), },
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{ .addr = cpu_to_be32(0x63fd9030), .val = cpu_to_be32(0x009f0e21), },
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{ .addr = cpu_to_be32(0x63fd9008), .val = cpu_to_be32(0x12273030), },
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{ .addr = cpu_to_be32(0x63fd9004), .val = cpu_to_be32(0x0002002d), },
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{ .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x00008032), },
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{ .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x00008033), },
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{ .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x00028031), },
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{ .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x052080b0), },
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{ .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x04008040), },
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{ .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x0000803a), },
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{ .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x0000803b), },
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{ .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x00028039), },
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{ .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x05208138), },
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{ .addr = cpu_to_be32(0x63fd901c), .val = cpu_to_be32(0x04008048), },
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{ .addr = cpu_to_be32(0x63fd9020), .val = cpu_to_be32(0x00005800), },
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{ .addr = cpu_to_be32(0x63fd9040), .val = cpu_to_be32(0x04b80003), },
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{ .addr = cpu_to_be32(0x63fd9058), .val = cpu_to_be32(0x00022227), },
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{ .addr = cpu_to_be32(0x63fd901C), .val = cpu_to_be32(0x00000000), },
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};
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#define APP_DEST CONFIG_TEXT_BASE
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struct imx_flash_header_v2 __flash_header_section flash_header = {
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.header.tag = IVT_HEADER_TAG,
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.header.length = cpu_to_be16(32),
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.header.version = IVT_VERSION,
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.entry = APP_DEST + 0x1000,
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.dcd_ptr = APP_DEST + 0x400 + offsetof(struct imx_flash_header_v2, dcd),
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.boot_data_ptr = APP_DEST + 0x400 + offsetof(struct imx_flash_header_v2, boot_data),
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.self = APP_DEST + 0x400,
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.boot_data.start = APP_DEST,
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.boot_data.size = DCD_BAREBOX_SIZE,
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.dcd.header.tag = DCD_HEADER_TAG,
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.dcd.header.length = cpu_to_be16(sizeof(struct imx_dcd) + sizeof(dcd_entry)),
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.dcd.header.version = DCD_VERSION,
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.dcd.command.tag = DCD_COMMAND_WRITE_TAG,
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.dcd.command.length = cpu_to_be16(sizeof(struct imx_dcd_command) + sizeof(dcd_entry)),
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.dcd.command.param = DCD_COMMAND_WRITE_PARAM,
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};
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