9c8f73ba86
Signed-off-by: Michel Stam <michel@reverze.net> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
198 lines
5.7 KiB
C
198 lines
5.7 KiB
C
/*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef ATA_DISK_H
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# define ATA_DISK
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#include <block.h>
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/* IDE register file */
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#define IDE_REG_DATA 0x00
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#define IDE_REG_ERR 0x01
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#define IDE_REG_NSECT 0x02
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#define IDE_REG_LBAL 0x03
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#define IDE_REG_LBAM 0x04
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#define IDE_REG_LBAH 0x05
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#define IDE_REG_DEVICE 0x06
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#define IDE_REG_STATUS 0x07
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#define IDE_REG_FEATURE IDE_REG_ERR /* and their aliases */
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#define IDE_REG_CMD IDE_REG_STATUS
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#define IDE_REG_ALT_STATUS 0x00
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#define IDE_REG_DEV_CTL 0x00
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#define IDE_REG_DRV_ADDR 0x01
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#define ATA_CMD_ID_ATA 0xEC
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#define ATA_CMD_READ 0x20
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#define ATA_CMD_READ_EXT 0x25
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#define ATA_CMD_WRITE 0x30
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#define ATA_CMD_WRITE_EXT 0x35
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/* drive's status flags */
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#define ATA_STATUS_BUSY (1 << 7)
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#define ATA_STATUS_READY (1 << 6)
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#define ATA_STATUS_WR_FLT (1 << 5)
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#define ATA_STATUS_DSC (1 << 4)
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#define ATA_STATUS_DRQ (1 << 3)
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#define ATA_STATUS_CORR (1 << 2)
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#define ATA_STATUS_IDX (1 << 1)
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#define ATA_STATUS_ERROR (1 << 0)
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/* command flags */
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#define LBA_FLAG (1 << 6)
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#define ATA_DEVCTL_SOFT_RESET (1 << 2)
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#define ATA_DEVCTL_INTR_DISABLE (1 << 1)
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#define ata_id_u32(id,n) \
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(((uint32_t) (id)[(n) + 1] << 16) | ((uint32_t) (id)[(n)]))
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#define ata_id_u64(id,n) \
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( ((uint64_t) (id)[(n) + 3] << 48) | \
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((uint64_t) (id)[(n) + 2] << 32) | \
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((uint64_t) (id)[(n) + 1] << 16) | \
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((uint64_t) (id)[(n) + 0]) )
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#define ata_id_has_lba(id) ((id)[49] & (1 << 9))
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enum {
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ATA_ID_SERNO = 10,
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#define ATA_ID_SERNO_LEN 20
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ATA_ID_FW_REV = 23,
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#define ATA_ID_FW_REV_LEN 8
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ATA_ID_PROD = 27,
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#define ATA_ID_PROD_LEN 40
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ATA_ID_CAPABILITY = 49,
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ATA_ID_FIELD_VALID = 53,
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ATA_ID_LBA_CAPACITY = 60,
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ATA_ID_MWDMA_MODES = 63,
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ATA_ID_PIO_MODES = 64,
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ATA_ID_QUEUE_DEPTH = 75,
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ATA_ID_MAJOR_VER = 80,
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ATA_ID_COMMAND_SET_1 = 82,
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ATA_ID_COMMAND_SET_2 = 83,
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ATA_ID_CFSSE = 84,
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ATA_ID_CFS_ENABLE_1 = 85,
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ATA_ID_CFS_ENABLE_2 = 86,
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ATA_ID_CSF_DEFAULT = 87,
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ATA_ID_UDMA_MODES = 88,
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ATA_ID_HW_CONFIG = 93,
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ATA_ID_LBA_CAPACITY_2 = 100,
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};
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static inline int ata_id_has_lba48(const uint16_t *id)
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{
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if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
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return 0;
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if (!ata_id_u64(id, ATA_ID_LBA_CAPACITY_2))
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return 0;
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return id[ATA_ID_COMMAND_SET_2] & (1 << 10);
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}
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/** addresses of each individual IDE drive register */
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struct ata_ioports {
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void __iomem *cmd_addr;
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void __iomem *data_addr;
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void __iomem *error_addr;
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void __iomem *feature_addr;
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void __iomem *nsect_addr;
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void __iomem *lbal_addr;
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void __iomem *lbam_addr;
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void __iomem *lbah_addr;
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void __iomem *device_addr;
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void __iomem *status_addr;
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void __iomem *command_addr;
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void __iomem *altstatus_addr;
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void __iomem *ctl_addr;
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void __iomem *alt_dev_addr;
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/* hard reset line handling */
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void (*reset)(int); /* true: assert reset, false: de-assert reset */
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int dataif_be; /* true if 16 bit data register is big endian */
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int mmio; /* true if memory-mapped io */
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};
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struct ata_port;
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struct ata_port_operations {
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int (*init)(struct ata_port *port);
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int (*read)(struct ata_port *port, void *buf, unsigned int block, int num_blocks);
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int (*write)(struct ata_port *port, const void *buf, unsigned int block, int num_blocks);
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int (*read_id)(struct ata_port *port, void *buf);
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int (*reset)(struct ata_port *port);
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};
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struct ata_port {
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struct ata_port_operations *ops;
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struct device_d *dev;
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struct device_d class_dev;
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const char *devname;
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void *drvdata;
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struct block_device blk;
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uint16_t *id;
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int initialized;
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int probe;
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};
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struct ide_port {
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struct ata_ioports io; /**< register file */
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struct ata_port port;
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};
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int ide_port_register(struct ide_port *ide);
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int ata_port_register(struct ata_port *port);
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int ata_port_detect(struct ata_port *port);
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struct device_d;
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/**
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* @file
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* @brief Register file examples of generic types of ATA devices
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*
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* PC IDE:
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*
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* Offset Read Write Note
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*-----------------------------------------------------------
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* 0x1f0 data data 16 bit register
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* 0x1f1 error feature
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* 0x1f2 sec cnt set cnt
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* 0x1f3 sec no sec no
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* 0x1f4 cyl low cyl low
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* 0x1f5 cyl high cyl high
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* 0x1f6 head head
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* 0x1f7 status command
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* 0x3f6 alt status dev cntrl
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* 0x3f7 drv addr
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*
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* PCMCIA memory mapped:
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*
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* Offset Read Write Note
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*-----------------------------------------------------------
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* 0x0 data data 16 bit register
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* 0x1 error feature
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* 0x2 sec cnt set cnt
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* 0x3 sec no sec no
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* 0x4 cyl low cyl low
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* 0x5 cyl high cyl high
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* 0x6 head head
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* 0x7 status command
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* 0x8 data data 16 bit or 8 bit register (even byte)
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* 0x9 data data 8 bit register (odd byte)
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* 0xd error feature dup of offset 1
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* 0xe alt status dev cntrl
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* 0xf drv addr
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* 0x400 data data 16 bit area with 1 kiB in size
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*/
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#endif /* ATA_DISK */
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