55 lines
1.0 KiB
ReStructuredText
55 lines
1.0 KiB
ReStructuredText
element14 WaRP7
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===============
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This CPU card is based on an NXP i.MX7S SoC.
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Supported hardware
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==================
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- NXP PMIC PFUZE3000
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- Kingston 08EMCP04-EL3AV100 eMCP (eMMC and LPDDR3 memory in one package)
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- 8 GiB eMMC Triple-Level cell NAND flash, eMMC standard 5.0 (HS400)
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- 512 MiB LPDDR3 SDRAM starting at address 0x80000000
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Bootstrapping barebox
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=====================
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The device boots in internal boot mode from eMMC and is shipped with a
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vendor modified u-boot imximage.
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Barebox can be used as a drop-in replacement for the shipped bootloader.
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The WaRP7 IO Board has a double DIP switch where switch number two defines the
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boot source of the i.MX7 SoC:
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+-----+
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| | O | <--- on = high level
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| | | |
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| O | | <--- off = low level
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| 1 2 |
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+-----+
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Bootsource is the internal eMMC:
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+-----+
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| O | |
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| | | |
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| | O | <---- eMMC
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| 1 2 |
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+-----+
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Bootsource is the USB:
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+-----+
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| O O | <---- USB
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| | | |
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| | | |
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| 1 2 |
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+-----+
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