39b0eb3b84
it's currently only handled through DT and for i.MX25 OTG port (at least), we need to configure portsc to get host mode working but it actually fails as ci->phymode is 0 which is USBPHY_INTERFACE_MODE_UNKNOWN Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
55 lines
1.4 KiB
C
55 lines
1.4 KiB
C
#ifndef __USB_CHIPIDEA_IMX_H
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#define __USB_CHIPIDEA_IMX_H
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#include <usb/phy.h>
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/*
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* POTSC flags
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*/
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#define MXC_EHCI_SERIAL (1 << 29)
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#define MXC_EHCI_MODE_UTMI_8BIT (0 << 30)
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#define MXC_EHCI_MODE_UTMI_16_BIT ((0 << 30) | (1 << 28))
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#define MXC_EHCI_MODE_PHILIPS (1 << 30)
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#define MXC_EHCI_MODE_ULPI (2 << 30)
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#define MXC_EHCI_MODE_HSIC (1 << 25)
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#define MXC_EHCI_MODE_SERIAL (3 << 30)
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/*
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* USB misc flags
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*/
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#define MXC_EHCI_INTERFACE_DIFF_UNI (0 << 0)
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#define MXC_EHCI_INTERFACE_DIFF_BI (1 << 0)
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#define MXC_EHCI_INTERFACE_SINGLE_UNI (2 << 0)
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#define MXC_EHCI_INTERFACE_SINGLE_BI (3 << 0)
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#define MXC_EHCI_INTERFACE_MASK (0xf)
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#define MXC_EHCI_POWER_PINS_ENABLED (1 << 5)
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#define MXC_EHCI_PWR_PIN_ACTIVE_HIGH (1 << 6)
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#define MXC_EHCI_OC_PIN_ACTIVE_LOW (1 << 7)
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#define MXC_EHCI_TLL_ENABLED (1 << 8)
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#define MXC_EHCI_INTERNAL_PHY (1 << 9)
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#define MXC_EHCI_IPPUE_DOWN (1 << 10)
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#define MXC_EHCI_IPPUE_UP (1 << 11)
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#define MXC_EHCI_WAKEUP_ENABLED (1 << 12)
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#define MXC_EHCI_ITC_NO_THRESHOLD (1 << 13)
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#define MXC_EHCI_DISABLE_OVERCURRENT (1 << 14)
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enum imx_usb_mode {
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IMX_USB_MODE_HOST,
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IMX_USB_MODE_DEVICE,
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IMX_USB_MODE_OTG,
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};
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struct imxusb_platformdata {
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unsigned long flags;
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enum usb_phy_interface phymode;
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enum imx_usb_mode mode;
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};
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int imx_usbmisc_port_init(int port, unsigned flags);
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int imx_usbmisc_port_post_init(int port, unsigned flags);
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#endif /* __USB_CHIPIDEA_IMX_H */
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