OpenRISC is the original flagship project of the OpenCores community. This project aims to develop a series of general purpose open source RISC CPU architectures. A team from OpenCores provided the first implementation, the OpenRISC 1200, written in the Verilog hardware description language. Even though I should have created an mach-or1200 directory, it is not necessary for now. The OpenRISC 1200 CPU is the only one available and it will be for some time. Signed-off-by: Franck Jullien <franck.jullien@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
99 lines
1.9 KiB
ArmAsm
99 lines
1.9 KiB
ArmAsm
/*
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* barebox - barebox.lds.S
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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#include <asm-generic/barebox.lds.h>
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OUTPUT_FORMAT("elf32-or32", "elf32-or32", "elf32-or32")
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__DYNAMIC = 0;
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MEMORY
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{
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vectors : ORIGIN = 0, LENGTH = 0x2000
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ram : ORIGIN = TEXT_BASE,
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LENGTH = BAREBOX_RESERVED_SIZE
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}
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SECTIONS
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{
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.vectors :
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{
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*(.vectors)
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} > vectors
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. = ALIGN(4);
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__start = .;
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.text : AT (__start) {
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_stext = .;
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*(.text)
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_etext = .;
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*(.lit)
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*(.shdata)
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_endtext = .;
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} > ram
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. = ALIGN(4);
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.rodata : {
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*(.rodata);
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*(.rodata.*)
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} > ram
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. = ALIGN(4);
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. = .;
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__barebox_cmd_start = .;
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.barebox_cmd : { BAREBOX_CMDS } > ram
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__barebox_cmd_end = .;
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__barebox_magicvar_start = .;
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.barebox_magicvar : { BAREBOX_MAGICVARS } > ram
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__barebox_magicvar_end = .;
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__barebox_initcalls_start = .;
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.barebox_initcalls : { INITCALLS } > ram
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__barebox_initcalls_end = .;
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___usymtab_start = .;
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__usymtab : { BAREBOX_SYMS } > ram
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___usymtab_end = .;
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__etext = .; /* End of text and rodata section */
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. = ALIGN(4);
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.data : {
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sdata = .;
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_sdata = .;
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*(.data)
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edata = .;
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_edata = .;
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} > ram
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. = ALIGN(4);
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.bss :
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{
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__bss_start = .;
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_bss_start = .;
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*(.shbss)
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*(.bss)
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*(COMMON)
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_bss_end = .;
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__bss_stop = .;
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} > ram
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__end = .;
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}
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