647 lines
18 KiB
C
647 lines
18 KiB
C
/*
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* xHCI USB 3.0 Root Hub
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*
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* Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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*
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* This currently does not support any SuperSpeed capabilities.
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*
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* Some code borrowed from the Linux xHCI driver
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* Author: Sarah Sharp
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* Copyright (C) 2008 Intel Corp.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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//#define DEBUG
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#include <clock.h>
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#include <common.h>
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#include <io.h>
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#include <linux/err.h>
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#include <usb/usb.h>
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#include <usb/xhci.h>
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#include "xhci.h"
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static const struct usb_root_hub_info usb_rh_info = {
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.hub = {
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.bLength = USB_DT_HUB_NONVAR_SIZE +
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((USB_MAXCHILDREN + 1 + 7) / 8),
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.bDescriptorType = USB_DT_HUB,
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.bNbrPorts = 0, /* runtime modified */
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.wHubCharacteristics = 0,
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.bPwrOn2PwrGood = 10,
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.bHubContrCurrent = 0,
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.u.hs.DeviceRemovable = {},
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.u.hs.PortPwrCtrlMask = {}
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},
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.device = {
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.bLength = USB_DT_DEVICE_SIZE,
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.bDescriptorType = USB_DT_DEVICE,
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.bcdUSB = __constant_cpu_to_le16(0x0002), /* v2.0 */
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.bDeviceClass = USB_CLASS_HUB,
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.bDeviceSubClass = 0,
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.bDeviceProtocol = USB_HUB_PR_HS_MULTI_TT,
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.bMaxPacketSize0 = 64,
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.idVendor = 0x0000,
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.idProduct = 0x0000,
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.bcdDevice = __constant_cpu_to_le16(0x0001),
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.iManufacturer = 1,
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.iProduct = 2,
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.iSerialNumber = 0,
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.bNumConfigurations = 1
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},
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.config = {
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.bLength = USB_DT_CONFIG_SIZE,
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.bDescriptorType = USB_DT_CONFIG,
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.wTotalLength = __constant_cpu_to_le16(USB_DT_CONFIG_SIZE +
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USB_DT_INTERFACE_SIZE + USB_DT_ENDPOINT_SIZE),
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.bNumInterfaces = 1,
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.bConfigurationValue = 1,
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.iConfiguration = 0,
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.bmAttributes = USB_CONFIG_ATT_SELFPOWER,
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.bMaxPower = 0
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},
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.interface = {
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.bLength = USB_DT_INTERFACE_SIZE,
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.bDescriptorType = USB_DT_INTERFACE,
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.bInterfaceNumber = 0,
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.bAlternateSetting = 0,
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.bNumEndpoints = 1,
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.bInterfaceClass = USB_CLASS_HUB,
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.bInterfaceSubClass = 0,
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.bInterfaceProtocol = 0,
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.iInterface = 0
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},
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.endpoint = {
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.bLength = USB_DT_ENDPOINT_SIZE,
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.bDescriptorType = USB_DT_ENDPOINT,
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.bEndpointAddress = 0x81, /* UE_DIR_IN | EHCI_INTR_ENDPT */
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.bmAttributes = USB_ENDPOINT_XFER_INT,
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.wMaxPacketSize = __constant_cpu_to_le16((USB_MAXCHILDREN + 1 + 7) / 8),
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.bInterval = 255
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}
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};
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static void xhci_setup_common_hub_descriptor(struct xhci_hcd *xhci,
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struct usb_hub_descriptor *desc, int ports)
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{
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u16 val;
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/* xhci section 5.4.9 says 20ms max */
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desc->bPwrOn2PwrGood = 10;
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desc->bHubContrCurrent = 0;
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desc->bNbrPorts = xhci->num_usb_ports;
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val = 0;
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/* Bits 1:0 - support per-port power switching, or power always on */
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if (HCC_PPC(xhci->hcc_params))
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val |= HUB_CHAR_INDV_PORT_LPSM;
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else
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val |= HUB_CHAR_NO_LPSM;
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/* Bit 2 - root hubs are not part of a compound device */
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/* Bits 4:3 - individual port over current protection */
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val |= HUB_CHAR_INDV_PORT_OCPM;
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/* Bits 6:5 - no TTs in root ports */
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/* Bit 7 - no port indicators */
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desc->wHubCharacteristics = cpu_to_le16(val);
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}
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static void xhci_setup_usb2_hub_descriptor(struct xhci_hcd *xhci)
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{
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struct usb_hub_descriptor *desc = &xhci->usb_info.hub;
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__u8 port_removable[(USB_MAXCHILDREN + 1 + 7) / 8];
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int ports;
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u32 portsc;
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u16 val;
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int i;
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ports = xhci->num_usb_ports;
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xhci_setup_common_hub_descriptor(xhci, desc, ports);
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desc->bDescriptorType = USB_DT_HUB;
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val = 1 + (ports / 8);
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desc->bLength = USB_DT_HUB_NONVAR_SIZE + 2 * val;
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/* The Device Removable bits are reported on a byte granularity.
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* If the port doesn't exist within that byte, the bit is set to 0.
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*/
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memset(port_removable, 0, sizeof(port_removable));
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for (i = 0; i < ports; i++) {
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portsc = readl(xhci->usb_ports[i]);
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/* If a device is removable, PORTSC reports a 0, same as in the
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* hub descriptor DeviceRemovable bits.
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*/
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if (portsc & PORT_DEV_REMOVE)
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/* This math is hairy because bit 0 of DeviceRemovable
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* is reserved, and bit 1 is for port 1, etc.
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*/
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port_removable[(i + 1) / 8] |= 1 << ((i + 1) % 8);
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}
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/* ch11.h defines a hub descriptor that has room for USB_MAXCHILDREN
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* ports on it. The USB 2.0 specification says that there are two
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* variable length fields at the end of the hub descriptor:
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* DeviceRemovable and PortPwrCtrlMask. But since we can have less than
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* USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array
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* to set PortPwrCtrlMask bits. PortPwrCtrlMask must always be set to
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* 0xFF, so we initialize the both arrays (DeviceRemovable and
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* PortPwrCtrlMask) to 0xFF. Then we set the DeviceRemovable for each
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* set of ports that actually exist.
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*/
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memset(desc->u.hs.DeviceRemovable, 0xff,
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sizeof(desc->u.hs.DeviceRemovable));
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memset(desc->u.hs.PortPwrCtrlMask, 0xff,
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sizeof(desc->u.hs.PortPwrCtrlMask));
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for (i = 0; i < (ports + 1 + 7) / 8; i++)
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memset(&desc->u.hs.DeviceRemovable[i], port_removable[i],
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sizeof(__u8));
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}
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/* FIXME: usb core does not know about USB_SPEED_SUPER at all */
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static __maybe_unused void xhci_setup_usb3_hub_descriptor(struct xhci_hcd *xhci)
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{
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struct usb_hub_descriptor *desc = &xhci->usb_info.hub;
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int ports;
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u16 port_removable;
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u32 portsc;
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int i;
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ports = xhci->num_usb_ports;
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xhci_setup_common_hub_descriptor(xhci, desc, ports);
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desc->bDescriptorType = USB_DT_SS_HUB;
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desc->bLength = USB_DT_SS_HUB_SIZE;
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/*
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* header decode latency should be zero for roothubs,
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* see section 4.23.5.2.
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*/
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desc->u.ss.bHubHdrDecLat = 0;
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desc->u.ss.wHubDelay = 0;
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port_removable = 0;
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/* bit 0 is reserved, bit 1 is for port 1, etc. */
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for (i = 0; i < ports; i++) {
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portsc = readl(xhci->usb_ports[i]);
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if (portsc & PORT_DEV_REMOVE)
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port_removable |= 1 << (i + 1);
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}
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desc->u.ss.DeviceRemovable = cpu_to_le16(port_removable);
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}
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static void xhci_add_in_port(struct xhci_hcd *xhci, unsigned int num_ports,
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__le32 __iomem *addr, u8 major_revision, int max_caps)
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{
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u32 reg, port_offset, port_count;
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int i;
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if (major_revision > 0x03) {
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dev_warn(xhci->dev, "Ignoring unknown port speed, Ext Cap %p, rev %02x\n",
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addr, major_revision);
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return;
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}
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/* Port offset and count in the third dword, see section 7.2 */
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reg = readl(addr + 2);
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port_offset = XHCI_EXT_PORT_OFF(reg);
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port_count = XHCI_EXT_PORT_COUNT(reg);
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/* Port count includes the current port offset */
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if (port_offset == 0 || (port_offset + port_count - 1) > num_ports)
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/* WTF? "Valid values are ‘1’ to MaxPorts" */
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return;
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/* cache usb2 port capabilities */
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if (major_revision < 0x03 && xhci->num_ext_caps < max_caps)
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xhci->ext_caps[xhci->num_ext_caps++] = reg;
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port_offset--;
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for (i = port_offset; i < (port_offset + port_count); i++) {
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/* Duplicate entry. Ignore the port if the revisions differ. */
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if (xhci->port_array[i] != 0) {
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dev_warn(xhci->dev, "Duplicate port entry, Ext Cap %p, port %u\n",
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addr, i);
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dev_warn(xhci->dev, "Port was marked as USB %u, duplicated as USB %u\n",
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xhci->port_array[i], major_revision);
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/*
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* Only adjust the roothub port counts if we haven't
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* found a similar duplicate.
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*/
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if (xhci->port_array[i] != major_revision &&
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xhci->port_array[i] != DUPLICATE_ENTRY) {
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xhci->num_usb_ports--;
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xhci->port_array[i] = DUPLICATE_ENTRY;
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}
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continue;
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}
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xhci->port_array[i] = major_revision;
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xhci->num_usb_ports++;
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}
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}
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int xhci_hub_setup_ports(struct xhci_hcd *xhci)
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{
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u32 offset, tmp_offset;
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__le32 __iomem *addr, *tmp_addr;
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unsigned int num_ports;
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int i, cap_count = 0;
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offset = HCC_EXT_CAPS(xhci->hcc_params);
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if (offset == 0) {
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dev_err(xhci->dev, "No Extended Capability Registers\n");
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return -ENODEV;
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}
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addr = &xhci->cap_regs->hc_capbase + offset;
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/* count extended protocol capability entries for later caching */
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tmp_addr = addr;
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tmp_offset = offset;
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do {
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u32 cap_id = readl(tmp_addr);
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if (XHCI_EXT_CAPS_ID(cap_id) == XHCI_EXT_CAPS_PROTOCOL)
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cap_count++;
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tmp_offset = XHCI_EXT_CAPS_NEXT(cap_id);
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tmp_addr += tmp_offset;
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} while (tmp_offset);
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num_ports = HCS_MAX_PORTS(xhci->hcs_params1);
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xhci->port_array = xzalloc(num_ports * sizeof(*xhci->port_array));
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xhci->ext_caps = xzalloc(cap_count * sizeof(*xhci->ext_caps));
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while (1) {
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u32 cap_id = readl(addr);
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if (XHCI_EXT_CAPS_ID(cap_id) == XHCI_EXT_CAPS_PROTOCOL)
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xhci_add_in_port(xhci, num_ports, addr,
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(u8)XHCI_EXT_PORT_MAJOR(cap_id),
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cap_count);
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offset = XHCI_EXT_CAPS_NEXT(cap_id);
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if (!offset || xhci->num_usb_ports == num_ports)
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break;
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addr += offset;
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}
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if (xhci->num_usb_ports == 0) {
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dev_err(xhci->dev, "No ports on the roothubs?\n");
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return -ENODEV;
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}
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xhci->usb_ports = xzalloc(num_ports * sizeof(*xhci->usb_ports));
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for (i = 0; i < num_ports; i++)
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xhci->usb_ports[i] = &xhci->op_regs->port_status_base +
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NUM_PORT_REGS * i;
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memcpy(&xhci->usb_info, &usb_rh_info, sizeof(usb_rh_info));
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xhci_setup_usb2_hub_descriptor(xhci);
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return 0;
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}
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/*
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* These bits are Read Only (RO) and should be saved and written to the
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* registers: 0, 3, 10:13, 30
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* connect status, over-current status, port speed, and device removable.
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* connect status and port speed are also sticky - meaning they're in
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* the AUX well and they aren't changed by a hot, warm, or cold reset.
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*/
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#define XHCI_PORT_RO (PORT_CONNECT | PORT_OC | DEV_SPEED_MASK | \
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PORT_DEV_REMOVE)
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/*
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* These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
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* bits 5:8, 9, 14:15, 25:27
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* link state, port power, port indicator state, "wake on" enable state
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*/
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#define XHCI_PORT_RWS (PORT_PLS_MASK | PORT_POWER | PORT_LED_MASK | \
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PORT_WKCONN_E | PORT_WKDISC_E | PORT_WKOC_E)
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/*
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* These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
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* bit 4 (port reset)
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*/
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#define XHCI_PORT_RW1S (PORT_RESET)
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/*
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* These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
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* bits 1, 17, 18, 19, 20, 21, 22, 23
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* port enable/disable, and
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* change bits: connect, PED, warm port reset changed (reserved 0 for USB 2.0),
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* over-current, reset, link state, and L1 change
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*/
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#define XHCI_PORT_RW1CS (PORT_PE | PORT_CSC | PORT_PEC | PORT_WRC | \
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PORT_OCC | PORT_RC | PORT_PLC | PORT_CEC)
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/*
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* Bit 16 is RW, and writing a '1' to it causes the link state control to be
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* latched in
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*/
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#define XHCI_PORT_RW (PORT_LINK_STROBE)
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/*
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* These bits are Reserved Zero (RsvdZ) and zero should be written to them:
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* bits 2, 24, 28:31
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*/
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#define XHCI_PORT_RZ (BIT(2) | BIT(24) | (0xf<<28))
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/*
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* Given a port state, this function returns a value that would result in the
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* port being in the same state, if the value was written to the port status
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* control register.
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* Save Read Only (RO) bits and save read/write bits where
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* writing a 0 clears the bit and writing a 1 sets the bit (RWS).
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* For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
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*/
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static u32 inline xhci_port_state_to_neutral(u32 state)
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{
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/* Save read-only status and port state */
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return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
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}
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static int xhci_hub_finish_port_detach(struct xhci_hcd *xhci, int port)
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{
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struct xhci_virtual_device *vdev, *temp;
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union xhci_trb trb;
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int ret;
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ret = xhci_wait_for_event(xhci, TRB_PORT_STATUS, &trb);
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if (ret)
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return ret;
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/* Tear-down any attached virtual devices */
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list_for_each_entry_safe(vdev, temp, &xhci->vdev_list, list)
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if (vdev->udev && vdev->udev->portnr == port)
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xhci_virtdev_detach(vdev);
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return 0;
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}
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static int xhci_hub_finish_port_reset(struct xhci_hcd *xhci, int port)
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{
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struct xhci_virtual_device *vdev;
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union xhci_trb trb;
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int ret;
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ret = xhci_wait_for_event(xhci, TRB_PORT_STATUS, &trb);
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if (ret)
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return ret;
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/* Reset any attached virtual devices */
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list_for_each_entry(vdev, &xhci->vdev_list, list)
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if (vdev->udev && vdev->udev->portnr == port)
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xhci_virtdev_reset(vdev);
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return 0;
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}
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void xhci_hub_port_power(struct xhci_hcd *xhci, int port,
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bool enable)
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{
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u32 reg = readl(xhci->usb_ports[port]);
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reg = xhci_port_state_to_neutral(reg);
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if (enable)
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reg |= PORT_POWER;
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else
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reg &= ~PORT_POWER;
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writel(reg, xhci->usb_ports[port]);
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}
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static __maybe_unused int xhci_hub_port_warm_reset(struct xhci_hcd *xhci, int port)
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{
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void __iomem *portsc = xhci->usb_ports[port];
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u32 reg;
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reg = xhci_port_state_to_neutral(readl(portsc));
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writel(reg | PORT_WR, portsc);
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return xhci_handshake(portsc, PORT_RESET, 0, 10 * SECOND/USECOND);
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}
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int xhci_hub_control(struct usb_device *dev, unsigned long pipe,
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void *buffer, int length, struct devrequest *req)
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{
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struct usb_host *host = dev->host;
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struct xhci_hcd *xhci = to_xhci_hcd(host);
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struct usb_root_hub_info *info;
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__le32 __iomem **port_array;
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int max_ports;
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void *srcptr = NULL;
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u8 tmpbuf[4];
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u16 typeReq;
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int len, port, srclen = 0;
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u32 reg;
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dev_dbg(xhci->dev, "%s req %u (%#x), type %u (%#x), value %u (%#x), index %u (%#x), length %u (%#x)\n",
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__func__, req->request, req->request,
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req->requesttype, req->requesttype,
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le16_to_cpu(req->value), le16_to_cpu(req->value),
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le16_to_cpu(req->index), le16_to_cpu(req->index),
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le16_to_cpu(req->length), le16_to_cpu(req->length));
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info = &xhci->usb_info;
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port_array = xhci->usb_ports;
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max_ports = xhci->num_usb_ports;
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typeReq = (req->requesttype << 8) | req->request;
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switch (typeReq) {
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case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
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dev_dbg(xhci->dev, "GetDeviceDescriptor %u\n",
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le16_to_cpu(req->value) >> 8);
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switch (le16_to_cpu(req->value) >> 8) {
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case USB_DT_DEVICE:
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srcptr = &info->device;
|
||
srclen = info->device.bLength;
|
||
break;
|
||
case USB_DT_CONFIG:
|
||
srcptr = &info->config;
|
||
srclen = le16_to_cpu(info->config.wTotalLength);
|
||
break;
|
||
case USB_DT_STRING:
|
||
switch (le16_to_cpu(req->value) & 0xff) {
|
||
case 0: /* Language */
|
||
srcptr = "\4\3\1\0";
|
||
srclen = 4;
|
||
break;
|
||
case 1: /* Vendor: "barebox" */
|
||
srcptr = "\20\3b\0a\0r\0e\0b\0o\0x\0";
|
||
srclen = 16;
|
||
break;
|
||
case 2: /* Product: "USB 3.0 Root Hub" */
|
||
srcptr = "\42\3U\0S\0B\0 \0\63\0.\0\60\0 \0R\0o\0o\0t\0 \0H\0u\0b";
|
||
srclen = 34;
|
||
break;
|
||
default:
|
||
dev_warn(xhci->dev, "unknown string descriptor %x\n",
|
||
le16_to_cpu(req->value) >> 8);
|
||
goto unknown;
|
||
}
|
||
break;
|
||
}
|
||
break;
|
||
case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
|
||
dev_dbg(xhci->dev, "SetDeviceConfiguration\n");
|
||
/* Nothing to do */
|
||
break;
|
||
case DeviceOutRequest | USB_REQ_SET_ADDRESS:
|
||
dev_dbg(xhci->dev, "SetDeviceAddress %u\n",
|
||
le16_to_cpu(req->value));
|
||
|
||
xhci->rootdev = le16_to_cpu(req->value);
|
||
break;
|
||
case GetHubDescriptor:
|
||
dev_dbg(xhci->dev, "GetHubDescriptor %u\n",
|
||
le16_to_cpu(req->value) >> 8);
|
||
|
||
switch (le16_to_cpu(req->value) >> 8) {
|
||
case USB_DT_HUB:
|
||
srcptr = &info->hub;
|
||
srclen = info->hub.bLength;
|
||
break;
|
||
default:
|
||
dev_warn(xhci->dev, "unknown descriptor %x\n",
|
||
le16_to_cpu(req->value) >> 8);
|
||
goto unknown;
|
||
}
|
||
break;
|
||
case GetHubStatus:
|
||
dev_dbg(xhci->dev, "GetHubStatus\n");
|
||
|
||
/* No power source, over-current reported per port */
|
||
tmpbuf[0] = 0x00;
|
||
tmpbuf[1] = 0x00;
|
||
srcptr = tmpbuf;
|
||
srclen = 2;
|
||
break;
|
||
case GetPortStatus:
|
||
dev_dbg(xhci->dev, "GetPortStatus %u\n",
|
||
le16_to_cpu(req->index));
|
||
|
||
memset(tmpbuf, 0, 4);
|
||
|
||
port = le16_to_cpu(req->index);
|
||
if (!port || port > max_ports)
|
||
goto unknown;
|
||
port--;
|
||
|
||
/* read PORTSC register */
|
||
reg = readl(port_array[port]);
|
||
|
||
if (reg & PORT_CONNECT) {
|
||
tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
|
||
if (DEV_LOWSPEED(reg))
|
||
tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
|
||
else if (DEV_HIGHSPEED(reg))
|
||
tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
|
||
}
|
||
if (reg & PORT_PE)
|
||
tmpbuf[0] |= USB_PORT_STAT_ENABLE;
|
||
if (reg & PORT_OC)
|
||
tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
|
||
if (reg & PORT_RESET)
|
||
tmpbuf[0] |= USB_PORT_STAT_RESET;
|
||
/* USB 2.0 only */
|
||
if ((reg & PORT_PLS_MASK) == XDEV_U3 && reg & PORT_POWER)
|
||
tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
|
||
/* USB 2.0 only */
|
||
if (reg & PORT_POWER)
|
||
tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
|
||
if (reg & PORT_CSC)
|
||
tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
|
||
if (reg & PORT_PEC)
|
||
tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
|
||
if (reg & PORT_OCC)
|
||
tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
|
||
if (reg & PORT_RC)
|
||
tmpbuf[2] |= USB_PORT_STAT_C_RESET;
|
||
srcptr = tmpbuf;
|
||
srclen = 4;
|
||
break;
|
||
case ClearPortFeature:
|
||
dev_dbg(xhci->dev, "ClearPortFeature %u %u\n",
|
||
le16_to_cpu(req->index), le16_to_cpu(req->value));
|
||
|
||
port = le16_to_cpu(req->index);
|
||
if (!port || port > max_ports)
|
||
goto unknown;
|
||
port--;
|
||
|
||
reg = xhci_port_state_to_neutral(readl(port_array[port]));
|
||
|
||
switch (le16_to_cpu(req->value)) {
|
||
case USB_PORT_FEAT_ENABLE:
|
||
reg &= ~PORT_PE;
|
||
break;
|
||
case USB_PORT_FEAT_POWER:
|
||
reg &= ~PORT_POWER;
|
||
break;
|
||
case USB_PORT_FEAT_C_CONNECTION:
|
||
reg |= PORT_CSC;
|
||
break;
|
||
case USB_PORT_FEAT_C_ENABLE:
|
||
reg |= PORT_PEC;
|
||
break;
|
||
case USB_PORT_FEAT_C_OVER_CURRENT:
|
||
reg |= PORT_OCC;
|
||
break;
|
||
case USB_PORT_FEAT_C_RESET:
|
||
reg |= PORT_RC;
|
||
break;
|
||
default:
|
||
dev_warn(xhci->dev, "unknown feature %u\n",
|
||
le16_to_cpu(req->value));
|
||
goto unknown;
|
||
}
|
||
writel(reg, port_array[port]);
|
||
readl(port_array[port]);
|
||
|
||
if ((reg & PORT_CONNECT) == 0 &&
|
||
le16_to_cpu(req->value) == USB_PORT_FEAT_C_CONNECTION)
|
||
xhci_hub_finish_port_detach(xhci, port + 1);
|
||
|
||
break;
|
||
case SetPortFeature:
|
||
dev_dbg(xhci->dev, "SetPortFeature %u %u\n",
|
||
le16_to_cpu(req->index), le16_to_cpu(req->value));
|
||
|
||
port = le16_to_cpu(req->index);
|
||
if (!port || port > max_ports)
|
||
goto unknown;
|
||
port--;
|
||
|
||
reg = xhci_port_state_to_neutral(readl(port_array[port]));
|
||
|
||
switch (le16_to_cpu(req->value)) {
|
||
case USB_PORT_FEAT_POWER:
|
||
reg |= PORT_POWER;
|
||
break;
|
||
case USB_PORT_FEAT_RESET:
|
||
reg |= PORT_RESET;
|
||
break;
|
||
default:
|
||
dev_warn(xhci->dev, "unknown feature %u\n",
|
||
le16_to_cpu(req->value));
|
||
goto unknown;
|
||
}
|
||
writel(reg, port_array[port]);
|
||
readl(port_array[port]);
|
||
|
||
if (le16_to_cpu(req->value) == USB_PORT_FEAT_RESET)
|
||
xhci_hub_finish_port_reset(xhci, port + 1);
|
||
|
||
break;
|
||
default:
|
||
dev_warn(xhci->dev, "unknown root hub request %u (%#x) type %u (%#x)\n",
|
||
req->request, req->request,
|
||
req->requesttype, req->requesttype);
|
||
goto unknown;
|
||
}
|
||
|
||
len = min3(srclen, (int)le16_to_cpu(req->length), length);
|
||
if (srcptr && len)
|
||
memcpy(buffer, srcptr, len);
|
||
dev->act_len = len;
|
||
dev->status = 0;
|
||
|
||
return 0;
|
||
|
||
unknown:
|
||
dev->act_len = 0;
|
||
dev->status = USB_ST_STALLED;
|
||
return -ENOTSUPP;
|
||
}
|