194 lines
4.2 KiB
C
194 lines
4.2 KiB
C
/*
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* Copyright (C) 2009 Ivo Clarysse
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*
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* Based on imx27ads.c,
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* Copyright (C) 2007 Sascha Hauer, Pengutronix
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*
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*/
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#include <common.h>
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#include <net.h>
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#include <init.h>
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#include <environment.h>
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#include <mach/imx21-regs.h>
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#include <asm/armlinux.h>
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#include <asm/sections.h>
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#include <asm/barebox-arm.h>
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#include <io.h>
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#include <gpio.h>
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#include <mach/weim.h>
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#include <partition.h>
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#include <fs.h>
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#include <sizes.h>
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#include <fcntl.h>
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#include <generated/mach-types.h>
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#include <mach/imx-nand.h>
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#include <mach/imxfb.h>
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#include <mach/iomux-mx21.h>
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#include <mach/devices-imx21.h>
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#define MX21ADS_IO_REG 0xCC800000
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#define MX21ADS_IO_LCDON (1 << 9)
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struct imx_nand_platform_data nand_info = {
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.width = 1,
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.hw_ecc = 1,
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};
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/* Sharp LQ035Q7DB02 QVGA display */
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static struct imx_fb_videomode imx_fb_modedata = {
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.mode = {
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.name = "Sharp-LQ035Q7",
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.refresh = 60,
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.xres = 240,
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.yres = 320,
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.pixclock = 188679,
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.left_margin = 6,
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.right_margin = 16,
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.upper_margin = 8,
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.lower_margin = 10,
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.hsync_len = 2,
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.vsync_len = 1,
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.sync = 0,
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.vmode = FB_VMODE_NONINTERLACED,
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},
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.pcr = 0xfb108bc7,
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.bpp = 16,
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};
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static struct imx_fb_platform_data imx_fb_data = {
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.mode = &imx_fb_modedata,
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.num_modes = 1,
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.cmap_greyscale = 0,
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.cmap_inverse = 0,
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.cmap_static = 0,
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.pwmr = 0x00a903ff,
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.lscr1 = 0x00120300,
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.dmacr = 0x00020008,
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};
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static int imx21ads_timing_init(void)
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{
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u32 temp;
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/* Configure External Interface Module */
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/* CS0: burst flash */
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imx21_setup_eimcs(0, 0x00003E00, 0x00000E01);
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/* CS1: Ethernet controller, external UART, memory-mapped I/O (16-bit) */
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imx21_setup_eimcs(1, 0x00002000, 0x11118501);
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/* CS2-CS5: disable */
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imx21_setup_eimcs(2, 0x0, 0x0);
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imx21_setup_eimcs(3, 0x0, 0x0);
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imx21_setup_eimcs(4, 0x0, 0x0);
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imx21_setup_eimcs(5, 0x0, 0x0);
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temp = readl(MX21_CCM_BASE_ADDR + MX21_PCDR0);
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temp &= ~0xF000;
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temp |= 0xA000; /* Set NFC divider; 0xA yields 24.18MHz */
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writel(temp, MX21_CCM_BASE_ADDR + MX21_PCDR0);
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return 0;
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}
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core_initcall(imx21ads_timing_init);
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static int mx21ads_mem_init(void)
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{
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arm_add_mem_device("ram0", 0xc0000000, SZ_64M);
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return 0;
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}
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mem_initcall(mx21ads_mem_init);
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static int mx21ads_devices_init(void)
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{
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int i;
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unsigned int mode[] = {
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PA5_PF_LSCLK,
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PA6_PF_LD0,
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PA7_PF_LD1,
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PA8_PF_LD2,
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PA9_PF_LD3,
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PA10_PF_LD4,
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PA11_PF_LD5,
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PA12_PF_LD6,
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PA13_PF_LD7,
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PA14_PF_LD8,
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PA15_PF_LD9,
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PA16_PF_LD10,
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PA17_PF_LD11,
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PA18_PF_LD12,
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PA19_PF_LD13,
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PA20_PF_LD14,
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PA21_PF_LD15,
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PA22_PF_LD16,
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PA23_PF_LD17,
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PA24_PF_REV,
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PA25_PF_CLS,
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PA26_PF_PS,
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PA27_PF_SPL_SPR,
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PA28_PF_HSYNC,
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PA29_PF_VSYNC,
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PA30_PF_CONTRAST,
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PA31_PF_OE_ACD,
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PE12_PF_UART1_TXD,
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PE13_PF_UART1_RXD,
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PE14_PF_UART1_CTS,
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PE15_PF_UART1_RTS,
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};
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/* initizalize gpios */
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for (i = 0; i < ARRAY_SIZE(mode); i++)
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imx_gpio_mode(mode[i]);
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add_cfi_flash_device(DEVICE_ID_DYNAMIC, MX21_CS0_BASE_ADDR,
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32 * 1024 * 1024, 0);
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imx21_add_nand(&nand_info);
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add_generic_device("cs8900", DEVICE_ID_DYNAMIC, NULL,
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MX21_CS1_BASE_ADDR, 0x1000,
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IORESOURCE_MEM, NULL);
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imx21_add_fb(&imx_fb_data);
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armlinux_set_architecture(MACH_TYPE_MX21ADS);
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return 0;
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}
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device_initcall(mx21ads_devices_init);
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static int mx21ads_enable_display(void)
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{
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u16 tmp;
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tmp = readw(MX21ADS_IO_REG);
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tmp |= MX21ADS_IO_LCDON;
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writew(tmp, MX21ADS_IO_REG);
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return 0;
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}
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late_initcall(mx21ads_enable_display);
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static int mx21ads_console_init(void)
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{
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barebox_set_model("Freescale i.MX21 ADS");
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barebox_set_hostname("mx21ads");
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imx21_add_uart0();
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return 0;
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}
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console_initcall(mx21ads_console_init);
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